From f2afe52a14d19daabbb5ad96a093d4cd2e153995 Mon Sep 17 00:00:00 2001 From: Erik Faye-Lund Date: Fri, 16 Jun 2023 15:21:45 +0200 Subject: [PATCH] r600/sfn: use imm-helpers Reviewed-by: Gert Wollny Reviewed-by: Kenneth Graunke Part-of: --- src/gallium/drivers/r600/sfn/sfn_nir.cpp | 6 ++-- .../drivers/r600/sfn/sfn_nir_lower_tess_io.cpp | 36 +++++++++++----------- 2 files changed, 21 insertions(+), 21 deletions(-) diff --git a/src/gallium/drivers/r600/sfn/sfn_nir.cpp b/src/gallium/drivers/r600/sfn/sfn_nir.cpp index e1f9499..66a2e7e 100644 --- a/src/gallium/drivers/r600/sfn/sfn_nir.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_nir.cpp @@ -102,7 +102,7 @@ r600_nir_lower_scratch_address_impl(nir_builder *b, nir_intrinsic_instr *instr) } nir_ssa_def *address = instr->src[address_index].ssa; - nir_ssa_def *new_address = nir_ishr(b, address, nir_imm_int(b, 4 * align)); + nir_ssa_def *new_address = nir_ishr_imm(b, address, 4 * align); nir_instr_rewrite_src(&instr->instr, &instr->src[address_index], @@ -414,7 +414,7 @@ r600_lower_deref_instr(nir_builder *b, nir_instr *instr_, UNUSED void *cb_data) array_stride *= glsl_get_aoa_size(d->type); offset = - nir_iadd(b, offset, nir_imul(b, d->arr.index.ssa, nir_imm_int(b, array_stride))); + nir_iadd(b, offset, nir_imul_imm(b, d->arr.index.ssa, array_stride)); } /* Since the first source is a deref and the first source in the lowered @@ -569,7 +569,7 @@ r600_lower_shared_io_impl(nir_function *func) bool start_even = (writemask & (1u << (2 * i))); auto addr2 = - nir_iadd(&b, addr, nir_imm_int(&b, 8 * i + (start_even ? 0 : 4))); + nir_iadd_imm(&b, addr, 8 * i + (start_even ? 0 : 4)); store->src[1] = nir_src_for_ssa(addr2); nir_builder_instr_insert(&b, &store->instr); diff --git a/src/gallium/drivers/r600/sfn/sfn_nir_lower_tess_io.cpp b/src/gallium/drivers/r600/sfn/sfn_nir_lower_tess_io.cpp index 052c3df..785b187 100644 --- a/src/gallium/drivers/r600/sfn/sfn_nir_lower_tess_io.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_nir_lower_tess_io.cpp @@ -131,7 +131,7 @@ emil_lsd_in_addr(nir_builder *b, auto idx2 = nir_src_as_const_value(op->src[1]); if (!idx2 || idx2->u32 != 0) - offset = nir_iadd(b, nir_ishl(b, op->src[1].ssa, nir_imm_int(b, 4)), offset); + offset = nir_iadd(b, nir_ishl_imm(b, op->src[1].ssa, 4), offset); return nir_iadd(b, addr, offset); } @@ -150,11 +150,11 @@ emil_lsd_out_addr(nir_builder *b, nir_ssa_def *addr2 = r600_umad_24(b, nir_channel(b, base, 1), op->src[src_offset].ssa, addr1); int offset = get_tcs_varying_offset(op); - return nir_iadd(b, - nir_iadd(b, - addr2, - nir_ishl(b, op->src[src_offset + 1].ssa, nir_imm_int(b, 4))), - nir_imm_int(b, offset)); + return nir_iadd_imm(b, + nir_iadd(b, + addr2, + nir_ishl_imm(b, op->src[src_offset + 1].ssa, 4)), + offset); } static nir_ssa_def * @@ -261,7 +261,7 @@ replace_load_instr(nir_builder *b, nir_intrinsic_instr *op, nir_ssa_def *addr) nir_ssa_def *addr_outer = nir_iadd(b, addr, load_offset_group_from_mask(b, mask)); if (nir_intrinsic_component(op)) addr_outer = - nir_iadd(b, addr_outer, nir_imm_int(b, 4 * nir_intrinsic_component(op))); + nir_iadd_imm(b, addr_outer, 4 * nir_intrinsic_component(op)); auto new_load = nir_load_local_shared_r600(b, 32, addr_outer); @@ -311,7 +311,7 @@ emit_store_lds(nir_builder *b, nir_intrinsic_instr *op, nir_ssa_def *addr) store_tcs_out->num_components = store_tcs_out->src[0].ssa->num_components; bool start_even = (orig_writemask & (1u << (2 * i))); - auto addr2 = nir_iadd(b, addr, nir_imm_int(b, 8 * i + (start_even ? 0 : 4))); + auto addr2 = nir_iadd_imm(b, addr, 8 * i + (start_even ? 0 : 4)); store_tcs_out->src[1] = nir_src_for_ssa(addr2); nir_builder_instr_insert(b, &store_tcs_out->instr); @@ -325,11 +325,11 @@ emil_tcs_io_offset(nir_builder *b, int src_offset) { int offset = get_tcs_varying_offset(op); - return nir_iadd(b, - nir_iadd(b, - addr, - nir_ishl(b, op->src[src_offset].ssa, nir_imm_int(b, 4))), - nir_imm_int(b, offset)); + return nir_iadd_imm(b, + nir_iadd(b, + addr, + nir_ishl_imm(b, op->src[src_offset].ssa, 4)), + offset); } inline unsigned @@ -593,19 +593,19 @@ r600_append_tcs_TF_emission(nir_shader *shader, enum mesa_prim prim_type) out_addr0, nir_channel(b, &tf_outer->dest.ssa, chanx))); - tf_out.push_back(nir_vec2(b, nir_iadd(b, out_addr0, nir_imm_int(b, 4)), + tf_out.push_back(nir_vec2(b, nir_iadd_imm(b, out_addr0, 4), nir_channel(b, &tf_outer->dest.ssa, chany))); if (outer_comps > 2) { tf_out.push_back(nir_vec2(b, - nir_iadd(b, out_addr0, nir_imm_int(b, 8)), + nir_iadd_imm(b, out_addr0, 8), nir_channel(b, &tf_outer->dest.ssa, 2))); } if (outer_comps > 3) { tf_out.push_back(nir_vec2(b, - nir_iadd(b, out_addr0, nir_imm_int(b, 12)), + nir_iadd_imm(b, out_addr0, 12), nir_channel(b, &tf_outer->dest.ssa, 3))); inner_base = 16; @@ -622,13 +622,13 @@ r600_append_tcs_TF_emission(nir_shader *shader, enum mesa_prim prim_type) nir_builder_instr_insert(b, &tf_inner->instr); tf_out.push_back(nir_vec2(b, - nir_iadd(b, out_addr0, nir_imm_int(b, inner_base)), + nir_iadd_imm(b, out_addr0, inner_base), nir_channel(b, &tf_inner->dest.ssa, 0))); if (inner_comps > 1) { tf_out.push_back(nir_vec2(b, - nir_iadd(b, out_addr0, nir_imm_int(b, inner_base + 4)), + nir_iadd_imm(b, out_addr0, inner_base + 4), nir_channel(b, &tf_inner->dest.ssa, 1))); } -- 2.7.4