From f281de885ec9417a6d3ae702d0ed5acab6396bee Mon Sep 17 00:00:00 2001 From: Atish Patra Date: Fri, 3 Apr 2020 11:13:08 -0700 Subject: [PATCH] lib: irqchip/plic: Fix maximum priority threshold value As per the PLIC specification, maximum priority threshold value is 0x7. Even though, writing a higher value doesn't cause any error in qemu hifive unleashed, there may be some implementation which checks the upper and may result in an illegal access. Signed-off-by: Atish Patra Reviewed-by: Bin Meng Reviewed-by: Anup Patel --- lib/utils/irqchip/plic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c index 40c4170..7c40d28 100644 --- a/lib/utils/irqchip/plic.c +++ b/lib/utils/irqchip/plic.c @@ -66,11 +66,11 @@ int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id) /* By default, disable M-mode threshold */ if (m_cntx_id > -1) - plic_set_thresh(m_cntx_id, 0xffffffff); + plic_set_thresh(m_cntx_id, 0x7); /* By default, disable S-mode threshold */ if (s_cntx_id > -1) - plic_set_thresh(s_cntx_id, 0xffffffff); + plic_set_thresh(s_cntx_id, 0x7); return 0; } -- 2.7.4