From f1a71b5949069315a7f530e989f863f9c19d59f8 Mon Sep 17 00:00:00 2001 From: Vedant Kumar Date: Thu, 16 Apr 2020 15:23:57 -0700 Subject: [PATCH] [GIsel][LegalizerHelper] Account for debug insts when creating mem libcalls [5/14] Summary: While lowering memory intrinsics, GIsel attempts to form a tail call to a library routine. There might be a DBG_LABEL or something after the intrinsic call, though: in that case, GIsel should still be able to form the tail call, and should also delete the debug insts after the tail call as the transform makes them invalid. Reviewers: dsanders, aemerson Subscribers: hiraditya, aprantl, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D78335 --- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 23 +++++---- .../AArch64/GlobalISel/legalize-memcpy-et-al.mir | 1 + .../GlobalISel/legalize-memcpy-with-debug-info.mir | 59 ++++++++++++++++++++++ 3 files changed, 73 insertions(+), 10 deletions(-) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp index 2a9cef2..47c723c 100644 --- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -462,7 +462,8 @@ static RTLIB::Libcall getRTLibDesc(unsigned Opcode, unsigned Size) { /// True if an instruction is in tail position in its caller. Intended for /// legalizing libcalls as tail calls when possible. static bool isLibCallInTailPosition(MachineInstr &MI) { - const Function &F = MI.getParent()->getParent()->getFunction(); + MachineBasicBlock &MBB = *MI.getParent(); + const Function &F = MBB.getParent()->getFunction(); // Conservatively require the attributes of the call to match those of // the return. Ignore NoAlias and NonNull because they don't affect the @@ -481,8 +482,8 @@ static bool isLibCallInTailPosition(MachineInstr &MI) { // Only tail call if the following instruction is a standard return. auto &TII = *MI.getMF()->getSubtarget().getInstrInfo(); - MachineInstr *Next = MI.getNextNode(); - if (!Next || TII.isTailCall(*Next) || !Next->isReturn()) + auto Next = next_nodbg(MI.getIterator(), MBB.instr_end()); + if (Next == MBB.instr_end() || TII.isTailCall(*Next) || !Next->isReturn()) return false; return true; @@ -584,14 +585,16 @@ llvm::createMemLibcall(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, if (Info.LoweredTailCall) { assert(Info.IsTailCall && "Lowered tail call when it wasn't a tail call?"); - // We must have a return following the call to get past + // We must have a return following the call (or debug insts) to get past // isLibCallInTailPosition. - assert(MI.getNextNode() && MI.getNextNode()->isReturn() && - "Expected instr following MI to be a return?"); - - // We lowered a tail call, so the call is now the return from the block. - // Delete the old return. - MI.getNextNode()->eraseFromParent(); + do { + MachineInstr *Next = MI.getNextNode(); + assert(Next && (Next->isReturn() || Next->isDebugInstr()) && + "Expected instr following MI to be return or debug inst?"); + // We lowered a tail call, so the call is now the return from the block. + // Delete the old return. + Next->eraseFromParent(); + } while (MI.getNextNode()); } return LegalizerHelper::Legalized; diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir index 5175f33..60d7e70 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir @@ -1,5 +1,6 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -march=aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s +# RUN: llc -debugify-and-strip-all-safe -march=aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s --- name: test_memcpy tracksRegLiveness: true diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir new file mode 100644 index 0000000..13d97f8 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir @@ -0,0 +1,59 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -debugify-and-strip-all-safe=0 -march=aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -implicit-check-not=DBG_VALUE + +--- | + target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" + + define void @test_memcpy_tail() !dbg !11 { + entry: + call void @llvm.dbg.value(metadata i32 0, metadata !13, metadata !DIExpression()), !dbg !14 + unreachable, !dbg !14 + } + + ; Function Attrs: nounwind readnone speculatable willreturn + declare void @llvm.dbg.value(metadata, metadata, metadata) #0 + + attributes #0 = { nounwind readnone speculatable willreturn } + + !llvm.dbg.cu = !{!0} + !llvm.debugify = !{!3, !3} + !llvm.module.flags = !{!4} + + !0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2) + !1 = !DIFile(filename: "/Users/vsk/src/llvm-backup-master/llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir", directory: "/") + !2 = !{} + !3 = !{i32 6} + !4 = !{i32 2, !"Debug Info Version", i32 3} + !6 = !DISubroutineType(types: !2) + !9 = !DIBasicType(name: "ty32", size: 32, encoding: DW_ATE_unsigned) + !11 = distinct !DISubprogram(name: "test_memcpy_tail", linkageName: "test_memcpy_tail", scope: null, file: !1, line: 2, type: !6, scopeLine: 2, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !12) + !12 = !{!13} + !13 = !DILocalVariable(name: "2", scope: !11, file: !1, line: 2, type: !9) + !14 = !DILocation(line: 2, column: 1, scope: !11) + +... +--- +name: test_memcpy_tail +body: | + bb.0: + liveins: $w2, $x0, $x1 + + ; CHECK-LABEL: name: test_memcpy_tail + ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0, debug-location !10 + ; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1, debug-location !DILocation(line: 3, column: 1, scope: !5) + ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2, debug-location !DILocation(line: 4, column: 1, scope: !5) + ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY2]](s32), debug-location !DILocation(line: 5, column: 1, scope: !5) + ; CHECK: $x0 = COPY [[COPY]](p0) + ; CHECK: $x1 = COPY [[COPY1]](p0) + ; CHECK: $x2 = COPY [[ZEXT]](s64) + ; CHECK: TCRETURNdi &memcpy, 0, csr_aarch64_aapcs, implicit $sp, implicit $x0, implicit $x1, implicit $x2 + %0:_(p0) = COPY $x0, debug-location !14 + %1:_(p0) = COPY $x1, debug-location !DILocation(line: 3, column: 1, scope: !11) + %2:_(s32) = COPY $w2, debug-location !DILocation(line: 4, column: 1, scope: !11) + %3:_(s64) = G_ZEXT %2(s32), debug-location !DILocation(line: 5, column: 1, scope: !11) + G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.memcpy), %0(p0), %1(p0), %3(s64), 1, debug-location !DILocation(line: 6, column: 1, scope: !11) + DBG_VALUE 0, $noreg, !13, !DIExpression(), debug-location !DILocation(line: 6, column: 1, scope: !11) + DBG_VALUE 0, $noreg, !13, !DIExpression(), debug-location !DILocation(line: 6, column: 1, scope: !11) + RET_ReallyLR debug-location !DILocation(line: 7, column: 1, scope: !11) + +... -- 2.7.4