From f134a25ee8c29646f35f7e466109f6a7f5b9e824 Mon Sep 17 00:00:00 2001 From: Andrew Stubbs Date: Fri, 5 Aug 2022 13:28:50 +0100 Subject: [PATCH] omp-simd-clone: Allow fixed-lane vectors The vecsize_int/vecsize_float has an assumption that all arguments will use the same bitsize, and vary the number of lanes according to the element size, but this is inappropriate on targets where the number of lanes is fixed and the bitsize varies (i.e. amdgcn). With this change the vecsize can be left zero and the vectorization factor will be the same for all types. gcc/ChangeLog: * doc/tm.texi: Regenerate. * omp-simd-clone.cc (simd_clone_adjust_return_type): Allow zero vecsize. (simd_clone_adjust_argument_types): Likewise. * target.def (compute_vecsize_and_simdlen): Document the new vecsize_int and vecsize_float semantics. --- gcc/doc/tm.texi | 3 +++ gcc/omp-simd-clone.cc | 20 +++++++++++++++----- gcc/target.def | 3 +++ 3 files changed, 21 insertions(+), 5 deletions(-) diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 92bda1a..c3001c6 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -6253,6 +6253,9 @@ stores. This hook should set @var{vecsize_mangle}, @var{vecsize_int}, @var{vecsize_float} fields in @var{simd_clone} structure pointed by @var{clone_info} argument and also @var{simdlen} field if it was previously 0. +@var{vecsize_mangle} is a marker for the backend only. @var{vecsize_int} and +@var{vecsize_float} should be left zero on targets where the number of lanes is +not determined by the bitsize (in which case @var{simdlen} is always used). The hook should return 0 if SIMD clones shouldn't be emitted, or number of @var{vecsize_mangle} variants that should be emitted. @end deftypefn diff --git a/gcc/omp-simd-clone.cc b/gcc/omp-simd-clone.cc index 58bd68b..68ee4c2 100644 --- a/gcc/omp-simd-clone.cc +++ b/gcc/omp-simd-clone.cc @@ -504,7 +504,10 @@ simd_clone_adjust_return_type (struct cgraph_node *node) veclen = node->simdclone->vecsize_int; else veclen = node->simdclone->vecsize_float; - veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t))); + if (known_eq (veclen, 0)) + veclen = node->simdclone->simdlen; + else + veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t))); if (multiple_p (veclen, node->simdclone->simdlen)) veclen = node->simdclone->simdlen; if (POINTER_TYPE_P (t)) @@ -618,8 +621,12 @@ simd_clone_adjust_argument_types (struct cgraph_node *node) veclen = sc->vecsize_int; else veclen = sc->vecsize_float; - veclen = exact_div (veclen, - GET_MODE_BITSIZE (SCALAR_TYPE_MODE (parm_type))); + if (known_eq (veclen, 0)) + veclen = sc->simdlen; + else + veclen + = exact_div (veclen, + GET_MODE_BITSIZE (SCALAR_TYPE_MODE (parm_type))); if (multiple_p (veclen, sc->simdlen)) veclen = sc->simdlen; adj.op = IPA_PARAM_OP_NEW; @@ -669,8 +676,11 @@ simd_clone_adjust_argument_types (struct cgraph_node *node) veclen = sc->vecsize_int; else veclen = sc->vecsize_float; - veclen = exact_div (veclen, - GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type))); + if (known_eq (veclen, 0)) + veclen = sc->simdlen; + else + veclen = exact_div (veclen, + GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type))); if (multiple_p (veclen, sc->simdlen)) veclen = sc->simdlen; if (sc->mask_mode != VOIDmode) diff --git a/gcc/target.def b/gcc/target.def index 2a7fa68..4d49ffc 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -1629,6 +1629,9 @@ DEFHOOK "This hook should set @var{vecsize_mangle}, @var{vecsize_int}, @var{vecsize_float}\n\ fields in @var{simd_clone} structure pointed by @var{clone_info} argument and also\n\ @var{simdlen} field if it was previously 0.\n\ +@var{vecsize_mangle} is a marker for the backend only. @var{vecsize_int} and\n\ +@var{vecsize_float} should be left zero on targets where the number of lanes is\n\ +not determined by the bitsize (in which case @var{simdlen} is always used).\n\ The hook should return 0 if SIMD clones shouldn't be emitted,\n\ or number of @var{vecsize_mangle} variants that should be emitted.", int, (struct cgraph_node *, struct cgraph_simd_clone *, tree, int), NULL) -- 2.7.4