From f0fcc327e33341648b7cec9526e1cbd2489b5330 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 21 Dec 2023 20:13:56 -0500 Subject: [PATCH] sim: riscv: fix -Wshadow=local warnings Inline the one usage of sd in these macros to avoid possible shadowing. --- sim/riscv/sim-main.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c index 4d20534..b04d12c 100644 --- a/sim/riscv/sim-main.c +++ b/sim/riscv/sim-main.c @@ -48,10 +48,9 @@ static const struct riscv_opcode *riscv_hash[OP_MASK_OP + 1]; do { \ if (RISCV_XLEN (cpu) != 32) \ { \ - SIM_DESC sd = CPU_STATE (cpu); \ TRACE_INSN (cpu, "RV32I-only " fmt, ## args); \ - sim_engine_halt (sd, cpu, NULL, sim_pc_get (cpu), sim_signalled, \ - SIM_SIGILL); \ + sim_engine_halt (CPU_STATE (cpu), cpu, NULL, sim_pc_get (cpu), \ + sim_signalled, SIM_SIGILL); \ } \ } while (0) @@ -59,10 +58,9 @@ static const struct riscv_opcode *riscv_hash[OP_MASK_OP + 1]; do { \ if (RISCV_XLEN (cpu) != 64) \ { \ - SIM_DESC sd = CPU_STATE (cpu); \ TRACE_INSN (cpu, "RV64I-only " fmt, ## args); \ - sim_engine_halt (sd, cpu, NULL, sim_pc_get (cpu), sim_signalled, \ - SIM_SIGILL); \ + sim_engine_halt (CPU_STATE (cpu), cpu, NULL, sim_pc_get (cpu), \ + sim_signalled, SIM_SIGILL); \ } \ } while (0) -- 2.7.4