From f036549f29a32fbd29a545b1aa568fcd065d88ab Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Wed, 6 Jan 2021 18:23:08 +0530 Subject: [PATCH] ARM: dts: qcom: sdx55: Add support for SDHCI controller Add devicetree support for SDHCI controller found in Qualcomm SDX55 platform. The SDHCI controller is based on the MSM SDHCI v5 IP. Hence, the support is added by reusing the existing sdhci driver with "qcom,sdhci-msm-v5" as the fallback. Signed-off-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/20210106125322.61840-5-manivannan.sadhasivam@linaro.org [bjorn: added include of qcom,gcc-sdx55.h] Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom-sdx55.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index 3698c2f..781a4ec 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -6,6 +6,7 @@ * Copyright (c) 2020, Linaro Ltd. */ +#include #include #include #include @@ -130,6 +131,18 @@ status = "disabled"; }; + sdhc_1: sdhci@8804000 { + compatible = "qcom,sdx55-sdhci", "qcom,sdhci-msm-v5"; + reg = <0x08804000 0x1000>; + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>; + clock-names = "iface", "core"; + status = "disabled"; + }; + pdc: interrupt-controller@b210000 { compatible = "qcom,sdx55-pdc", "qcom,pdc"; reg = <0x0b210000 0x30000>; -- 2.7.4