From f02c733649547efe0d623b9b18d9af18ccfc73a1 Mon Sep 17 00:00:00 2001 From: Xiaojian Du Date: Thu, 24 Dec 2020 16:11:33 +0800 Subject: [PATCH] drm/amd/pm: enable the "fetch" function of pp_dpm_vclk/dclk for vangogh This patch is to enable the "fetch" function of pp_dpm_vclk and pp_dpm_dclk. It allows to fetch the current frequency of vcn and dcn and their DPM levels for vangogh. Signed-off-by: Xiaojian Du Acked-by: Evan Quan Signed-off-by: Alex Deucher --- .../gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h | 1 - drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 34 +++++++++++++++++++--- 2 files changed, 30 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h b/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h index 1c19eae..6e23a3f 100644 --- a/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h +++ b/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h @@ -141,7 +141,6 @@ typedef struct { uint32_t MaxGfxClk; uint8_t NumDfPstatesEnabled; - uint8_t NumDpmLevelsEnabled; uint8_t NumDcfclkLevelsEnabled; uint8_t NumDispClkLevelsEnabled; //applies to both dispclk and dppclk uint8_t NumSocClkLevelsEnabled; diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c index 085e633..f01b2a9 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c @@ -249,6 +249,12 @@ static int vangogh_get_smu_metrics_data(struct smu_context *smu, case METRICS_AVERAGE_SOCCLK: *value = metrics->SocclkFrequency; break; + case METRICS_AVERAGE_VCLK: + *value = metrics->VclkFrequency; + break; + case METRICS_AVERAGE_DCLK: + *value = metrics->DclkFrequency; + break; case METRICS_AVERAGE_UCLK: *value = metrics->MemclkFrequency; break; @@ -434,6 +440,16 @@ static int vangogh_get_dpm_clk_limited(struct smu_context *smu, enum smu_clk_typ return -EINVAL; *freq = clk_table->SocClocks[dpm_level]; break; + case SMU_VCLK: + if (dpm_level >= clk_table->VcnClkLevelsEnabled) + return -EINVAL; + *freq = clk_table->VcnClocks[dpm_level].vclk; + break; + case SMU_DCLK: + if (dpm_level >= clk_table->VcnClkLevelsEnabled) + return -EINVAL; + *freq = clk_table->VcnClocks[dpm_level].dclk; + break; case SMU_UCLK: case SMU_MCLK: if (dpm_level >= clk_table->NumDfPstatesEnabled) @@ -486,10 +502,18 @@ static int vangogh_print_fine_grain_clk(struct smu_context *smu, } break; case SMU_SOCCLK: - /* the level 3 ~ 6 of socclk use the same frequency for vangogh */ - count = clk_table->NumSocClkLevelsEnabled; - cur_value = metrics.SocclkFrequency; - break; + /* the level 3 ~ 6 of socclk use the same frequency for vangogh */ + count = clk_table->NumSocClkLevelsEnabled; + cur_value = metrics.SocclkFrequency; + break; + case SMU_VCLK: + count = clk_table->VcnClkLevelsEnabled; + cur_value = metrics.VclkFrequency; + break; + case SMU_DCLK: + count = clk_table->VcnClkLevelsEnabled; + cur_value = metrics.DclkFrequency; + break; case SMU_MCLK: count = clk_table->NumDfPstatesEnabled; cur_value = metrics.MemclkFrequency; @@ -506,6 +530,8 @@ static int vangogh_print_fine_grain_clk(struct smu_context *smu, switch (clk_type) { case SMU_SOCCLK: + case SMU_VCLK: + case SMU_DCLK: case SMU_MCLK: case SMU_FCLK: for (i = 0; i < count; i++) { -- 2.7.4