From ef5e7f90ea4d5063ce68b952c5de473e610afc02 Mon Sep 17 00:00:00 2001 From: Fangrui Song Date: Thu, 22 Apr 2021 10:18:44 -0700 Subject: [PATCH] Temporarily revert the code part of D100981 "Delete le32/le64 targets" This partially reverts commit 77ac823fd285973cfb3517932c09d82e6a32f46d. Halide uses le32/le64 (https://github.com/halide/Halide/pull/5934). Temporarily brings back the code part to give them some time for migration. --- clang/lib/Basic/CMakeLists.txt | 1 + clang/lib/Basic/Targets.cpp | 12 +++++ clang/lib/Basic/Targets/Le64.cpp | 37 ++++++++++++++ clang/lib/Basic/Targets/Le64.h | 63 ++++++++++++++++++++++++ clang/lib/Basic/Targets/OSTargets.h | 6 ++- clang/lib/CodeGen/ItaniumCXXABI.cpp | 7 +++ clang/lib/CodeGen/TargetInfo.cpp | 2 + clang/lib/Driver/ToolChains/Clang.cpp | 6 +++ llvm/include/llvm/ADT/Triple.h | 2 + llvm/lib/Support/Triple.cpp | 21 ++++++++ llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn | 1 + 11 files changed, 156 insertions(+), 2 deletions(-) create mode 100644 clang/lib/Basic/Targets/Le64.cpp create mode 100644 clang/lib/Basic/Targets/Le64.h diff --git a/clang/lib/Basic/CMakeLists.txt b/clang/lib/Basic/CMakeLists.txt index 4199d4d..a3a8f8d 100644 --- a/clang/lib/Basic/CMakeLists.txt +++ b/clang/lib/Basic/CMakeLists.txt @@ -77,6 +77,7 @@ add_clang_library(clangBasic Targets/BPF.cpp Targets/Hexagon.cpp Targets/Lanai.cpp + Targets/Le64.cpp Targets/M68k.cpp Targets/MSP430.cpp Targets/Mips.cpp diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 685700f..8df5cb7 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -21,6 +21,7 @@ #include "Targets/BPF.h" #include "Targets/Hexagon.h" #include "Targets/Lanai.h" +#include "Targets/Le64.h" #include "Targets/M68k.h" #include "Targets/MSP430.h" #include "Targets/Mips.h" @@ -313,6 +314,17 @@ TargetInfo *AllocateTarget(const llvm::Triple &Triple, return new M68kTargetInfo(Triple, Opts); } + case llvm::Triple::le32: + switch (os) { + case llvm::Triple::NaCl: + return new NaClTargetInfo(Triple, Opts); + default: + return nullptr; + } + + case llvm::Triple::le64: + return new Le64TargetInfo(Triple, Opts); + case llvm::Triple::ppc: if (Triple.isOSDarwin()) return new DarwinPPC32TargetInfo(Triple, Opts); diff --git a/clang/lib/Basic/Targets/Le64.cpp b/clang/lib/Basic/Targets/Le64.cpp new file mode 100644 index 0000000..498dd33 --- /dev/null +++ b/clang/lib/Basic/Targets/Le64.cpp @@ -0,0 +1,37 @@ +//===--- Le64.cpp - Implement Le64 target feature support -----------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements Le64 TargetInfo objects. +// +//===----------------------------------------------------------------------===// + +#include "Le64.h" +#include "Targets.h" +#include "clang/Basic/Builtins.h" +#include "clang/Basic/MacroBuilder.h" +#include "clang/Basic/TargetBuiltins.h" + +using namespace clang; +using namespace clang::targets; + +const Builtin::Info Le64TargetInfo::BuiltinInfo[] = { +#define BUILTIN(ID, TYPE, ATTRS) \ + {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr}, +#include "clang/Basic/BuiltinsLe64.def" +}; + +ArrayRef Le64TargetInfo::getTargetBuiltins() const { + return {}; +} + +void Le64TargetInfo::getTargetDefines(const LangOptions &Opts, + MacroBuilder &Builder) const { + DefineStd(Builder, "unix", Opts); + defineCPUMacros(Builder, "le64", /*Tuning=*/false); + Builder.defineMacro("__ELF__"); +} diff --git a/clang/lib/Basic/Targets/Le64.h b/clang/lib/Basic/Targets/Le64.h new file mode 100644 index 0000000..253d568 --- /dev/null +++ b/clang/lib/Basic/Targets/Le64.h @@ -0,0 +1,63 @@ +//===--- Le64.h - Declare Le64 target feature support -----------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file declares Le64 TargetInfo objects. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H +#define LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H + +#include "clang/Basic/TargetInfo.h" +#include "clang/Basic/TargetOptions.h" +#include "llvm/ADT/Triple.h" +#include "llvm/Support/Compiler.h" + +namespace clang { +namespace targets { + +class LLVM_LIBRARY_VISIBILITY Le64TargetInfo : public TargetInfo { + static const Builtin::Info BuiltinInfo[]; + +public: + Le64TargetInfo(const llvm::Triple &Triple, const TargetOptions &) + : TargetInfo(Triple) { + NoAsmVariants = true; + LongWidth = LongAlign = PointerWidth = PointerAlign = 64; + MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; + resetDataLayout("e-m:e-v128:32-v16:16-v32:32-v96:32-n8:16:32:64-S128"); + } + + void getTargetDefines(const LangOptions &Opts, + MacroBuilder &Builder) const override; + + ArrayRef getTargetBuiltins() const override; + + BuiltinVaListKind getBuiltinVaListKind() const override { + return TargetInfo::PNaClABIBuiltinVaList; + } + + const char *getClobbers() const override { return ""; } + + ArrayRef getGCCRegNames() const override { return None; } + + ArrayRef getGCCRegAliases() const override { + return None; + } + + bool validateAsmConstraint(const char *&Name, + TargetInfo::ConstraintInfo &Info) const override { + return false; + } + + bool hasProtectedVisibility() const override { return false; } +}; + +} // namespace targets +} // namespace clang +#endif // LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h index 0ace21a..6e757ad 100644 --- a/clang/lib/Basic/Targets/OSTargets.h +++ b/clang/lib/Basic/Targets/OSTargets.h @@ -866,9 +866,11 @@ public: } else if (Triple.getArch() == llvm::Triple::x86_64) { this->resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-" "i64:64-n8:16:32:64-S128"); - } else { - assert(Triple.getArch() == llvm::Triple::mipsel); + } else if (Triple.getArch() == llvm::Triple::mipsel) { // Handled on mips' setDataLayout. + } else { + assert(Triple.getArch() == llvm::Triple::le32); + this->resetDataLayout("e-p:32:32-i64:64"); } } }; diff --git a/clang/lib/CodeGen/ItaniumCXXABI.cpp b/clang/lib/CodeGen/ItaniumCXXABI.cpp index 3d370c6..93500cb 100644 --- a/clang/lib/CodeGen/ItaniumCXXABI.cpp +++ b/clang/lib/CodeGen/ItaniumCXXABI.cpp @@ -577,6 +577,13 @@ CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule &CGM) { return new XLCXXABI(CGM); case TargetCXXABI::GenericItanium: + if (CGM.getContext().getTargetInfo().getTriple().getArch() + == llvm::Triple::le32) { + // For PNaCl, use ARM-style method pointers so that PNaCl code + // does not assume anything about the alignment of function + // pointers. + return new ItaniumCXXABI(CGM, /*UseARMMethodPtrABI=*/true); + } return new ItaniumCXXABI(CGM); case TargetCXXABI::Microsoft: diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp index eaa535a..3e0a269 100644 --- a/clang/lib/CodeGen/TargetInfo.cpp +++ b/clang/lib/CodeGen/TargetInfo.cpp @@ -10970,6 +10970,8 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { default: return SetCGInfo(new DefaultTargetCodeGenInfo(Types)); + case llvm::Triple::le32: + return SetCGInfo(new PNaClTargetCodeGenInfo(Types)); case llvm::Triple::m68k: return SetCGInfo(new M68kTargetCodeGenInfo(Types)); case llvm::Triple::mips: diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index 4e9f72f..7755e9f 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -3351,6 +3351,12 @@ static void RenderBuiltinOptions(const ToolChain &TC, const llvm::Triple &T, StringRef FuncName = Arg->getValue(); CmdArgs.push_back(Args.MakeArgString("-fno-builtin-" + FuncName)); } + + // le32-specific flags: + // -fno-math-builtin: clang should not convert math builtins to intrinsics + // by default. + if (TC.getArch() == llvm::Triple::le32) + CmdArgs.push_back("-fno-math-builtin"); } bool Driver::getDefaultModuleCachePath(SmallVectorImpl &Result) { diff --git a/llvm/include/llvm/ADT/Triple.h b/llvm/include/llvm/ADT/Triple.h index 92e33e8..b6a6fe6 100644 --- a/llvm/include/llvm/ADT/Triple.h +++ b/llvm/include/llvm/ADT/Triple.h @@ -85,6 +85,8 @@ public: xcore, // XCore: xcore nvptx, // NVPTX: 32-bit nvptx64, // NVPTX: 64-bit + le32, // le32: generic little-endian 32-bit CPU (PNaCl) + le64, // le64: generic little-endian 64-bit CPU (PNaCl) amdil, // AMDIL amdil64, // AMDIL with 64-bit pointers hsail, // AMD HSAIL diff --git a/llvm/lib/Support/Triple.cpp b/llvm/lib/Support/Triple.cpp index 007ece7..8831154 100644 --- a/llvm/lib/Support/Triple.cpp +++ b/llvm/lib/Support/Triple.cpp @@ -42,6 +42,8 @@ StringRef Triple::getArchTypeName(ArchType Kind) { case hsail: return "hsail"; case kalimba: return "kalimba"; case lanai: return "lanai"; + case le32: return "le32"; + case le64: return "le64"; case m68k: return "m68k"; case mips64: return "mips64"; case mips64el: return "mips64el"; @@ -134,6 +136,9 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) { case nvptx: return "nvvm"; case nvptx64: return "nvvm"; + case le32: return "le32"; + case le64: return "le64"; + case amdil: case amdil64: return "amdil"; @@ -310,6 +315,8 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) { .Case("xcore", xcore) .Case("nvptx", nvptx) .Case("nvptx64", nvptx64) + .Case("le32", le32) + .Case("le64", le64) .Case("amdil", amdil) .Case("amdil64", amdil64) .Case("hsail", hsail) @@ -441,6 +448,8 @@ static Triple::ArchType parseArch(StringRef ArchName) { .Case("xcore", Triple::xcore) .Case("nvptx", Triple::nvptx) .Case("nvptx64", Triple::nvptx64) + .Case("le32", Triple::le32) + .Case("le64", Triple::le64) .Case("amdil", Triple::amdil) .Case("amdil64", Triple::amdil64) .Case("hsail", Triple::hsail) @@ -700,6 +709,8 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) { case Triple::hsail: case Triple::kalimba: case Triple::lanai: + case Triple::le32: + case Triple::le64: case Triple::m68k: case Triple::mips64: case Triple::mips64el: @@ -1273,6 +1284,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) { case llvm::Triple::hsail: case llvm::Triple::kalimba: case llvm::Triple::lanai: + case llvm::Triple::le32: case llvm::Triple::m68k: case llvm::Triple::mips: case llvm::Triple::mipsel: @@ -1302,6 +1314,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) { case llvm::Triple::bpfeb: case llvm::Triple::bpfel: case llvm::Triple::hsail64: + case llvm::Triple::le64: case llvm::Triple::mips64: case llvm::Triple::mips64el: case llvm::Triple::nvptx64: @@ -1356,6 +1369,7 @@ Triple Triple::get32BitArchVariant() const { case Triple::hsail: case Triple::kalimba: case Triple::lanai: + case Triple::le32: case Triple::m68k: case Triple::mips: case Triple::mipsel: @@ -1383,6 +1397,7 @@ Triple Triple::get32BitArchVariant() const { case Triple::aarch64_be: T.setArch(Triple::armeb); break; case Triple::amdil64: T.setArch(Triple::amdil); break; case Triple::hsail64: T.setArch(Triple::hsail); break; + case Triple::le64: T.setArch(Triple::le32); break; case Triple::mips64: T.setArch(Triple::mips); break; case Triple::mips64el: T.setArch(Triple::mipsel); break; case Triple::nvptx64: T.setArch(Triple::nvptx); break; @@ -1426,6 +1441,7 @@ Triple Triple::get64BitArchVariant() const { case Triple::bpfeb: case Triple::bpfel: case Triple::hsail64: + case Triple::le64: case Triple::mips64: case Triple::mips64el: case Triple::nvptx64: @@ -1447,6 +1463,7 @@ Triple Triple::get64BitArchVariant() const { case Triple::arm: T.setArch(Triple::aarch64); break; case Triple::armeb: T.setArch(Triple::aarch64_be); break; case Triple::hsail: T.setArch(Triple::hsail64); break; + case Triple::le32: T.setArch(Triple::le64); break; case Triple::mips: T.setArch(Triple::mips64); break; case Triple::mipsel: T.setArch(Triple::mips64el); break; case Triple::nvptx: T.setArch(Triple::nvptx64); break; @@ -1479,6 +1496,8 @@ Triple Triple::getBigEndianArchVariant() const { case Triple::hsail64: case Triple::hsail: case Triple::kalimba: + case Triple::le32: + case Triple::le64: case Triple::msp430: case Triple::nvptx64: case Triple::nvptx: @@ -1567,6 +1586,8 @@ bool Triple::isLittleEndian() const { case Triple::hsail64: case Triple::hsail: case Triple::kalimba: + case Triple::le32: + case Triple::le64: case Triple::mips64el: case Triple::mipsel: case Triple::msp430: diff --git a/llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn b/llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn index 28f9ed2..243399c 100644 --- a/llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn +++ b/llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn @@ -93,6 +93,7 @@ static_library("Basic") { "Targets/BPF.cpp", "Targets/Hexagon.cpp", "Targets/Lanai.cpp", + "Targets/Le64.cpp", "Targets/M68k.cpp", "Targets/MSP430.cpp", "Targets/Mips.cpp", -- 2.7.4