From ef3eecd66bdcaa3991dd2b53cb3e7285bed6d718 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Mon, 6 May 2019 11:58:07 -0700 Subject: [PATCH] freedreno/ir3: move ir3_pointer_size() Move to ir3_compiler so it doesn't depend on the compile context. Prep work for moving constant state from variant (where we have compile context) to shader (where we do not). Signed-off-by: Rob Clark --- src/freedreno/ir3/ir3_compiler.h | 7 +++++++ src/freedreno/ir3/ir3_compiler_nir.c | 2 +- src/freedreno/ir3/ir3_context.c | 2 +- src/freedreno/ir3/ir3_context.h | 7 ------- 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/src/freedreno/ir3/ir3_compiler.h b/src/freedreno/ir3/ir3_compiler.h index efe6f1e..e46bdc2 100644 --- a/src/freedreno/ir3/ir3_compiler.h +++ b/src/freedreno/ir3/ir3_compiler.h @@ -74,6 +74,13 @@ struct ir3_compiler * ir3_compiler_create(struct fd_device *dev, uint32_t gpu_id int ir3_compile_shader_nir(struct ir3_compiler *compiler, struct ir3_shader_variant *so); +/* gpu pointer size in units of 32bit registers/slots */ +static inline +unsigned ir3_pointer_size(struct ir3_compiler *compiler) +{ + return (compiler->gpu_id >= 500) ? 2 : 1; +} + enum ir3_shader_debug { IR3_DBG_SHADER_VS = 0x01, IR3_DBG_SHADER_FS = 0x02, diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index f1d9b53..7a3b4a1 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -684,7 +684,7 @@ emit_intrinsic_load_ubo(struct ir3_context *ctx, nir_intrinsic_instr *intr, * account for nir_lower_uniforms_to_ubo rebasing the UBOs such that UBO 0 * is the uniforms: */ unsigned ubo = regid(ctx->so->constbase.ubo, 0) - 2; - const unsigned ptrsz = ir3_pointer_size(ctx); + const unsigned ptrsz = ir3_pointer_size(ctx->compiler); int off = 0; diff --git a/src/freedreno/ir3/ir3_context.c b/src/freedreno/ir3/ir3_context.c index da1e148..8c7d9a3 100644 --- a/src/freedreno/ir3/ir3_context.c +++ b/src/freedreno/ir3/ir3_context.c @@ -128,7 +128,7 @@ ir3_context_init(struct ir3_compiler *compiler, */ debug_assert((ctx->so->shader->ubo_state.size % 16) == 0); unsigned constoff = align(ctx->so->shader->ubo_state.size / 16, 4); - unsigned ptrsz = ir3_pointer_size(ctx); + unsigned ptrsz = ir3_pointer_size(ctx->compiler); memset(&so->constbase, ~0, sizeof(so->constbase)); diff --git a/src/freedreno/ir3/ir3_context.h b/src/freedreno/ir3/ir3_context.h index c3e16ba..26707b7 100644 --- a/src/freedreno/ir3/ir3_context.h +++ b/src/freedreno/ir3/ir3_context.h @@ -140,13 +140,6 @@ struct ir3_context * ir3_context_init(struct ir3_compiler *compiler, struct ir3_shader_variant *so); void ir3_context_free(struct ir3_context *ctx); -/* gpu pointer size in units of 32bit registers/slots */ -static inline -unsigned ir3_pointer_size(struct ir3_context *ctx) -{ - return (ctx->compiler->gpu_id >= 500) ? 2 : 1; -} - struct ir3_instruction ** ir3_get_dst_ssa(struct ir3_context *ctx, nir_ssa_def *dst, unsigned n); struct ir3_instruction ** ir3_get_dst(struct ir3_context *ctx, nir_dest *dst, unsigned n); struct ir3_instruction * const * ir3_get_src(struct ir3_context *ctx, nir_src *src); -- 2.7.4