From eeaccc07751f304cfe79fa5b7706264f6d56f5a5 Mon Sep 17 00:00:00 2001 From: Alan Lawrence Date: Wed, 25 Feb 2015 14:20:13 +0000 Subject: [PATCH] [AArch64] Fix illegal assembly 'eon v1, v2, v3' PR target/64997 * config/aarch64/aarch64.md (*xor_one_cmpl3): Use FP_REGNUM_P as split condition; force split via '#' in output pattern. From-SVN: r220969 --- gcc/ChangeLog | 6 ++++++ gcc/config/aarch64/aarch64.md | 6 ++++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d4304cd..1e2b609 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-02-25 Alan Lawrence + + PR target/64997 + * config/aarch64/aarch64.md (*xor_one_cmpl3): Use FP_REGNUM_P + as split condition; force split via '#' in output pattern. + 2015-02-25 Richard Biener Kai Tietz diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 8f157ce2..7103e0d 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -3065,8 +3065,10 @@ (not:GPI (xor:GPI (match_operand:GPI 1 "register_operand" "r,?w") (match_operand:GPI 2 "register_operand" "r,w"))))] "" - "eon\\t%0, %1, %2" ;; For GPR registers (only). - "reload_completed && (which_alternative == 1)" ;; For SIMD registers. + "@ + eon\\t%0, %1, %2 + #" + "reload_completed && FP_REGNUM_P (REGNO (operands[0]))" ;; For SIMD registers. [(set (match_operand:GPI 0 "register_operand" "=w") (xor:GPI (match_operand:GPI 1 "register_operand" "w") (match_operand:GPI 2 "register_operand" "w"))) -- 2.7.4