From ee9439704485a1e9413470fe2634b164fa31644f Mon Sep 17 00:00:00 2001 From: Ramana Radhakrishnan Date: Fri, 29 Jun 2018 13:06:05 +0100 Subject: [PATCH] [Patch AArch64] Warn on unpredictable stlxrb , stlxrh and stlxr cases. A recent case in golang highlighted that gas wasn't warning on these unpredictable cases in the architecture. Fixed thusly. I need to audit gcc to make sure we have early clobbers on the patterns but that's a separate patch. Tested aarch64-none-elf and gas Ok ? Ramana 2018-06-29 Ramana Radhakrishnan * config/tc-aarch64.c (warn_unpredictable_ldst): Add unpredictable cases for ldxp, stlxrb, stlxrh, stlxr. * testsuite/gas/aarch64/diagnostic.s: New tests. * testsuite/gas/aarch64/diagnostic.l: Adjust. --- gas/ChangeLog | 7 +++++++ gas/config/tc-aarch64.c | 16 ++++++++++++++++ gas/testsuite/gas/aarch64/diagnostic.l | 10 ++++++++++ gas/testsuite/gas/aarch64/diagnostic.s | 11 +++++++++++ 4 files changed, 44 insertions(+) diff --git a/gas/ChangeLog b/gas/ChangeLog index 1ad8cc5..e0cfe04 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2018-06-29 Ramana Radhakrishnan + + * config/tc-aarch64.c (warn_unpredictable_ldst): Add unpredictable + cases for ldxp, stlxrb, stlxrh, stlxr. + * testsuite/gas/aarch64/diagnostic.s: New tests. + * testsuite/gas/aarch64/diagnostic.l: Adjust. + 2018-06-29 Tamar Christina PR binutils/23192 diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index f8b2152..3198596 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -6705,6 +6705,22 @@ warn_unpredictable_ldst (aarch64_instruction *instr, char *str) && opnds[0].reg.regno == opnds[1].reg.regno) as_warn (_("unpredictable load of register pair -- `%s'"), str); break; + + case ldstexcl: + /* It is unpredictable if the destination and status registers are the + same. */ + if ((aarch64_get_operand_class (opnds[0].type) + == AARCH64_OPND_CLASS_INT_REG) + && (aarch64_get_operand_class (opnds[1].type) + == AARCH64_OPND_CLASS_INT_REG) + && (opnds[0].reg.regno == opnds[1].reg.regno + || opnds[0].reg.regno == opnds[2].reg.regno)) + as_warn (_("unpredictable: identical transfer and status registers" + " --`%s'"), + str); + + break; + default: break; } diff --git a/gas/testsuite/gas/aarch64/diagnostic.l b/gas/testsuite/gas/aarch64/diagnostic.l index 00bb512..6aae306 100644 --- a/gas/testsuite/gas/aarch64/diagnostic.l +++ b/gas/testsuite/gas/aarch64/diagnostic.l @@ -172,3 +172,13 @@ [^:]*:300: Warning: ignoring redefinition of register alias 'ip1' [^:]*:301: Warning: ignoring redefinition of register alias 'lr' [^:]*:302: Warning: ignoring redefinition of register alias 'fp' +[^:]*:304: Warning: unpredictable: identical transfer and status registers --`stlxrb w26,w26,\[x0\]' +[^:]*:305: Warning: unpredictable: identical transfer and status registers --`stlxrh w26,w26,\[x1\]' +[^:]*:306: Warning: unpredictable: identical transfer and status registers --`stlxr w26,w26,\[x2\]' +[^:]*:307: Warning: unpredictable: identical transfer and status registers --`stlxrb w26,w27,\[x26\]' +[^:]*:308: Warning: unpredictable: identical transfer and status registers --`stlxrh w26,w27,\[x26\]' +[^:]*:309: Warning: unpredictable: identical transfer and status registers --`stlxr w26,w27,\[x26\]' +[^:]*:310: Warning: unpredictable: identical transfer and status registers --`stlxr w26,x27,\[x26\]' +[^:]*:311: Warning: unpredictable: identical transfer and status registers --`stlxr w26,x26,\[x3\]' +[^:]*:312: Warning: unpredictable: identical transfer and status registers --`ldxp x26,x26,\[x5\]' +[^:]*:313: Warning: unpredictable: identical transfer and status registers --`ldxp x26,x1,\[x26\]' diff --git a/gas/testsuite/gas/aarch64/diagnostic.s b/gas/testsuite/gas/aarch64/diagnostic.s index a62327d..c18c48e 100644 --- a/gas/testsuite/gas/aarch64/diagnostic.s +++ b/gas/testsuite/gas/aarch64/diagnostic.s @@ -300,3 +300,14 @@ ip1 .req x1 lr .req x2 fp .req x3 + + stlxrb w26, w26, [x0] + stlxrh w26, w26, [x1] + stlxr w26, w26, [x2] + stlxrb w26, w27, [x26] + stlxrh w26, w27, [x26] + stlxr w26, w27, [x26] + stlxr w26, x27, [x26] + stlxr w26, x26, [x3] + ldxp x26, x26, [x5] + ldxp x26, x1, [x26] -- 2.7.4