From ed3912d0daae717d70af9c595f1c36d817d9ceec Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 8 Jul 2016 18:03:56 +0200 Subject: [PATCH] radeonsi: just save buffer sizes instead of buffers while recording IBs MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit whole buffer objects are not needed Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeon/r600_pipe_common.c | 5 ----- src/gallium/drivers/radeon/radeon_winsys.h | 2 +- src/gallium/drivers/radeonsi/si_debug.c | 4 ++-- src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 2 +- src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 2 +- 5 files changed, 5 insertions(+), 10 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index f75fa6c..cd4908f 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -367,12 +367,7 @@ oom: void radeon_clear_saved_cs(struct radeon_saved_cs *saved) { - unsigned i; - FREE(saved->ib); - - for (i = 0; i < saved->bo_count; i++) - pb_reference(&saved->bo_list[i].buf, NULL); FREE(saved->bo_list); memset(saved, 0, sizeof(*saved)); diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index de25e19..090cafc 100644 --- a/src/gallium/drivers/radeon/radeon_winsys.h +++ b/src/gallium/drivers/radeon/radeon_winsys.h @@ -414,7 +414,7 @@ struct radeon_surf { }; struct radeon_bo_list_item { - struct pb_buffer *buf; + uint64_t bo_size; uint64_t vm_address; uint64_t priority_usage; /* mask of (1 << RADEON_PRIO_*) */ }; diff --git a/src/gallium/drivers/radeonsi/si_debug.c b/src/gallium/drivers/radeonsi/si_debug.c index 220ce13..57a930f 100644 --- a/src/gallium/drivers/radeonsi/si_debug.c +++ b/src/gallium/drivers/radeonsi/si_debug.c @@ -609,13 +609,13 @@ static void si_dump_bo_list(struct si_context *sctx, /* Note: Buffer sizes are expected to be aligned to 4k by the winsys. */ const unsigned page_size = sctx->b.screen->info.gart_page_size; uint64_t va = saved->bo_list[i].vm_address; - uint64_t size = saved->bo_list[i].buf->size; + uint64_t size = saved->bo_list[i].bo_size; bool hit = false; /* If there's unused virtual memory between 2 buffers, print it. */ if (i) { uint64_t previous_va_end = saved->bo_list[i-1].vm_address + - saved->bo_list[i-1].buf->size; + saved->bo_list[i-1].bo_size; if (va > previous_va_end) { fprintf(f, " %10"PRIu64" -- hole --\n", diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index 740bfd1..1302f29 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c @@ -816,7 +816,7 @@ static unsigned amdgpu_cs_get_buffer_list(struct radeon_winsys_cs *rcs, if (list) { for (i = 0; i < cs->num_buffers; i++) { - pb_reference(&list[i].buf, &cs->buffers[i].bo->base); + list[i].bo_size = cs->buffers[i].bo->base.size; list[i].vm_address = cs->buffers[i].bo->va; list[i].priority_usage = cs->buffers[i].priority_usage; } diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c index aab6a78..ed34a2c 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c @@ -419,7 +419,7 @@ static unsigned radeon_drm_cs_get_buffer_list(struct radeon_winsys_cs *rcs, if (list) { for (i = 0; i < cs->csc->crelocs; i++) { - pb_reference(&list[i].buf, &cs->csc->relocs_bo[i].bo->base); + list[i].bo_size = cs->csc->relocs_bo[i].bo->base.size; list[i].vm_address = cs->csc->relocs_bo[i].bo->va; list[i].priority_usage = cs->csc->relocs_bo[i].priority_usage; } -- 2.7.4