From ecca1a6277aac10e40e4baba28adb893899b24b3 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 9 Aug 2019 16:40:33 +0200 Subject: [PATCH] net: lpc-enet: move phy setup into platform code Setting the phy mode requires touching a platform specific register, which prevents us from building the driver without its header files. Move it into a separate function in arch/arm/mach/lpc32xx to hide the core registers from the network driver. Link: https://lore.kernel.org/r/20190809144043.476786-8-arnd@arndb.de Acked-by: Sylvain Lemieux Signed-off-by: Arnd Bergmann --- arch/arm/mach-lpc32xx/common.c | 12 ++++++++++++ drivers/net/ethernet/nxp/lpc_eth.c | 12 +----------- include/linux/soc/nxp/lpc32xx-misc.h | 5 +++++ 3 files changed, 18 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c index f648324..a475339 100644 --- a/arch/arm/mach-lpc32xx/common.c +++ b/arch/arm/mach-lpc32xx/common.c @@ -63,6 +63,18 @@ u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr) } EXPORT_SYMBOL_GPL(lpc32xx_return_iram); +void lpc32xx_set_phy_interface_mode(phy_interface_t mode) +{ + u32 tmp = __raw_readl(LPC32XX_CLKPWR_MACCLK_CTRL); + tmp &= ~LPC32XX_CLKPWR_MACCTRL_PINS_MSK; + if (mode == PHY_INTERFACE_MODE_MII) + tmp |= LPC32XX_CLKPWR_MACCTRL_USE_MII_PINS; + else + tmp |= LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS; + __raw_writel(tmp, LPC32XX_CLKPWR_MACCLK_CTRL); +} +EXPORT_SYMBOL_GPL(lpc32xx_set_phy_interface_mode); + static struct map_desc lpc32xx_io_desc[] __initdata = { { .virtual = (unsigned long)IO_ADDRESS(LPC32XX_AHB0_START), diff --git a/drivers/net/ethernet/nxp/lpc_eth.c b/drivers/net/ethernet/nxp/lpc_eth.c index bcdd0ad..0893b77 100644 --- a/drivers/net/ethernet/nxp/lpc_eth.c +++ b/drivers/net/ethernet/nxp/lpc_eth.c @@ -20,9 +20,6 @@ #include #include -#include -#include - #define MODNAME "lpc-eth" #define DRV_VERSION "1.00" @@ -1237,16 +1234,9 @@ static int lpc_eth_drv_probe(struct platform_device *pdev) dma_addr_t dma_handle; struct resource *res; int irq, ret; - u32 tmp; /* Setup network interface for RMII or MII mode */ - tmp = __raw_readl(LPC32XX_CLKPWR_MACCLK_CTRL); - tmp &= ~LPC32XX_CLKPWR_MACCTRL_PINS_MSK; - if (lpc_phy_interface_mode(dev) == PHY_INTERFACE_MODE_MII) - tmp |= LPC32XX_CLKPWR_MACCTRL_USE_MII_PINS; - else - tmp |= LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS; - __raw_writel(tmp, LPC32XX_CLKPWR_MACCLK_CTRL); + lpc32xx_set_phy_interface_mode(lpc_phy_interface_mode(dev)); /* Get platform resources */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); diff --git a/include/linux/soc/nxp/lpc32xx-misc.h b/include/linux/soc/nxp/lpc32xx-misc.h index f232e1a..af4f82f 100644 --- a/include/linux/soc/nxp/lpc32xx-misc.h +++ b/include/linux/soc/nxp/lpc32xx-misc.h @@ -9,9 +9,11 @@ #define __SOC_LPC32XX_MISC_H #include +#include #ifdef CONFIG_ARCH_LPC32XX extern u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr); +extern void lpc32xx_set_phy_interface_mode(phy_interface_t mode); #else static inline u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr) { @@ -19,6 +21,9 @@ static inline u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaadd *dmaaddr = 0; return 0; } +static inline void lpc32xx_set_phy_interface_mode(phy_interface_t mode) +{ +} #endif #endif /* __SOC_LPC32XX_MISC_H */ -- 2.7.4