From ec1e11ab23d13bf4b54faed0c1133c0e72662fba Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 1 Aug 2023 13:54:30 +0200 Subject: [PATCH] amd,radeonsi: move si_shader_io_get_unique_index_patch() to common code Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/common/ac_shader_util.c | 22 +++++++++++++++++++++ src/amd/common/ac_shader_util.h | 2 ++ src/gallium/drivers/radeonsi/si_shader.c | 23 +--------------------- src/gallium/drivers/radeonsi/si_shader.h | 1 - src/gallium/drivers/radeonsi/si_shader_info.c | 6 +++--- src/gallium/drivers/radeonsi/si_shader_llvm_tess.c | 8 ++++---- 6 files changed, 32 insertions(+), 30 deletions(-) diff --git a/src/amd/common/ac_shader_util.c b/src/amd/common/ac_shader_util.c index 5360acd..26659ea 100644 --- a/src/amd/common/ac_shader_util.c +++ b/src/amd/common/ac_shader_util.c @@ -1159,3 +1159,25 @@ unsigned ac_get_all_edge_flag_bits(void) /* This will be extended in the future. */ return (1u << 9) | (1u << 19) | (1u << 29); } + +/** + * Returns a unique index for a per-patch semantic name and index. The index + * must be less than 32, so that a 32-bit bitmask of used inputs or outputs + * can be calculated. + */ +unsigned +ac_shader_io_get_unique_index_patch(unsigned semantic) +{ + switch (semantic) { + case VARYING_SLOT_TESS_LEVEL_OUTER: + return 0; + case VARYING_SLOT_TESS_LEVEL_INNER: + return 1; + default: + if (semantic >= VARYING_SLOT_PATCH0 && semantic < VARYING_SLOT_PATCH0 + 30) + return 2 + (semantic - VARYING_SLOT_PATCH0); + + assert(!"invalid semantic"); + return 0; + } +} diff --git a/src/amd/common/ac_shader_util.h b/src/amd/common/ac_shader_util.h index 01f8163..439a37f 100644 --- a/src/amd/common/ac_shader_util.h +++ b/src/amd/common/ac_shader_util.h @@ -226,6 +226,8 @@ union ac_hw_cache_flags ac_get_hw_cache_flags(const struct radeon_info *info, unsigned ac_get_all_edge_flag_bits(void); +unsigned ac_shader_io_get_unique_index_patch(unsigned semantic); + #ifdef __cplusplus } #endif diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 3dc8d9a..f284b50 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -60,27 +60,6 @@ bool si_is_merged_shader(struct si_shader *shader) } /** - * Returns a unique index for a per-patch semantic name and index. The index - * must be less than 32, so that a 32-bit bitmask of used inputs or outputs - * can be calculated. - */ -unsigned si_shader_io_get_unique_index_patch(unsigned semantic) -{ - switch (semantic) { - case VARYING_SLOT_TESS_LEVEL_OUTER: - return 0; - case VARYING_SLOT_TESS_LEVEL_INNER: - return 1; - default: - if (semantic >= VARYING_SLOT_PATCH0 && semantic < VARYING_SLOT_PATCH0 + 30) - return 2 + (semantic - VARYING_SLOT_PATCH0); - - assert(!"invalid semantic"); - return 0; - } -} - -/** * Returns a unique index for a semantic name and index. The index must be * less than 64, so that a 64-bit bitmask of used inputs or outputs can be * calculated. @@ -1663,7 +1642,7 @@ static unsigned si_map_io_driver_location(unsigned semantic) if ((semantic >= VARYING_SLOT_PATCH0 && semantic < VARYING_SLOT_TESS_MAX) || semantic == VARYING_SLOT_TESS_LEVEL_INNER || semantic == VARYING_SLOT_TESS_LEVEL_OUTER) - return si_shader_io_get_unique_index_patch(semantic); + return ac_shader_io_get_unique_index_patch(semantic); return si_shader_io_get_unique_index(semantic); } diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h index 6b5b6d7..e52ee99 100644 --- a/src/gallium/drivers/radeonsi/si_shader.h +++ b/src/gallium/drivers/radeonsi/si_shader.h @@ -1005,7 +1005,6 @@ bool si_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *compi bool si_create_shader_variant(struct si_screen *sscreen, struct ac_llvm_compiler *compiler, struct si_shader *shader, struct util_debug_callback *debug); void si_shader_destroy(struct si_shader *shader); -unsigned si_shader_io_get_unique_index_patch(unsigned semantic); unsigned si_shader_io_get_unique_index(unsigned semantic); bool si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader, uint64_t scratch_va); diff --git a/src/gallium/drivers/radeonsi/si_shader_info.c b/src/gallium/drivers/radeonsi/si_shader_info.c index e1e92cc..666511f 100644 --- a/src/gallium/drivers/radeonsi/si_shader_info.c +++ b/src/gallium/drivers/radeonsi/si_shader_info.c @@ -734,8 +734,8 @@ void si_nir_scan_shader(struct si_screen *sscreen, const struct nir_shader *nir, if (nir->info.stage == MESA_SHADER_TESS_CTRL) { /* Always reserve space for these. */ info->patch_outputs_written |= - (1ull << si_shader_io_get_unique_index_patch(VARYING_SLOT_TESS_LEVEL_INNER)) | - (1ull << si_shader_io_get_unique_index_patch(VARYING_SLOT_TESS_LEVEL_OUTER)); + (1ull << ac_shader_io_get_unique_index_patch(VARYING_SLOT_TESS_LEVEL_INNER)) | + (1ull << ac_shader_io_get_unique_index_patch(VARYING_SLOT_TESS_LEVEL_OUTER)); } for (unsigned i = 0; i < info->num_outputs; i++) { unsigned semantic = info->output_semantic[i]; @@ -743,7 +743,7 @@ void si_nir_scan_shader(struct si_screen *sscreen, const struct nir_shader *nir, if (semantic == VARYING_SLOT_TESS_LEVEL_INNER || semantic == VARYING_SLOT_TESS_LEVEL_OUTER || (semantic >= VARYING_SLOT_PATCH0 && semantic < VARYING_SLOT_TESS_MAX)) { - info->patch_outputs_written |= 1ull << si_shader_io_get_unique_index_patch(semantic); + info->patch_outputs_written |= 1ull << ac_shader_io_get_unique_index_patch(semantic); } else if ((semantic <= VARYING_SLOT_VAR31 || semantic >= VARYING_SLOT_VAR0_16BIT) && semantic != VARYING_SLOT_EDGE) { info->outputs_written |= 1ull << si_shader_io_get_unique_index(semantic); diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c b/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c index 237c616..a215dc9 100644 --- a/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c +++ b/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c @@ -294,8 +294,8 @@ static void si_write_tess_factors(struct si_shader_context *ctx, union si_shader /* Load tess_inner and tess_outer from LDS. * Any invocation can write them, so we can't get them from a temporary. */ - tess_inner_index = si_shader_io_get_unique_index_patch(VARYING_SLOT_TESS_LEVEL_INNER); - tess_outer_index = si_shader_io_get_unique_index_patch(VARYING_SLOT_TESS_LEVEL_OUTER); + tess_inner_index = ac_shader_io_get_unique_index_patch(VARYING_SLOT_TESS_LEVEL_INNER); + tess_outer_index = ac_shader_io_get_unique_index_patch(VARYING_SLOT_TESS_LEVEL_OUTER); lds_base = tcs_out_current_patch_data_offset; lds_inner = LLVMBuildAdd(ctx->ac.builder, lds_base, @@ -368,7 +368,7 @@ static void si_write_tess_factors(struct si_shader_context *ctx, union si_shader buf = get_tess_ring_descriptor(ctx, TESS_OFFCHIP_RING); base = ac_get_arg(&ctx->ac, ctx->args->ac.tess_offchip_offset); - param_outer = si_shader_io_get_unique_index_patch(VARYING_SLOT_TESS_LEVEL_OUTER); + param_outer = ac_shader_io_get_unique_index_patch(VARYING_SLOT_TESS_LEVEL_OUTER); tf_outer_offset = get_tcs_tes_buffer_address(ctx, rel_patch_id, NULL, LLVMConstInt(ctx->ac.i32, param_outer, 0)); @@ -377,7 +377,7 @@ static void si_write_tess_factors(struct si_shader_context *ctx, union si_shader ac_build_buffer_store_dword(&ctx->ac, buf, outer_vec, NULL, tf_outer_offset, base, ACCESS_COHERENT); if (inner_comps) { - param_inner = si_shader_io_get_unique_index_patch(VARYING_SLOT_TESS_LEVEL_INNER); + param_inner = ac_shader_io_get_unique_index_patch(VARYING_SLOT_TESS_LEVEL_INNER); tf_inner_offset = get_tcs_tes_buffer_address(ctx, rel_patch_id, NULL, LLVMConstInt(ctx->ac.i32, param_inner, 0)); -- 2.7.4