From eb946cc5b66c84e1f3419b1160a42f19d8976137 Mon Sep 17 00:00:00 2001 From: Alexander Pivovarov Date: Tue, 31 Aug 2021 11:50:37 +0530 Subject: [PATCH] Fix typo in comments Reviewed By: MaskRay, jsji Differential Revision: https://reviews.llvm.org/D108857 --- llvm/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def | 2 +- llvm/include/llvm/Target/TargetOptions.h | 2 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/llvm/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def b/llvm/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def index 48ea7e5..4cee3ab 100644 --- a/llvm/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def +++ b/llvm/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def @@ -373,7 +373,7 @@ CV_REGISTER(AMD64_K7, 765) CV_REGISTER(ARM_NOREG, 0) -// General purpose 32-bit integer regisers +// General purpose 32-bit integer registers CV_REGISTER(ARM_R0, 10) CV_REGISTER(ARM_R1, 11) diff --git a/llvm/include/llvm/Target/TargetOptions.h b/llvm/include/llvm/Target/TargetOptions.h index 20c715e..a50da11 100644 --- a/llvm/include/llvm/Target/TargetOptions.h +++ b/llvm/include/llvm/Target/TargetOptions.h @@ -174,7 +174,7 @@ namespace llvm { /// EnableAIXExtendedAltivecABI - This flag returns true when -vec-extabi is /// specified. The code generator is then able to use both volatile and - /// nonvolitle vector regisers. When false, the code generator only uses + /// nonvolitle vector registers. When false, the code generator only uses /// volatile vector registers which is the default setting on AIX. unsigned EnableAIXExtendedAltivecABI : 1; diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp index cb64667..32d9525 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -3010,7 +3010,7 @@ bool PPCInstrInfo::expandPostRAPseudo(MachineInstr &MI) const { .addReg(SrcVSR + VecNo) .addReg(SrcVSR + VecNo); } - // BUILD_UACC is expanded to 4 copies of the underlying vsx regisers. + // BUILD_UACC is expanded to 4 copies of the underlying vsx registers. // So after building the 4 copies, we can replace the BUILD_UACC instruction // with a NOP. LLVM_FALLTHROUGH; -- 2.7.4