From eb6563a681e2fdf5e33a3ede03c8768059d3a8d3 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 11 Jun 2020 19:59:25 +0200 Subject: [PATCH] ARM: tegra: Add parent clock to DSI output The DSI output needs to specify a parent clock that will be used to drive both the output and the display controller. Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra20.dtsi | 4 +++- arch/arm/boot/dts/tegra30.dtsi | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 899ec5a..72a4211 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -156,7 +156,9 @@ dsi@54300000 { compatible = "nvidia,tegra20-dsi"; reg = <0x54300000 0x00040000>; - clocks = <&tegra_car TEGRA20_CLK_DSI>; + clocks = <&tegra_car TEGRA20_CLK_DSI>, + <&tegra_car TEGRA20_CLK_PLL_D_OUT0>; + clock-names = "dsi", "parent"; resets = <&tegra_car 48>; reset-names = "dsi"; status = "disabled"; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 2007c60..08d0ee4 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -257,7 +257,9 @@ dsi@54300000 { compatible = "nvidia,tegra30-dsi"; reg = <0x54300000 0x00040000>; - clocks = <&tegra_car TEGRA30_CLK_DSIA>; + clocks = <&tegra_car TEGRA30_CLK_DSIA>, + <&tegra_car TEGRA30_CLK_PLL_D_OUT0>; + clock-names = "dsi", "parent"; resets = <&tegra_car 48>; reset-names = "dsi"; status = "disabled"; -- 2.7.4