From eb5ffc7842c0c4a362214d24f8967570c235d730 Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Wed, 3 Apr 2019 14:36:47 +0000 Subject: [PATCH] [x86] add tests with constants for FP scalarization; NFC llvm-svn: 357587 --- llvm/test/CodeGen/X86/scalarize-fp.ll | 231 ++++++++++++++++++++++++++++++++++ 1 file changed, 231 insertions(+) diff --git a/llvm/test/CodeGen/X86/scalarize-fp.ll b/llvm/test/CodeGen/X86/scalarize-fp.ll index 33c4154..f0b94e5 100644 --- a/llvm/test/CodeGen/X86/scalarize-fp.ll +++ b/llvm/test/CodeGen/X86/scalarize-fp.ll @@ -466,6 +466,122 @@ define <8 x float> @fdiv_splat_splat_v8f32(<8 x float> %vx, <8 x float> %vy) { ret <8 x float> %r } +define <2 x double> @fadd_splat_const_op1_v2f64(<2 x double> %vx) { +; SSE-LABEL: fadd_splat_const_op1_v2f64: +; SSE: # %bb.0: +; SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0,0] +; SSE-NEXT: addpd {{.*}}(%rip), %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: fadd_splat_const_op1_v2f64: +; AVX: # %bb.0: +; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] +; AVX-NEXT: vaddpd {{.*}}(%rip), %xmm0, %xmm0 +; AVX-NEXT: retq + %splatx = shufflevector <2 x double> %vx, <2 x double> undef, <2 x i32> zeroinitializer + %r = fadd <2 x double> %splatx, + ret <2 x double> %r +} + +define <4 x double> @fsub_const_op0_splat_v4f64(double %x) { +; SSE-LABEL: fsub_const_op0_splat_v4f64: +; SSE: # %bb.0: +; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero +; SSE-NEXT: subpd %xmm0, %xmm1 +; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0,0] +; SSE-NEXT: movapd %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: fsub_const_op0_splat_v4f64: +; AVX: # %bb.0: +; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero +; AVX-NEXT: vsubpd %xmm0, %xmm1, %xmm0 +; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] +; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX-NEXT: retq + %vx = insertelement <4 x double> undef, double 8.0, i32 0 + %vy = insertelement <4 x double> undef, double %x, i32 0 + %splatx = shufflevector <4 x double> %vx, <4 x double> undef, <4 x i32> zeroinitializer + %splaty = shufflevector <4 x double> %vy, <4 x double> undef, <4 x i32> zeroinitializer + %r = fsub <4 x double> %splatx, %splaty + ret <4 x double> %r +} + +define <4 x float> @fmul_splat_const_op1_v4f32(<4 x float> %vx, <4 x float> %vy) { +; SSE-LABEL: fmul_splat_const_op1_v4f32: +; SSE: # %bb.0: +; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; SSE-NEXT: mulps {{.*}}(%rip), %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: fmul_splat_const_op1_v4f32: +; AVX: # %bb.0: +; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; AVX-NEXT: vmulps {{.*}}(%rip), %xmm0, %xmm0 +; AVX-NEXT: retq + %splatx = shufflevector <4 x float> %vx, <4 x float> undef, <4 x i32> zeroinitializer + %r = fmul fast <4 x float> %splatx, + ret <4 x float> %r +} + +define <8 x float> @fdiv_splat_const_op0_v8f32(<8 x float> %vy) { +; SSE-LABEL: fdiv_splat_const_op0_v8f32: +; SSE: # %bb.0: +; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; SSE-NEXT: rcpps %xmm0, %xmm2 +; SSE-NEXT: mulps %xmm2, %xmm0 +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; SSE-NEXT: subps %xmm0, %xmm1 +; SSE-NEXT: mulps %xmm2, %xmm1 +; SSE-NEXT: addps %xmm2, %xmm1 +; SSE-NEXT: mulps {{.*}}(%rip), %xmm1 +; SSE-NEXT: movaps %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: fdiv_splat_const_op0_v8f32: +; AVX: # %bb.0: +; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX-NEXT: vrcpps %ymm0, %ymm1 +; AVX-NEXT: vmulps %ymm1, %ymm0, %ymm0 +; AVX-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; AVX-NEXT: vsubps %ymm0, %ymm2, %ymm0 +; AVX-NEXT: vmulps %ymm0, %ymm1, %ymm0 +; AVX-NEXT: vaddps %ymm0, %ymm1, %ymm0 +; AVX-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 +; AVX-NEXT: retq + %splatx = shufflevector <8 x float> , <8 x float> undef, <8 x i32> zeroinitializer + %splaty = shufflevector <8 x float> %vy, <8 x float> undef, <8 x i32> zeroinitializer + %r = fdiv fast <8 x float> %splatx, %splaty + ret <8 x float> %r +} + +define <8 x float> @fdiv_const_op1_splat_v8f32(<8 x float> %vx) { +; SSE-LABEL: fdiv_const_op1_splat_v8f32: +; SSE: # %bb.0: +; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; SSE-NEXT: xorps %xmm1, %xmm1 +; SSE-NEXT: rcpps %xmm1, %xmm1 +; SSE-NEXT: addps %xmm1, %xmm1 +; SSE-NEXT: mulps %xmm0, %xmm1 +; SSE-NEXT: movaps %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: fdiv_const_op1_splat_v8f32: +; AVX: # %bb.0: +; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1 +; AVX-NEXT: vrcpps %ymm1, %ymm1 +; AVX-NEXT: vaddps %ymm1, %ymm1, %ymm1 +; AVX-NEXT: vmulps %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retq + %splatx = shufflevector <8 x float> %vx, <8 x float> undef, <8 x i32> zeroinitializer + %splaty = shufflevector <8 x float> , <8 x float> undef, <8 x i32> zeroinitializer + %r = fdiv fast <8 x float> %splatx, %splaty + ret <8 x float> %r +} + define <2 x double> @splat0_fadd_v2f64(<2 x double> %vx, <2 x double> %vy) { ; SSE-LABEL: splat0_fadd_v2f64: ; SSE: # %bb.0: @@ -551,3 +667,118 @@ define <8 x float> @splat0_fdiv_v8f32(<8 x float> %vx, <8 x float> %vy) { %r = shufflevector <8 x float> %b, <8 x float> undef, <8 x i32> zeroinitializer ret <8 x float> %r } + +define <2 x double> @splat0_fadd_const_op1_v2f64(<2 x double> %vx) { +; SSE-LABEL: splat0_fadd_const_op1_v2f64: +; SSE: # %bb.0: +; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero +; SSE-NEXT: addpd %xmm0, %xmm1 +; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0,0] +; SSE-NEXT: movapd %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: splat0_fadd_const_op1_v2f64: +; AVX: # %bb.0: +; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero +; AVX-NEXT: vaddpd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] +; AVX-NEXT: retq + %b = fadd <2 x double> %vx, + %r = shufflevector <2 x double> %b, <2 x double> undef, <2 x i32> zeroinitializer + ret <2 x double> %r +} + +define <4 x double> @splat0_fsub_const_op0_v4f64(double %x) { +; SSE-LABEL: splat0_fsub_const_op0_v4f64: +; SSE: # %bb.0: +; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero +; SSE-NEXT: subpd %xmm0, %xmm1 +; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0,0] +; SSE-NEXT: movapd %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: splat0_fsub_const_op0_v4f64: +; AVX: # %bb.0: +; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero +; AVX-NEXT: vsubpd %xmm0, %xmm1, %xmm0 +; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] +; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX-NEXT: retq + %vx = insertelement <4 x double> undef, double %x, i32 0 + %b = fsub <4 x double> , %vx + %r = shufflevector <4 x double> %b, <4 x double> undef, <4 x i32> zeroinitializer + ret <4 x double> %r +} + +define <4 x float> @splat0_fmul_const_op1_v4f32(<4 x float> %vx) { +; SSE-LABEL: splat0_fmul_const_op1_v4f32: +; SSE: # %bb.0: +; SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; SSE-NEXT: mulps %xmm0, %xmm1 +; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0,0,0] +; SSE-NEXT: movaps %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: splat0_fmul_const_op1_v4f32: +; AVX: # %bb.0: +; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0 +; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; AVX-NEXT: retq + %b = fmul fast <4 x float> %vx, + %r = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> zeroinitializer + ret <4 x float> %r +} + +define <8 x float> @splat0_fdiv_const_op1_v8f32(<8 x float> %vx) { +; SSE-LABEL: splat0_fdiv_const_op1_v8f32: +; SSE: # %bb.0: +; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; SSE-NEXT: movaps %xmm0, %xmm1 +; SSE-NEXT: retq +; +; AVX-LABEL: splat0_fdiv_const_op1_v8f32: +; AVX: # %bb.0: +; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; AVX-NEXT: vrcpps %ymm1, %ymm1 +; AVX-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; AVX-NEXT: vsubps %xmm1, %xmm2, %xmm2 +; AVX-NEXT: vmulps %xmm2, %xmm1, %xmm2 +; AVX-NEXT: vaddps %xmm2, %xmm1, %xmm1 +; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0 +; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX-NEXT: retq + %b = fdiv fast <8 x float> %vx, + %r = shufflevector <8 x float> %b, <8 x float> undef, <8 x i32> zeroinitializer + ret <8 x float> %r +} + +define <8 x float> @splat0_fdiv_const_op0_v8f32(<8 x float> %vx) { +; SSE-LABEL: splat0_fdiv_const_op0_v8f32: +; SSE: # %bb.0: +; SSE-NEXT: rcpps %xmm0, %xmm2 +; SSE-NEXT: mulps %xmm2, %xmm0 +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; SSE-NEXT: subps %xmm0, %xmm1 +; SSE-NEXT: mulps %xmm2, %xmm1 +; SSE-NEXT: addps %xmm2, %xmm1 +; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0,0,0] +; SSE-NEXT: movaps %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: splat0_fdiv_const_op0_v8f32: +; AVX: # %bb.0: +; AVX-NEXT: vrcpps %ymm0, %ymm1 +; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0 +; AVX-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; AVX-NEXT: vsubps %xmm0, %xmm2, %xmm0 +; AVX-NEXT: vmulps %xmm0, %xmm1, %xmm0 +; AVX-NEXT: vaddps %xmm0, %xmm1, %xmm0 +; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX-NEXT: retq + %b = fdiv fast <8 x float> , %vx + %r = shufflevector <8 x float> %b, <8 x float> undef, <8 x i32> zeroinitializer + ret <8 x float> %r +} -- 2.7.4