From ea4c1bb77281564517aefa9c464bfb1ee924460f Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Wed, 9 May 2018 15:18:12 +0000 Subject: [PATCH] [LV] Change MaxVectorSize bound to 256 in assertion, NFC otherwise It's possible to have a vector of 256 bytes in HVX code on Hexagon (vector pair in 128-byte mode). llvm-svn: 331885 --- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp index a04cd61..eefaf22 100644 --- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp +++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp @@ -4937,8 +4937,8 @@ LoopVectorizationCostModel::computeFeasibleMaxVF(bool OptForSize, DEBUG(dbgs() << "LV: The Widest register safe to use is: " << WidestRegister << " bits.\n"); - assert(MaxVectorSize <= 64 && "Did not expect to pack so many elements" - " into one vector!"); + assert(MaxVectorSize <= 256 && "Did not expect to pack so many elements" + " into one vector!"); if (MaxVectorSize == 0) { DEBUG(dbgs() << "LV: The target has no vector registers.\n"); MaxVectorSize = 1; -- 2.7.4