From ea0cf50228a98fb88f9f562d0ad4dd514d22f8cc Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Wed, 10 Jun 2015 20:23:31 +0200 Subject: [PATCH] re PR target/66473 (ICE: in extract_insn, at recog.c:2343 (unrecognizable insn) with -mavx512f) PR target/66473 * config/i386/i386.c (ix86_expand_vector_set): Use gen_int_mode to prepare mask operand for AVX512 modes. testsuite/ChangeLog: PR target/66473 * gcc.target/i386/pr66473.c: New test. From-SVN: r224340 --- gcc/ChangeLog | 6 +++ gcc/config/i386/i386.c | 77 +++++++++++++++------------------ gcc/testsuite/ChangeLog | 5 +++ gcc/testsuite/gcc.target/i386/pr66473.c | 17 ++++++++ 4 files changed, 62 insertions(+), 43 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr66473.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e4dfe38..32fce15 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-06-10 Uros Bizjak + + PR target/66473 + * config/i386/i386.c (ix86_expand_vector_set): Use gen_int_mode + to prepare mask operand for AVX512 modes. + 2015-06-10 Michael Meissner PR target/66474 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index abae772..86ce413 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -44720,6 +44720,8 @@ ix86_expand_vector_set (bool mmx_ok, rtx target, rtx val, int elt) { gen_vec_set_lo_v4df, gen_vec_set_hi_v4df } }; int i, j, n; + machine_mode mmode = VOIDmode; + rtx (*gen_blendm) (rtx, rtx, rtx, rtx); switch (mode) { @@ -44936,75 +44938,64 @@ half: case V8DFmode: if (TARGET_AVX512F) { - tmp = gen_reg_rtx (mode); - emit_insn (gen_rtx_SET (tmp, gen_rtx_VEC_DUPLICATE (mode, val))); - emit_insn (gen_avx512f_blendmv8df (target, tmp, target, - force_reg (QImode, GEN_INT (1 << elt)))); - return; + mmode = QImode; + gen_blendm = gen_avx512f_blendmv8df; } - else - break; + break; + case V8DImode: if (TARGET_AVX512F) { - tmp = gen_reg_rtx (mode); - emit_insn (gen_rtx_SET (tmp, gen_rtx_VEC_DUPLICATE (mode, val))); - emit_insn (gen_avx512f_blendmv8di (target, tmp, target, - force_reg (QImode, GEN_INT (1 << elt)))); - return; + mmode = QImode; + gen_blendm = gen_avx512f_blendmv8di; } - else - break; + break; + case V16SFmode: if (TARGET_AVX512F) { - tmp = gen_reg_rtx (mode); - emit_insn (gen_rtx_SET (tmp, gen_rtx_VEC_DUPLICATE (mode, val))); - emit_insn (gen_avx512f_blendmv16sf (target, tmp, target, - force_reg (HImode, GEN_INT (1 << elt)))); - return; + mmode = HImode; + gen_blendm = gen_avx512f_blendmv16sf; } - else - break; + break; + case V16SImode: if (TARGET_AVX512F) { - tmp = gen_reg_rtx (mode); - emit_insn (gen_rtx_SET (tmp, gen_rtx_VEC_DUPLICATE (mode, val))); - emit_insn (gen_avx512f_blendmv16si (target, tmp, target, - force_reg (HImode, GEN_INT (1 << elt)))); - return; + mmode = HImode; + gen_blendm = gen_avx512f_blendmv16si; } - else - break; + break; + case V32HImode: if (TARGET_AVX512F && TARGET_AVX512BW) { - tmp = gen_reg_rtx (mode); - emit_insn (gen_rtx_SET (tmp, gen_rtx_VEC_DUPLICATE (mode, val))); - emit_insn (gen_avx512bw_blendmv32hi (target, tmp, target, - force_reg (SImode, GEN_INT (1 << elt)))); - return; + mmode = SImode; + gen_blendm = gen_avx512bw_blendmv32hi; } - else - break; + break; + case V64QImode: if (TARGET_AVX512F && TARGET_AVX512BW) { - tmp = gen_reg_rtx (mode); - emit_insn (gen_rtx_SET (tmp, gen_rtx_VEC_DUPLICATE (mode, val))); - emit_insn (gen_avx512bw_blendmv64qi (target, tmp, target, - force_reg (DImode, GEN_INT (1 << elt)))); - return; + mmode = DImode; + gen_blendm = gen_avx512bw_blendmv64qi; } - else - break; + break; default: break; } - if (use_vec_merge) + if (mmode != VOIDmode) + { + tmp = gen_reg_rtx (mode); + emit_insn (gen_rtx_SET (tmp, gen_rtx_VEC_DUPLICATE (mode, val))); + emit_insn (gen_blendm (target, tmp, target, + force_reg (mmode, + gen_int_mode (1 << elt, mmode)))); + } + else if (use_vec_merge) { tmp = gen_rtx_VEC_DUPLICATE (mode, val); tmp = gen_rtx_VEC_MERGE (mode, tmp, target, GEN_INT (1 << elt)); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f7e79fe..fb09b17 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-06-10 Uros Bizjak + + PR target/66473 + * gcc.target/i386/pr66473.c: New test. + 2015-06-10 Jakub Jelinek PR target/66470 diff --git a/gcc/testsuite/gcc.target/i386/pr66473.c b/gcc/testsuite/gcc.target/i386/pr66473.c new file mode 100644 index 0000000..f2433ab --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66473.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f" } */ + +typedef double __m512d __attribute__ ((__vector_size__ (64))); + +extern __m512d _ZGVeN8v_func (__m512d); + +double +func_vlen8 (double x) +{ + __m512d mx, mr; + + mx[0] = mx[1] = mx[2] = mx[3] = mx[4] = mx[5] = mx[6] = mx[7] = x; + mr = _ZGVeN8v_func (mx); + + return (double) mr[0]; +} -- 2.7.4