From e9909cbf258c67069b8d806cbfdd007de1ac2b5b Mon Sep 17 00:00:00 2001 From: "ager@chromium.org" Date: Mon, 26 Oct 2009 17:53:34 +0000 Subject: [PATCH] Apply patch by Timur Iskhodzhanov to add valgrind notifications on code modification to the x64 build. The same notifications are already in place in the ia32 build. Review URL: http://codereview.chromium.org/335028 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3134 ce2b1a6d-e550-0410-aec6-3dcde31c8c00 --- src/third_party/valgrind/valgrind.h | 57 +++++++++++++++++++------------------ src/x64/cpu-x64.cc | 13 +++++++++ 2 files changed, 42 insertions(+), 28 deletions(-) diff --git a/src/third_party/valgrind/valgrind.h b/src/third_party/valgrind/valgrind.h index 47f369b..a94dc58 100644 --- a/src/third_party/valgrind/valgrind.h +++ b/src/third_party/valgrind/valgrind.h @@ -74,6 +74,7 @@ #define __VALGRIND_H #include +#include /* Nb: this file might be included in a file compiled with -ansi. So we can't use C++ style "//" comments nor the "asm" keyword (instead @@ -232,7 +233,7 @@ typedef typedef struct { - unsigned long long int nraddr; /* where's the code? */ + uint64_t nraddr; /* where's the code? */ } OrigFn; @@ -243,14 +244,14 @@ typedef #define VALGRIND_DO_CLIENT_REQUEST( \ _zzq_rlval, _zzq_default, _zzq_request, \ _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \ - { volatile unsigned long long int _zzq_args[6]; \ - volatile unsigned long long int _zzq_result; \ - _zzq_args[0] = (unsigned long long int)(_zzq_request); \ - _zzq_args[1] = (unsigned long long int)(_zzq_arg1); \ - _zzq_args[2] = (unsigned long long int)(_zzq_arg2); \ - _zzq_args[3] = (unsigned long long int)(_zzq_arg3); \ - _zzq_args[4] = (unsigned long long int)(_zzq_arg4); \ - _zzq_args[5] = (unsigned long long int)(_zzq_arg5); \ + { volatile uint64_t _zzq_args[6]; \ + volatile uint64_t _zzq_result; \ + _zzq_args[0] = (uint64_t)(_zzq_request); \ + _zzq_args[1] = (uint64_t)(_zzq_arg1); \ + _zzq_args[2] = (uint64_t)(_zzq_arg2); \ + _zzq_args[3] = (uint64_t)(_zzq_arg3); \ + _zzq_args[4] = (uint64_t)(_zzq_arg4); \ + _zzq_args[5] = (uint64_t)(_zzq_arg5); \ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ /* %RDX = client_request ( %RAX ) */ \ "xchgq %%rbx,%%rbx" \ @@ -263,7 +264,7 @@ typedef #define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \ { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \ - volatile unsigned long long int __addr; \ + volatile uint64_t __addr; \ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ /* %RAX = guest_NRADDR */ \ "xchgq %%rcx,%%rcx" \ @@ -346,8 +347,8 @@ typedef typedef struct { - unsigned long long int nraddr; /* where's the code? */ - unsigned long long int r2; /* what tocptr do we need? */ + uint64_t nraddr; /* where's the code? */ + uint64_t r2; /* what tocptr do we need? */ } OrigFn; @@ -359,15 +360,15 @@ typedef _zzq_rlval, _zzq_default, _zzq_request, \ _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \ \ - { unsigned long long int _zzq_args[6]; \ - register unsigned long long int _zzq_result __asm__("r3"); \ - register unsigned long long int* _zzq_ptr __asm__("r4"); \ - _zzq_args[0] = (unsigned long long int)(_zzq_request); \ - _zzq_args[1] = (unsigned long long int)(_zzq_arg1); \ - _zzq_args[2] = (unsigned long long int)(_zzq_arg2); \ - _zzq_args[3] = (unsigned long long int)(_zzq_arg3); \ - _zzq_args[4] = (unsigned long long int)(_zzq_arg4); \ - _zzq_args[5] = (unsigned long long int)(_zzq_arg5); \ + { uint64_t _zzq_args[6]; \ + register uint64_t _zzq_result __asm__("r3"); \ + register uint64_t* _zzq_ptr __asm__("r4"); \ + _zzq_args[0] = (uint64_t)(_zzq_request); \ + _zzq_args[1] = (uint64_t)(_zzq_arg1); \ + _zzq_args[2] = (uint64_t)(_zzq_arg2); \ + _zzq_args[3] = (uint64_t)(_zzq_arg3); \ + _zzq_args[4] = (uint64_t)(_zzq_arg4); \ + _zzq_args[5] = (uint64_t)(_zzq_arg5); \ _zzq_ptr = _zzq_args; \ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ /* %R3 = client_request ( %R4 ) */ \ @@ -380,7 +381,7 @@ typedef #define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \ { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \ - register unsigned long long int __addr __asm__("r3"); \ + register uint64_t __addr __asm__("r3"); \ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ /* %R3 = guest_NRADDR */ \ "or 2,2,2" \ @@ -484,8 +485,8 @@ typedef typedef struct { - unsigned long long int nraddr; /* where's the code? */ - unsigned long long int r2; /* what tocptr do we need? */ + uint64_t nraddr; /* where's the code? */ + uint64_t r2; /* what tocptr do we need? */ } OrigFn; @@ -497,9 +498,9 @@ typedef _zzq_rlval, _zzq_default, _zzq_request, \ _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \ \ - { unsigned long long int _zzq_args[7]; \ - register unsigned long long int _zzq_result; \ - register unsigned long long int* _zzq_ptr; \ + { uint64_t _zzq_args[7]; \ + register uint64_t _zzq_result; \ + register uint64_t* _zzq_ptr; \ _zzq_args[0] = (unsigned int long long)(_zzq_request); \ _zzq_args[1] = (unsigned int long long)(_zzq_arg1); \ _zzq_args[2] = (unsigned int long long)(_zzq_arg2); \ @@ -522,7 +523,7 @@ typedef #define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \ { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \ - register unsigned long long int __addr; \ + register uint64_t __addr; \ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ /* %R3 = guest_NRADDR */ \ "or 2,2,2\n\t" \ diff --git a/src/x64/cpu-x64.cc b/src/x64/cpu-x64.cc index 8df0ab7..cc20c58 100644 --- a/src/x64/cpu-x64.cc +++ b/src/x64/cpu-x64.cc @@ -27,6 +27,10 @@ // CPU specific code for x64 independent of OS goes here. +#ifdef __GNUC__ +#include "third_party/valgrind/valgrind.h" +#endif + #include "v8.h" #include "cpu.h" @@ -49,6 +53,15 @@ void CPU::FlushICache(void* start, size_t size) { // If flushing of the instruction cache becomes necessary Windows has the // API function FlushInstructionCache. + + // By default, valgrind only checks the stack for writes that might need to + // invalidate already cached translated code. This leads to random + // instability when code patches or moves are sometimes unnoticed. One + // solution is to run valgrind with --smc-check=all, but this comes at a big + // performance cost. We can notify valgrind to invalidate its cache. +#ifdef VALGRIND_DISCARD_TRANSLATIONS + VALGRIND_DISCARD_TRANSLATIONS(start, size); +#endif } -- 2.7.4