From e9644cb1f96ccf7e155af09e90f6a7888f609a2d Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Tue, 9 Feb 2016 16:11:55 -0800 Subject: [PATCH] i965: Consider tessellation in get_pipeline_state_l3_weights. I think this was just missed; Curro and I were probably writing code simultaneously and forgot to combine them at the end. Signed-off-by: Kenneth Graunke Reviewed-by: Jordan Justen --- src/mesa/drivers/dri/i965/gen7_l3_state.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/gen7_l3_state.c b/src/mesa/drivers/dri/i965/gen7_l3_state.c index 0c1813f..c4babc2 100644 --- a/src/mesa/drivers/dri/i965/gen7_l3_state.c +++ b/src/mesa/drivers/dri/i965/gen7_l3_state.c @@ -298,7 +298,12 @@ static struct brw_l3_weights get_pipeline_state_l3_weights(const struct brw_context *brw) { const struct brw_stage_state *stage_states[] = { - &brw->vs.base, &brw->gs.base, &brw->wm.base, &brw->cs.base + [MESA_SHADER_VERTEX] = &brw->vs.base, + [MESA_SHADER_TESS_CTRL] = &brw->tcs.base, + [MESA_SHADER_TESS_EVAL] = &brw->tes.base, + [MESA_SHADER_GEOMETRY] = &brw->gs.base, + [MESA_SHADER_FRAGMENT] = &brw->wm.base, + [MESA_SHADER_COMPUTE] = &brw->cs.base }; bool needs_dc = false, needs_slm = false; -- 2.7.4