From e95a7329f83781916ff5c1a52c1f7641757ff1e2 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Wed, 6 Apr 2022 17:33:57 +0200 Subject: [PATCH] dt-bindings: soc: add binding for i.MX8MP HDMI blk-ctrl Add the DT binding for the HDMI blk-ctrl found on the i.MX8MP SoC. Signed-off-by: Lucas Stach Reviewed-by: Rob Herring Signed-off-by: Shawn Guo --- .../bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml | 84 ++++++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml new file mode 100644 index 0000000..563e1d0 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8MP HDMI blk-ctrl + +maintainers: + - Lucas Stach + +description: + The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to + the NoC and ensuring proper power sequencing of the display pipeline + peripherals located in the HDMI domain of the SoC. + +properties: + compatible: + items: + - const: fsl,imx8mp-hdmi-blk-ctrl + - const: syscon + + reg: + maxItems: 1 + + '#power-domain-cells': + const: 1 + + power-domains: + minItems: 8 + maxItems: 8 + + power-domain-names: + items: + - const: bus + - const: irqsteer + - const: lcdif + - const: pai + - const: pvi + - const: trng + - const: hdmi-tx + - const: hdmi-tx-phy + + clocks: + minItems: 4 + maxItems: 4 + + clock-names: + items: + - const: apb + - const: axi + - const: ref_266m + - const: ref_24m + +required: + - compatible + - reg + - power-domains + - power-domain-names + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + + blk-ctrl@32fc0000 { + compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon"; + reg = <0x32fc0000 0x23c>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_ROOT>, + <&clk IMX8MP_CLK_HDMI_REF_266M>, + <&clk IMX8MP_CLK_HDMI_24M>; + clock-names = "apb", "axi", "ref_266m", "ref_24m"; + power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmi_phy>; + power-domain-names = "bus", "irqsteer", "lcdif", "pai", "pvi", "trng", + "hdmi-tx", "hdmi-tx-phy"; + #power-domain-cells = <1>; + }; -- 2.7.4