From e909c3d31fbd1d11cce8ca2e27a2fce83fa0db62 Mon Sep 17 00:00:00 2001 From: Sjoerd Meijer Date: Tue, 13 Dec 2022 14:50:03 +0000 Subject: [PATCH] [CostModel][AArch64] Precommit opaque ptr store tests. NFC. --- llvm/test/Analysis/CostModel/AArch64/store-ptr.ll | 24 +++++++ .../Transforms/SLPVectorizer/AArch64/store-ptr.ll | 80 ++++++++++++++++++++++ 2 files changed, 104 insertions(+) create mode 100644 llvm/test/Analysis/CostModel/AArch64/store-ptr.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/AArch64/store-ptr.ll diff --git a/llvm/test/Analysis/CostModel/AArch64/store-ptr.ll b/llvm/test/Analysis/CostModel/AArch64/store-ptr.ll new file mode 100644 index 0000000..93749c4 --- /dev/null +++ b/llvm/test/Analysis/CostModel/AArch64/store-ptr.ll @@ -0,0 +1,24 @@ +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt < %s -passes="print" 2>&1 -disable-output -mtriple=aarch64-unknown -opaque-pointers | FileCheck %s +; RUN: opt < %s -passes="print" -cost-kind=code-size 2>&1 -disable-output -mtriple=aarch64-unknown -opaque-pointers | FileCheck %s --check-prefix=SIZE + +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-v256:32:256-a0:0:32-n32-S32" +define void @getMemoryOpCost() { +; CHECK-LABEL: 'getMemoryOpCost' +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: store <2 x ptr> undef, ptr undef, align 4 +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: store <4 x ptr> undef, ptr undef, align 4 +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: store <8 x ptr> undef, ptr undef, align 4 +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'getMemoryOpCost' +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store <2 x ptr> undef, ptr undef, align 4 +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: store <4 x ptr> undef, ptr undef, align 4 +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: store <8 x ptr> undef, ptr undef, align 4 +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + store <2 x ptr> undef, ptr undef + store <4 x ptr> undef, ptr undef + store <8 x ptr> undef, ptr undef + + ret void +} diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/store-ptr.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/store-ptr.ll new file mode 100644 index 0000000..f0f0221 --- /dev/null +++ b/llvm/test/Transforms/SLPVectorizer/AArch64/store-ptr.ll @@ -0,0 +1,80 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -passes=slp-vectorizer -S | FileCheck %s + +target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" +target triple = "aarch64" + +%struct.node = type { i64, i64, ptr, ptr } + +define void @copy(ptr nocapture noundef writeonly %x, ptr nocapture noundef readonly %y, i32 noundef %n) { +; CHECK-LABEL: @copy( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[CMP34:%.*]] = icmp sgt i32 [[N:%.*]], 0 +; CHECK-NEXT: br i1 [[CMP34]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] +; CHECK: for.body.preheader: +; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64 +; CHECK-NEXT: br label [[FOR_BODY:%.*]] +; CHECK: for.cond.cleanup: +; CHECK-NEXT: ret void +; CHECK: for.body: +; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_NODE:%.*]], ptr [[Y:%.*]], i64 [[INDVARS_IV]] +; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [[STRUCT_NODE]], ptr [[X:%.*]], i64 [[INDVARS_IV]] +; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 8, !tbaa [[TBAA0:![0-9]+]] +; CHECK-NEXT: store <2 x i64> [[TMP0]], ptr [[ARRAYIDX2]], align 8, !tbaa [[TBAA0]] +; CHECK-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_NODE]], ptr [[Y]], i64 [[INDVARS_IV]], i32 2 +; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C]], align 8, !tbaa [[TBAA4:![0-9]+]] +; CHECK-NEXT: [[C13:%.*]] = getelementptr inbounds [[STRUCT_NODE]], ptr [[X]], i64 [[INDVARS_IV]], i32 2 +; CHECK-NEXT: store ptr [[TMP1]], ptr [[C13]], align 8, !tbaa [[TBAA4]] +; CHECK-NEXT: [[D:%.*]] = getelementptr inbounds [[STRUCT_NODE]], ptr [[Y]], i64 [[INDVARS_IV]], i32 3 +; CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[D]], align 8, !tbaa [[TBAA7:![0-9]+]] +; CHECK-NEXT: [[D18:%.*]] = getelementptr inbounds [[STRUCT_NODE]], ptr [[X]], i64 [[INDVARS_IV]], i32 3 +; CHECK-NEXT: store ptr [[TMP2]], ptr [[D18]], align 8, !tbaa [[TBAA7]] +; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 +; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] +; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]] +; +entry: + %cmp34 = icmp sgt i32 %n, 0 + br i1 %cmp34, label %for.body.preheader, label %for.cond.cleanup + +for.body.preheader: + %wide.trip.count = zext i32 %n to i64 + br label %for.body + +for.cond.cleanup: + ret void + +for.body: + %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] + %arrayidx = getelementptr inbounds %struct.node, ptr %y, i64 %indvars.iv + %0 = load i64, ptr %arrayidx, align 8, !tbaa !4 + %arrayidx2 = getelementptr inbounds %struct.node, ptr %x, i64 %indvars.iv + store i64 %0, ptr %arrayidx2, align 8, !tbaa !4 + %b = getelementptr inbounds %struct.node, ptr %y, i64 %indvars.iv, i32 1 + %1 = load i64, ptr %b, align 8, !tbaa !10 + %b8 = getelementptr inbounds %struct.node, ptr %x, i64 %indvars.iv, i32 1 + store i64 %1, ptr %b8, align 8, !tbaa !10 + %c = getelementptr inbounds %struct.node, ptr %y, i64 %indvars.iv, i32 2 + %2 = load ptr, ptr %c, align 8, !tbaa !11 + %c13 = getelementptr inbounds %struct.node, ptr %x, i64 %indvars.iv, i32 2 + store ptr %2, ptr %c13, align 8, !tbaa !11 + %d = getelementptr inbounds %struct.node, ptr %y, i64 %indvars.iv, i32 3 + %3 = load ptr, ptr %d, align 8, !tbaa !12 + %d18 = getelementptr inbounds %struct.node, ptr %x, i64 %indvars.iv, i32 3 + store ptr %3, ptr %d18, align 8, !tbaa !12 + %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 + %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count + br i1 %exitcond.not, label %for.cond.cleanup, label %for.body +} + +!4 = !{!5, !6, i64 0} +!5 = !{!"", !6, i64 0, !6, i64 8, !9, i64 16, !9, i64 24} +!6 = !{!"long", !7, i64 0} +!7 = !{!"omnipotent char", !8, i64 0} +!8 = !{!"Simple C/C++ TBAA"} +!9 = !{!"any pointer", !7, i64 0} +!10 = !{!5, !6, i64 8} +!11 = !{!5, !9, i64 16} +!12 = !{!5, !9, i64 24} + -- 2.7.4