From e8bdde228955b951fad707680fbd4a83e175f192 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Fri, 2 Mar 2018 15:01:31 +0100 Subject: [PATCH] ac: add ac_build_isign() Signed-off-by: Samuel Pitoiset Reviewed-by: Timothy Arceri --- src/amd/common/ac_llvm_build.c | 23 ++++++++++++++++++++ src/amd/common/ac_llvm_build.h | 3 +++ src/amd/common/ac_nir_to_llvm.c | 26 ++--------------------- src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c | 10 ++------- 4 files changed, 30 insertions(+), 32 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 1a245bd..cab8396 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd/common/ac_llvm_build.c @@ -1708,6 +1708,29 @@ LLVMValueRef ac_build_fract(struct ac_llvm_context *ctx, LLVMValueRef src0, return LLVMBuildFSub(ctx->builder, src0, floor, ""); } +LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0, + unsigned bitsize) +{ + LLVMValueRef cmp, val, zero, one; + LLVMTypeRef type; + + if (bitsize == 32) { + type = ctx->i32; + zero = ctx->i32_0; + one = ctx->i32_1; + } else { + type = ctx->i64; + zero = ctx->i64_0; + one = ctx->i64_1; + } + + cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, zero, ""); + val = LLVMBuildSelect(ctx->builder, cmp, one, src0, ""); + cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, zero, ""); + val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(type, -1, true), ""); + return val; +} + void ac_get_image_intr_name(const char *base_name, LLVMTypeRef data_type, LLVMTypeRef coords_type, diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h index 1a480eb..860c25f 100644 --- a/src/amd/common/ac_llvm_build.h +++ b/src/amd/common/ac_llvm_build.h @@ -338,6 +338,9 @@ void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned simm16); LLVMValueRef ac_build_fract(struct ac_llvm_context *ctx, LLVMValueRef src0, unsigned bitsize); +LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0, + unsigned bitsize); + void ac_get_image_intr_name(const char *base_name, LLVMTypeRef data_type, LLVMTypeRef coords_type, diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index a2c0706..70198fb 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -1362,29 +1362,6 @@ static LLVMValueRef emit_fsign(struct ac_llvm_context *ctx, return val; } -static LLVMValueRef emit_isign(struct ac_llvm_context *ctx, - LLVMValueRef src0, unsigned bitsize) -{ - LLVMValueRef cmp, val, zero, one; - LLVMTypeRef type; - - if (bitsize == 32) { - type = ctx->i32; - zero = ctx->i32_0; - one = ctx->i32_1; - } else { - type = ctx->i64; - zero = ctx->i64_0; - one = ctx->i64_1; - } - - cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, zero, ""); - val = LLVMBuildSelect(ctx->builder, cmp, one, src0, ""); - cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, zero, ""); - val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(type, -1, true), ""); - return val; -} - static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx, const char *intrin, LLVMValueRef src0, LLVMValueRef src1) @@ -1807,7 +1784,8 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr) result = emit_minmax_int(&ctx->ac, LLVMIntULT, src[0], src[1]); break; case nir_op_isign: - result = emit_isign(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size); + result = ac_build_isign(&ctx->ac, src[0], + instr->dest.dest.ssa.bit_size); break; case nir_op_fsign: src[0] = ac_to_float(&ctx->ac, src[0]); diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c index c9ebc90..8798493 100644 --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c @@ -353,15 +353,9 @@ static void emit_ssg(const struct lp_build_tgsi_action *action, LLVMValueRef cmp, val; if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_I64SSG) { - cmp = LLVMBuildICmp(builder, LLVMIntSGT, emit_data->args[0], bld_base->int64_bld.zero, ""); - val = LLVMBuildSelect(builder, cmp, bld_base->int64_bld.one, emit_data->args[0], ""); - cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, bld_base->int64_bld.zero, ""); - val = LLVMBuildSelect(builder, cmp, val, LLVMConstInt(ctx->i64, -1, true), ""); + val = ac_build_isign(&ctx->ac, emit_data->args[0], 64); } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_ISSG) { - cmp = LLVMBuildICmp(builder, LLVMIntSGT, emit_data->args[0], ctx->i32_0, ""); - val = LLVMBuildSelect(builder, cmp, ctx->i32_1, emit_data->args[0], ""); - cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, ctx->i32_0, ""); - val = LLVMBuildSelect(builder, cmp, val, LLVMConstInt(ctx->i32, -1, true), ""); + val = ac_build_isign(&ctx->ac, emit_data->args[0], 32); } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_DSSG) { cmp = LLVMBuildFCmp(builder, LLVMRealOGT, emit_data->args[0], bld_base->dbl_bld.zero, ""); val = LLVMBuildSelect(builder, cmp, bld_base->dbl_bld.one, emit_data->args[0], ""); -- 2.7.4