From e86c7c863e465a2f532cc281ea73392b72ba5c78 Mon Sep 17 00:00:00 2001 From: Jian Zhou Date: Wed, 25 Nov 2015 17:12:20 -0800 Subject: [PATCH] Speed up h_predictor_16x16 Relocate the function from SSSE3 to SSE2, Unroll loop from 8 to 4, and reduce mem access to left. Speed up by >20% in ./test_intra_pred_speed. Change-Id: Ie48229c2e32404706b722442942c84983bda74cc --- test/test_intra_pred_speed.cc | 4 ++-- vpx_dsp/vpx_dsp_rtcd_defs.pl | 2 +- vpx_dsp/x86/intrapred_sse2.asm | 24 ++++++++++++++++++++++++ vpx_dsp/x86/intrapred_ssse3.asm | 18 ------------------ 4 files changed, 27 insertions(+), 21 deletions(-) diff --git a/test/test_intra_pred_speed.cc b/test/test_intra_pred_speed.cc index d3f5470..c270072 100644 --- a/test/test_intra_pred_speed.cc +++ b/test/test_intra_pred_speed.cc @@ -290,13 +290,13 @@ INTRA_PRED_TEST(SSE2, TestIntraPred16, vpx_dc_predictor_16x16_sse2, vpx_dc_left_predictor_16x16_sse2, vpx_dc_top_predictor_16x16_sse2, vpx_dc_128_predictor_16x16_sse2, vpx_v_predictor_16x16_sse2, - NULL, NULL, NULL, NULL, NULL, NULL, NULL, + vpx_h_predictor_16x16_sse2, NULL, NULL, NULL, NULL, NULL, NULL, vpx_tm_predictor_16x16_sse2) #endif // HAVE_SSE2 && CONFIG_USE_X86INC #if HAVE_SSSE3 && CONFIG_USE_X86INC INTRA_PRED_TEST(SSSE3, TestIntraPred16, NULL, NULL, NULL, NULL, NULL, - vpx_h_predictor_16x16_ssse3, vpx_d45_predictor_16x16_ssse3, + NULL, vpx_d45_predictor_16x16_ssse3, NULL, NULL, vpx_d153_predictor_16x16_ssse3, vpx_d207_predictor_16x16_ssse3, vpx_d63_predictor_16x16_ssse3, NULL) diff --git a/vpx_dsp/vpx_dsp_rtcd_defs.pl b/vpx_dsp/vpx_dsp_rtcd_defs.pl index 989171b..f6152f5 100644 --- a/vpx_dsp/vpx_dsp_rtcd_defs.pl +++ b/vpx_dsp/vpx_dsp_rtcd_defs.pl @@ -178,7 +178,7 @@ add_proto qw/void vpx_d63e_predictor_16x16/, "uint8_t *dst, ptrdiff_t y_stride, specialize qw/vpx_d63e_predictor_16x16/; add_proto qw/void vpx_h_predictor_16x16/, "uint8_t *dst, ptrdiff_t y_stride, const uint8_t *above, const uint8_t *left"; -specialize qw/vpx_h_predictor_16x16 neon dspr2 msa/, "$ssse3_x86inc"; +specialize qw/vpx_h_predictor_16x16 neon dspr2 msa/, "$sse2_x86inc"; add_proto qw/void vpx_d117_predictor_16x16/, "uint8_t *dst, ptrdiff_t y_stride, const uint8_t *above, const uint8_t *left"; specialize qw/vpx_d117_predictor_16x16/; diff --git a/vpx_dsp/x86/intrapred_sse2.asm b/vpx_dsp/x86/intrapred_sse2.asm index 8b6fcc2..7971e27 100644 --- a/vpx_dsp/x86/intrapred_sse2.asm +++ b/vpx_dsp/x86/intrapred_sse2.asm @@ -557,6 +557,30 @@ cglobal h_predictor_8x8, 2, 5, 3, dst, stride, line, left REP_RET INIT_XMM sse2 +cglobal h_predictor_16x16, 2, 5, 3, dst, stride, line, left + movifnidn leftq, leftmp + mov lineq, -4 + DEFINE_ARGS dst, stride, line, left, stride3 + lea stride3q, [strideq*3] +.loop: + movd m0, [leftq] + punpcklbw m0, m0 + punpcklbw m0, m0 ; l1 to l4 each repeated 4 times + pshufd m1, m0, 0x0 ; l1 repeated 16 times + pshufd m2, m0, 0x55 ; l2 repeated 16 times + mova [dstq ], m1 + mova [dstq+strideq ], m2 + pshufd m1, m0, 0xaa + pshufd m2, m0, 0xff + mova [dstq+strideq*2], m1 + mova [dstq+stride3q ], m2 + inc lineq + lea leftq, [leftq+4 ] + lea dstq, [dstq+strideq*4] + jnz .loop + REP_RET + +INIT_XMM sse2 cglobal tm_predictor_4x4, 4, 4, 5, dst, stride, above, left pxor m1, m1 movq m0, [aboveq-1]; [63:0] tl t1 t2 t3 t4 x x x diff --git a/vpx_dsp/x86/intrapred_ssse3.asm b/vpx_dsp/x86/intrapred_ssse3.asm index 7877c53..f1a193b 100644 --- a/vpx_dsp/x86/intrapred_ssse3.asm +++ b/vpx_dsp/x86/intrapred_ssse3.asm @@ -34,24 +34,6 @@ sh_b2333: db 2, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 SECTION .text INIT_XMM ssse3 -cglobal h_predictor_16x16, 2, 4, 3, dst, stride, line, left - movifnidn leftq, leftmp - add leftq, 16 - mov lineq, -8 - pxor m0, m0 -.loop: - movd m1, [leftq+lineq*2 ] - movd m2, [leftq+lineq*2+1] - pshufb m1, m0 - pshufb m2, m0 - mova [dstq ], m1 - mova [dstq+strideq], m2 - lea dstq, [dstq+strideq*2] - inc lineq - jnz .loop - REP_RET - -INIT_XMM ssse3 cglobal h_predictor_32x32, 2, 4, 3, dst, stride, line, left movifnidn leftq, leftmp add leftq, 32 -- 2.7.4