From e868ab037f86a0143e9dd6d20e32e34ce9454040 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Tue, 5 Oct 2010 10:14:26 -0700 Subject: [PATCH] Staging: brcm80211: phy: s/uint8/u8/ Replace uint8 with u8, the correct kernel type to be using here. Cc: Brett Rudley Cc: Henry Ptasinski Cc: Nohee Ko Signed-off-by: Greg Kroah-Hartman --- drivers/staging/brcm80211/phy/wlc_phy_cmn.c | 158 ++--- drivers/staging/brcm80211/phy/wlc_phy_hal.h | 68 +-- drivers/staging/brcm80211/phy/wlc_phy_int.h | 254 ++++---- drivers/staging/brcm80211/phy/wlc_phy_lcn.c | 176 +++--- drivers/staging/brcm80211/phy/wlc_phy_lcn.h | 74 +-- drivers/staging/brcm80211/phy/wlc_phy_n.c | 778 ++++++++++++------------- drivers/staging/brcm80211/phy/wlc_phytbl_lcn.c | 10 +- drivers/staging/brcm80211/phy/wlc_phytbl_n.c | 22 +- 8 files changed, 770 insertions(+), 770 deletions(-) diff --git a/drivers/staging/brcm80211/phy/wlc_phy_cmn.c b/drivers/staging/brcm80211/phy/wlc_phy_cmn.c index cafd76d..5d470dd 100644 --- a/drivers/staging/brcm80211/phy/wlc_phy_cmn.c +++ b/drivers/staging/brcm80211/phy/wlc_phy_cmn.c @@ -111,7 +111,7 @@ uint16 ltrn_list[PHY_LTRN_LIST_LEN] = { 0x0507, 0x0fea, 0xe4f2, 0xf6e6 }; -const uint8 ofdm_rate_lookup[] = { +const u8 ofdm_rate_lookup[] = { WLC_RATE_48M, WLC_RATE_24M, @@ -133,16 +133,16 @@ static bool wlc_phy_noise_calc_phy(phy_info_t *pi, uint32 *cmplx_pwr, int8 *pwr_ant); static void wlc_phy_cal_perical_mphase_schedule(phy_info_t *pi, uint delay); -static void wlc_phy_noise_cb(phy_info_t *pi, uint8 channel, int8 noise_dbm); -static void wlc_phy_noise_sample_request(wlc_phy_t *pih, uint8 reason, - uint8 ch); +static void wlc_phy_noise_cb(phy_info_t *pi, u8 channel, int8 noise_dbm); +static void wlc_phy_noise_sample_request(wlc_phy_t *pih, u8 reason, + u8 ch); static void wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, struct txpwr_limits *tp, chanspec_t); static bool wlc_phy_cal_txpower_recalc_sw(phy_info_t *pi); static int8 wlc_user_txpwr_antport_to_rfport(phy_info_t *pi, uint chan, - uint32 band, uint8 rate); + uint32 band, u8 rate); static void wlc_phy_upd_env_txpwr_rate_limits(phy_info_t *pi, uint32 band); static int8 wlc_phy_env_measure_vbat(phy_info_t *pi); static int8 wlc_phy_env_measure_temperature(phy_info_t *pi); @@ -1124,7 +1124,7 @@ wlc_phy_write_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, uint tbl_id = ptbl_info->tbl_id; uint tbl_offset = ptbl_info->tbl_offset; uint tbl_width = ptbl_info->tbl_width; - const uint8 *ptbl_8b = (const uint8 *)ptbl_info->tbl_ptr; + const u8 *ptbl_8b = (const u8 *)ptbl_info->tbl_ptr; const uint16 *ptbl_16b = (const uint16 *)ptbl_info->tbl_ptr; const uint32 *ptbl_32b = (const uint32 *)ptbl_info->tbl_ptr; @@ -1167,7 +1167,7 @@ wlc_phy_read_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, uint tbl_id = ptbl_info->tbl_id; uint tbl_offset = ptbl_info->tbl_offset; uint tbl_width = ptbl_info->tbl_width; - uint8 *ptbl_8b = (uint8 *) (uintptr) ptbl_info->tbl_ptr; + u8 *ptbl_8b = (u8 *) (uintptr) ptbl_info->tbl_ptr; uint16 *ptbl_16b = (uint16 *) (uintptr) ptbl_info->tbl_ptr; uint32 *ptbl_32b = (uint32 *) (uintptr) ptbl_info->tbl_ptr; @@ -1195,7 +1195,7 @@ wlc_phy_read_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, ptbl_16b[idx] = read_phy_reg(pi, tblDataLo); } else { - ptbl_8b[idx] = (uint8) read_phy_reg(pi, tblDataLo); + ptbl_8b[idx] = (u8) read_phy_reg(pi, tblDataLo); } } } @@ -1256,11 +1256,11 @@ void wlc_phy_do_dummy_tx(phy_info_t *pi, bool ofdm, bool pa_on) #define DUMMY_PKT_LEN 20 d11regs_t *regs = pi->regs; int i, count; - uint8 ofdmpkt[DUMMY_PKT_LEN] = { + u8 ofdmpkt[DUMMY_PKT_LEN] = { 0xcc, 0x01, 0x02, 0x00, 0x00, 0x00, 0xd4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00 }; - uint8 cckpkt[DUMMY_PKT_LEN] = { + u8 cckpkt[DUMMY_PKT_LEN] = { 0x6e, 0x84, 0x0b, 0x00, 0x00, 0x00, 0xd4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00 }; @@ -1673,7 +1673,7 @@ int wlc_phy_txpower_set(wlc_phy_t *ppi, uint qdbm, bool override) return 5; for (i = 0; i < TXP_NUM_RATES; i++) - pi->tx_user_target[i] = (uint8) qdbm; + pi->tx_user_target[i] = (u8) qdbm; pi->txpwroverride = FALSE; @@ -1700,8 +1700,8 @@ int wlc_phy_txpower_set(wlc_phy_t *ppi, uint qdbm, bool override) } void -wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint channel, uint8 *min_pwr, - uint8 *max_pwr, int txp_rate_idx) +wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint channel, u8 *min_pwr, + u8 *max_pwr, int txp_rate_idx) { phy_info_t *pi = (phy_info_t *) ppi; uint i; @@ -1712,7 +1712,7 @@ wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint channel, uint8 *min_pwr, if (txp_rate_idx < 0) txp_rate_idx = TXP_FIRST_CCK; wlc_phy_txpower_sromlimit_get_nphy(pi, channel, max_pwr, - (uint8) txp_rate_idx); + (u8) txp_rate_idx); } else if ((channel <= CH_MAX_2G_CHANNEL)) { if (txp_rate_idx < 0) @@ -1751,14 +1751,14 @@ wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint channel, uint8 *min_pwr, } void -wlc_phy_txpower_sromlimit_max_get(wlc_phy_t *ppi, uint chan, uint8 *max_txpwr, - uint8 *min_txpwr) +wlc_phy_txpower_sromlimit_max_get(wlc_phy_t *ppi, uint chan, u8 *max_txpwr, + u8 *min_txpwr) { phy_info_t *pi = (phy_info_t *) ppi; - uint8 tx_pwr_max = 0; - uint8 tx_pwr_min = 255; - uint8 max_num_rate; - uint8 maxtxpwr, mintxpwr, rate, pactrl; + u8 tx_pwr_max = 0; + u8 tx_pwr_min = 255; + u8 max_num_rate; + u8 maxtxpwr, mintxpwr, rate, pactrl; pactrl = 0; @@ -1788,14 +1788,14 @@ wlc_phy_txpower_boardlimit_band(wlc_phy_t *ppi, uint bandunit, int32 *max_pwr, return; } -uint8 wlc_phy_txpower_get_target_min(wlc_phy_t *ppi) +u8 wlc_phy_txpower_get_target_min(wlc_phy_t *ppi) { phy_info_t *pi = (phy_info_t *) ppi; return pi->tx_power_min; } -uint8 wlc_phy_txpower_get_target_max(wlc_phy_t *ppi) +u8 wlc_phy_txpower_get_target_max(wlc_phy_t *ppi) { phy_info_t *pi = (phy_info_t *) ppi; @@ -1804,14 +1804,14 @@ uint8 wlc_phy_txpower_get_target_max(wlc_phy_t *ppi) void wlc_phy_txpower_recalc_target(phy_info_t *pi) { - uint8 maxtxpwr, mintxpwr, rate, pactrl; + u8 maxtxpwr, mintxpwr, rate, pactrl; uint target_chan; - uint8 tx_pwr_target[TXP_NUM_RATES]; - uint8 tx_pwr_max = 0; - uint8 tx_pwr_min = 255; - uint8 tx_pwr_max_rate_ind = 0; - uint8 max_num_rate; - uint8 start_rate = 0; + u8 tx_pwr_target[TXP_NUM_RATES]; + u8 tx_pwr_max = 0; + u8 tx_pwr_min = 255; + u8 tx_pwr_max_rate_ind = 0; + u8 max_num_rate; + u8 start_rate = 0; chanspec_t chspec; uint32 band = CHSPEC2WLC_BAND(pi->radio_chanspec); initfn_t txpwr_recalc_fn = NULL; @@ -1924,8 +1924,8 @@ void wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, struct txpwr_limits *txpwr, chanspec_t chanspec) { - uint8 tmp_txpwr_limit[2 * WLC_NUM_RATES_OFDM]; - uint8 *txpwr_ptr1 = NULL, *txpwr_ptr2 = NULL; + u8 tmp_txpwr_limit[2 * WLC_NUM_RATES_OFDM]; + u8 *txpwr_ptr1 = NULL, *txpwr_ptr2 = NULL; int rate_start_index = 0, rate1, rate2, k; for (rate1 = WL_TX_POWER_CCK_FIRST, rate2 = 0; @@ -2073,7 +2073,7 @@ wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, struct txpwr_limits *txpwr, } } -void wlc_phy_txpwr_percent_set(wlc_phy_t *ppi, uint8 txpwr_percent) +void wlc_phy_txpwr_percent_set(wlc_phy_t *ppi, u8 txpwr_percent) { phy_info_t *pi = (phy_info_t *) ppi; @@ -2182,7 +2182,7 @@ void wlc_phy_txpower_update_shm(phy_info_t *pi) pi->hwpwr_txcur); for (j = TXP_FIRST_OFDM; j <= TXP_LAST_OFDM; j++) { - const uint8 ucode_ofdm_rates[] = { + const u8 ucode_ofdm_rates[] = { 0x0c, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6c }; offset = wlapi_bmac_rate_shm_offset(pi->sh->physhim, @@ -2201,7 +2201,7 @@ void wlc_phy_txpower_update_shm(phy_info_t *pi) for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++) pi->tx_power_offset[i] = - (uint8) ROUNDUP(pi->tx_power_offset[i], 8); + (u8) ROUNDUP(pi->tx_power_offset[i], 8); wlapi_bmac_write_shm(pi->sh->physhim, M_OFDM_OFFSET, (uint16) ((pi-> tx_power_offset[TXP_FIRST_OFDM] @@ -2276,7 +2276,7 @@ static uint32 wlc_phy_txpower_est_power_nphy(phy_info_t *pi) { int16 tx0_status, tx1_status; uint16 estPower1, estPower2; - uint8 pwr0, pwr1, adj_pwr0, adj_pwr1; + u8 pwr0, pwr1, adj_pwr0, adj_pwr1; uint32 est_pwr; estPower1 = read_phy_reg(pi, 0x118); @@ -2284,7 +2284,7 @@ static uint32 wlc_phy_txpower_est_power_nphy(phy_info_t *pi) if ((estPower1 & (0x1 << 8)) == (0x1 << 8)) { - pwr0 = (uint8) (estPower1 & (0xff << 0)) + pwr0 = (u8) (estPower1 & (0xff << 0)) >> 0; } else { pwr0 = 0x80; @@ -2292,7 +2292,7 @@ static uint32 wlc_phy_txpower_est_power_nphy(phy_info_t *pi) if ((estPower2 & (0x1 << 8)) == (0x1 << 8)) { - pwr1 = (uint8) (estPower2 & (0xff << 0)) + pwr1 = (u8) (estPower2 & (0xff << 0)) >> 0; } else { pwr1 = 0x80; @@ -2303,14 +2303,14 @@ static uint32 wlc_phy_txpower_est_power_nphy(phy_info_t *pi) if ((tx0_status & (0x1 << 15)) == (0x1 << 15)) { - adj_pwr0 = (uint8) (tx0_status & (0xff << 0)) + adj_pwr0 = (u8) (tx0_status & (0xff << 0)) >> 0; } else { adj_pwr0 = 0x80; } if ((tx1_status & (0x1 << 15)) == (0x1 << 15)) { - adj_pwr1 = (uint8) (tx1_status & (0xff << 0)) + adj_pwr1 = (u8) (tx1_status & (0xff << 0)) >> 0; } else { adj_pwr1 = 0x80; @@ -2326,7 +2326,7 @@ wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, uint channel) { phy_info_t *pi = (phy_info_t *) ppi; uint rate, num_rates; - uint8 min_pwr, max_pwr; + u8 min_pwr, max_pwr; #if WL_TX_POWER_RATES != TXP_NUM_RATES #error "tx_power_t struct out of sync with this fn" @@ -2355,7 +2355,7 @@ wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, uint channel) power->user_limit[rate] = pi->tx_user_target[rate]; wlc_phy_txpower_sromlimit(ppi, channel, &min_pwr, &max_pwr, rate); - power->board_limit[rate] = (uint8) max_pwr; + power->board_limit[rate] = (u8) max_pwr; power->target[rate] = pi->tx_power_target[rate]; } @@ -2419,7 +2419,7 @@ wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, uint channel) } } -void wlc_phy_antsel_type_set(wlc_phy_t *ppi, uint8 antsel_type) +void wlc_phy_antsel_type_set(wlc_phy_t *ppi, u8 antsel_type) { phy_info_t *pi = (phy_info_t *) ppi; @@ -2433,7 +2433,7 @@ bool wlc_phy_test_ison(wlc_phy_t *ppi) return pi->phytest_on; } -bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, uint8 *pval) +bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, u8 *pval) { phy_info_t *pi = (phy_info_t *) ppi; bool ret = TRUE; @@ -2454,7 +2454,7 @@ bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, uint8 *pval) return ret; } -void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, uint8 val) +void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val) { phy_info_t *pi = (phy_info_t *) ppi; bool suspend; @@ -2507,9 +2507,9 @@ static bool wlc_phy_noise_calc_phy(phy_info_t *pi, uint32 *cmplx_pwr, int8 *pwr_ant) { int8 cmplx_pwr_dbm[PHY_CORE_MAX]; - uint8 i; + u8 i; - bzero((uint8 *) cmplx_pwr_dbm, sizeof(cmplx_pwr_dbm)); + bzero((u8 *) cmplx_pwr_dbm, sizeof(cmplx_pwr_dbm)); ASSERT(pi->pubpi.phy_corenum <= PHY_CORE_MAX); wlc_phy_compute_dB(cmplx_pwr, cmplx_pwr_dbm, pi->pubpi.phy_corenum); @@ -2531,7 +2531,7 @@ wlc_phy_noise_calc_phy(phy_info_t *pi, uint32 *cmplx_pwr, int8 *pwr_ant) } static void -wlc_phy_noise_sample_request(wlc_phy_t *pih, uint8 reason, uint8 ch) +wlc_phy_noise_sample_request(wlc_phy_t *pih, u8 reason, u8 ch) { phy_info_t *pi = (phy_info_t *) pih; int8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; @@ -2619,13 +2619,13 @@ wlc_phy_noise_sample_request(wlc_phy_t *pih, uint8 reason, uint8 ch) uint32 cmplx_pwr[PHY_CORE_MAX]; int8 noise_dbm_ant[PHY_CORE_MAX]; uint16 log_num_samps, num_samps, classif_state = 0; - uint8 wait_time = 32; - uint8 wait_crs = 0; - uint8 i; + u8 wait_time = 32; + u8 wait_crs = 0; + u8 i; - bzero((uint8 *) est, sizeof(est)); - bzero((uint8 *) cmplx_pwr, sizeof(cmplx_pwr)); - bzero((uint8 *) noise_dbm_ant, sizeof(noise_dbm_ant)); + bzero((u8 *) est, sizeof(est)); + bzero((u8 *) cmplx_pwr, sizeof(cmplx_pwr)); + bzero((u8 *) noise_dbm_ant, sizeof(noise_dbm_ant)); log_num_samps = PHY_NOISE_SAMPLE_LOG_NUM_NPHY; num_samps = 1 << log_num_samps; @@ -2668,14 +2668,14 @@ wlc_phy_noise_sample_request(wlc_phy_t *pih, uint8 reason, uint8 ch) void wlc_phy_noise_sample_request_external(wlc_phy_t *pih) { - uint8 channel; + u8 channel; channel = CHSPEC_CHANNEL(wlc_phy_chanspec_get(pih)); wlc_phy_noise_sample_request(pih, PHY_NOISE_SAMPLE_EXTERNAL, channel); } -static void wlc_phy_noise_cb(phy_info_t *pi, uint8 channel, int8 noise_dbm) +static void wlc_phy_noise_cb(phy_info_t *pi, u8 channel, int8 noise_dbm) { if (!pi->phynoise_state) return; @@ -2703,11 +2703,11 @@ static int8 wlc_phy_noise_read_shmem(phy_info_t *pi) uint16 lo, hi; uint32 cmplx_pwr_tot = 0; int8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; - uint8 idx, core; + u8 idx, core; ASSERT(pi->pubpi.phy_corenum <= PHY_CORE_MAX); - bzero((uint8 *) cmplx_pwr, sizeof(cmplx_pwr)); - bzero((uint8 *) noise_dbm_ant, sizeof(noise_dbm_ant)); + bzero((u8 *) cmplx_pwr, sizeof(cmplx_pwr)); + bzero((u8 *) noise_dbm_ant, sizeof(noise_dbm_ant)); for (idx = 0, core = 0; core < pi->pubpi.phy_corenum; idx += 2, core++) { lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP(idx)); @@ -2742,7 +2742,7 @@ void wlc_phy_noise_sample_intr(wlc_phy_t *pih) { phy_info_t *pi = (phy_info_t *) pih; uint16 jssi_aux; - uint8 channel = 0; + u8 channel = 0; int8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; if (ISLCNPHY(pi)) { @@ -2836,9 +2836,9 @@ int8 lcnphy_gain_index_offset_for_pkt_rssi[] = { 0 }; -void wlc_phy_compute_dB(uint32 *cmplx_pwr, int8 *p_cmplx_pwr_dB, uint8 core) +void wlc_phy_compute_dB(uint32 *cmplx_pwr, int8 *p_cmplx_pwr_dB, u8 core) { - uint8 shift_ct, lsb, msb, secondmsb, i; + u8 shift_ct, lsb, msb, secondmsb, i; uint32 tmp; for (i = 0; i < core; i++) { @@ -2847,11 +2847,11 @@ void wlc_phy_compute_dB(uint32 *cmplx_pwr, int8 *p_cmplx_pwr_dB, uint8 core) while (tmp != 0) { tmp = tmp >> 1; shift_ct++; - lsb = (uint8) (tmp & 1); + lsb = (u8) (tmp & 1); if (lsb == 1) msb = shift_ct; } - secondmsb = (uint8) ((cmplx_pwr[i] >> (msb - 1)) & 1); + secondmsb = (u8) ((cmplx_pwr[i] >> (msb - 1)) & 1); p_cmplx_pwr_dB[i] = (int8) (3 * msb + 2 * secondmsb); } } @@ -2876,7 +2876,7 @@ void BCMFASTPATH wlc_phy_rssi_compute(wlc_phy_t *pih, void *ctx) } if (ISLCNPHY(pi)) { - uint8 gidx = (ltoh16(rxh->PhyRxStatus_2) & 0xFC00) >> 10; + u8 gidx = (ltoh16(rxh->PhyRxStatus_2) & 0xFC00) >> 10; phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; if (rssi > 127) @@ -3117,7 +3117,7 @@ static void wlc_phy_cal_perical_mphase_schedule(phy_info_t *pi, uint delay) wlapi_add_timer(pi->sh->physhim, pi->phycal_timer, delay, 0); } -void wlc_phy_cal_perical(wlc_phy_t *pih, uint8 reason) +void wlc_phy_cal_perical(wlc_phy_t *pih, u8 reason) { int16 nphy_currtemp = 0; int16 delta_temp = 0; @@ -3207,10 +3207,10 @@ void wlc_phy_cal_perical_mphase_restart(phy_info_t *pi) pi->mphase_txcal_cmdidx = 0; } -uint8 wlc_phy_nbits(int32 value) +u8 wlc_phy_nbits(int32 value) { int32 abs_val; - uint8 nbits = 0; + u8 nbits = 0; abs_val = ABS(value); while ((abs_val >> nbits) > 0) @@ -3238,7 +3238,7 @@ uint32 wlc_phy_sqrt_int(uint32 value) return root; } -void wlc_phy_stf_chain_init(wlc_phy_t *pih, uint8 txchain, uint8 rxchain) +void wlc_phy_stf_chain_init(wlc_phy_t *pih, u8 txchain, u8 rxchain) { phy_info_t *pi = (phy_info_t *) pih; @@ -3246,10 +3246,10 @@ void wlc_phy_stf_chain_init(wlc_phy_t *pih, uint8 txchain, uint8 rxchain) pi->sh->hw_phyrxchain = rxchain; pi->sh->phytxchain = txchain; pi->sh->phyrxchain = rxchain; - pi->pubpi.phy_corenum = (uint8) PHY_BITSCNT(pi->sh->phyrxchain); + pi->pubpi.phy_corenum = (u8) PHY_BITSCNT(pi->sh->phyrxchain); } -void wlc_phy_stf_chain_set(wlc_phy_t *pih, uint8 txchain, uint8 rxchain) +void wlc_phy_stf_chain_set(wlc_phy_t *pih, u8 txchain, u8 rxchain) { phy_info_t *pi = (phy_info_t *) pih; @@ -3258,10 +3258,10 @@ void wlc_phy_stf_chain_set(wlc_phy_t *pih, uint8 txchain, uint8 rxchain) if (ISNPHY(pi)) { wlc_phy_rxcore_setstate_nphy(pih, rxchain); } - pi->pubpi.phy_corenum = (uint8) PHY_BITSCNT(pi->sh->phyrxchain); + pi->pubpi.phy_corenum = (u8) PHY_BITSCNT(pi->sh->phyrxchain); } -void wlc_phy_stf_chain_get(wlc_phy_t *pih, uint8 *txchain, uint8 *rxchain) +void wlc_phy_stf_chain_get(wlc_phy_t *pih, u8 *txchain, u8 *rxchain) { phy_info_t *pi = (phy_info_t *) pih; @@ -3269,10 +3269,10 @@ void wlc_phy_stf_chain_get(wlc_phy_t *pih, uint8 *txchain, uint8 *rxchain) *rxchain = pi->sh->phyrxchain; } -uint8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih) +u8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih) { int16 nphy_currtemp; - uint8 active_bitmap; + u8 active_bitmap; phy_info_t *pi = (phy_info_t *) pih; active_bitmap = (pi->phy_txcore_heatedup) ? 0x31 : 0x33; @@ -3304,7 +3304,7 @@ uint8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih) int8 wlc_phy_stf_ssmode_get(wlc_phy_t *pih, chanspec_t chanspec) { phy_info_t *pi = (phy_info_t *) pih; - uint8 siso_mcs_id, cdd_mcs_id; + u8 siso_mcs_id, cdd_mcs_id; siso_mcs_id = (CHSPEC_IS40(chanspec)) ? TXP_FIRST_MCS_40_SISO : @@ -3320,7 +3320,7 @@ int8 wlc_phy_stf_ssmode_get(wlc_phy_t *pih, chanspec_t chanspec) return PHY_TXC1_MODE_CDD; } -const uint8 *wlc_phy_get_ofdm_rate_lookup(void) +const u8 *wlc_phy_get_ofdm_rate_lookup(void) { return ofdm_rate_lookup; } @@ -3364,7 +3364,7 @@ void wlc_lcnphy_epa_switch(phy_info_t *pi, bool mode) static int8 wlc_user_txpwr_antport_to_rfport(phy_info_t *pi, uint chan, uint32 band, - uint8 rate) + u8 rate) { int8 offset = 0; @@ -3391,7 +3391,7 @@ static int8 wlc_phy_env_measure_temperature(phy_info_t *pi) static void wlc_phy_upd_env_txpwr_rate_limits(phy_info_t *pi, uint32 band) { - uint8 i; + u8 i; int8 temp, vbat; for (i = 0; i < TXP_NUM_RATES; i++) @@ -3414,7 +3414,7 @@ wlc_phy_get_pwrdet_offsets(phy_info_t *pi, int8 *cckoffset, int8 *ofdmoffset) *ofdmoffset = 0; } -uint32 wlc_phy_qdiv_roundup(uint32 dividend, uint32 divisor, uint8 precision) +uint32 wlc_phy_qdiv_roundup(uint32 dividend, uint32 divisor, u8 precision) { uint32 quotient, remainder, roundup, rbit; diff --git a/drivers/staging/brcm80211/phy/wlc_phy_hal.h b/drivers/staging/brcm80211/phy/wlc_phy_hal.h index 5a8b6ae..3b24436 100644 --- a/drivers/staging/brcm80211/phy/wlc_phy_hal.h +++ b/drivers/staging/brcm80211/phy/wlc_phy_hal.h @@ -94,28 +94,28 @@ #define WLC_NUM_RATES_MCS_3_STREAM 8 #define WLC_NUM_RATES_MCS_4_STREAM 8 typedef struct txpwr_limits { - uint8 cck[WLC_NUM_RATES_CCK]; - uint8 ofdm[WLC_NUM_RATES_OFDM]; + u8 cck[WLC_NUM_RATES_CCK]; + u8 ofdm[WLC_NUM_RATES_OFDM]; - uint8 ofdm_cdd[WLC_NUM_RATES_OFDM]; + u8 ofdm_cdd[WLC_NUM_RATES_OFDM]; - uint8 ofdm_40_siso[WLC_NUM_RATES_OFDM]; - uint8 ofdm_40_cdd[WLC_NUM_RATES_OFDM]; + u8 ofdm_40_siso[WLC_NUM_RATES_OFDM]; + u8 ofdm_40_cdd[WLC_NUM_RATES_OFDM]; - uint8 mcs_20_siso[WLC_NUM_RATES_MCS_1_STREAM]; - uint8 mcs_20_cdd[WLC_NUM_RATES_MCS_1_STREAM]; - uint8 mcs_20_stbc[WLC_NUM_RATES_MCS_1_STREAM]; - uint8 mcs_20_mimo[WLC_NUM_RATES_MCS_2_STREAM]; + u8 mcs_20_siso[WLC_NUM_RATES_MCS_1_STREAM]; + u8 mcs_20_cdd[WLC_NUM_RATES_MCS_1_STREAM]; + u8 mcs_20_stbc[WLC_NUM_RATES_MCS_1_STREAM]; + u8 mcs_20_mimo[WLC_NUM_RATES_MCS_2_STREAM]; - uint8 mcs_40_siso[WLC_NUM_RATES_MCS_1_STREAM]; - uint8 mcs_40_cdd[WLC_NUM_RATES_MCS_1_STREAM]; - uint8 mcs_40_stbc[WLC_NUM_RATES_MCS_1_STREAM]; - uint8 mcs_40_mimo[WLC_NUM_RATES_MCS_2_STREAM]; - uint8 mcs32; + u8 mcs_40_siso[WLC_NUM_RATES_MCS_1_STREAM]; + u8 mcs_40_cdd[WLC_NUM_RATES_MCS_1_STREAM]; + u8 mcs_40_stbc[WLC_NUM_RATES_MCS_1_STREAM]; + u8 mcs_40_mimo[WLC_NUM_RATES_MCS_2_STREAM]; + u8 mcs32; } txpwr_limits_t; typedef struct { - uint8 vec[MAXCHANNEL / NBBY]; + u8 vec[MAXCHANNEL / NBBY]; } chanvec_t; struct rpc_info; @@ -201,9 +201,9 @@ extern void wlc_phy_chanspec_band_validch(wlc_phy_t *ppi, uint band, extern chanspec_t wlc_phy_chanspec_band_firstch(wlc_phy_t *ppi, uint band); extern void wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint chan, - uint8 *_min_, uint8 *_max_, int rate); + u8 *_min_, u8 *_max_, int rate); extern void wlc_phy_txpower_sromlimit_max_get(wlc_phy_t *ppi, uint chan, - uint8 *_max_, uint8 *_min_); + u8 *_max_, u8 *_min_); extern void wlc_phy_txpower_boardlimit_band(wlc_phy_t *ppi, uint band, int32 *, int32 *, uint32 *); extern void wlc_phy_txpower_limit_set(wlc_phy_t *ppi, struct txpwr_limits *, @@ -213,39 +213,39 @@ extern int wlc_phy_txpower_set(wlc_phy_t *ppi, uint qdbm, bool override); extern void wlc_phy_txpower_target_set(wlc_phy_t *ppi, struct txpwr_limits *); extern bool wlc_phy_txpower_hw_ctrl_get(wlc_phy_t *ppi); extern void wlc_phy_txpower_hw_ctrl_set(wlc_phy_t *ppi, bool hwpwrctrl); -extern uint8 wlc_phy_txpower_get_target_min(wlc_phy_t *ppi); -extern uint8 wlc_phy_txpower_get_target_max(wlc_phy_t *ppi); +extern u8 wlc_phy_txpower_get_target_min(wlc_phy_t *ppi); +extern u8 wlc_phy_txpower_get_target_max(wlc_phy_t *ppi); extern bool wlc_phy_txpower_ipa_ison(wlc_phy_t *pih); -extern void wlc_phy_stf_chain_init(wlc_phy_t *pih, uint8 txchain, - uint8 rxchain); -extern void wlc_phy_stf_chain_set(wlc_phy_t *pih, uint8 txchain, - uint8 rxchain); -extern void wlc_phy_stf_chain_get(wlc_phy_t *pih, uint8 *txchain, - uint8 *rxchain); -extern uint8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih); +extern void wlc_phy_stf_chain_init(wlc_phy_t *pih, u8 txchain, + u8 rxchain); +extern void wlc_phy_stf_chain_set(wlc_phy_t *pih, u8 txchain, + u8 rxchain); +extern void wlc_phy_stf_chain_get(wlc_phy_t *pih, u8 *txchain, + u8 *rxchain); +extern u8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih); extern int8 wlc_phy_stf_ssmode_get(wlc_phy_t *pih, chanspec_t chanspec); extern void wlc_phy_ldpc_override_set(wlc_phy_t *ppi, bool val); -extern void wlc_phy_cal_perical(wlc_phy_t *ppi, uint8 reason); +extern void wlc_phy_cal_perical(wlc_phy_t *ppi, u8 reason); extern void wlc_phy_noise_sample_request_external(wlc_phy_t *ppi); extern void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock); extern void wlc_phy_cal_papd_recal(wlc_phy_t *ppi); -extern void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, uint8 val); -extern bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, uint8 *pval); +extern void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val); +extern bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, u8 *pval); extern void wlc_phy_clear_tssi(wlc_phy_t *ppi); extern void wlc_phy_hold_upd(wlc_phy_t *ppi, mbool id, bool val); extern void wlc_phy_mute_upd(wlc_phy_t *ppi, bool val, mbool flags); -extern void wlc_phy_antsel_type_set(wlc_phy_t *ppi, uint8 antsel_type); +extern void wlc_phy_antsel_type_set(wlc_phy_t *ppi, u8 antsel_type); extern void wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, uint channel); extern void wlc_phy_initcal_enable(wlc_phy_t *pih, bool initcal); extern bool wlc_phy_test_ison(wlc_phy_t *ppi); -extern void wlc_phy_txpwr_percent_set(wlc_phy_t *ppi, uint8 txpwr_percent); +extern void wlc_phy_txpwr_percent_set(wlc_phy_t *ppi, u8 txpwr_percent); extern void wlc_phy_ofdm_rateset_war(wlc_phy_t *pih, bool war); extern void wlc_phy_bf_preempt_enable(wlc_phy_t *pih, bool bf_preempt); extern void wlc_phy_machwcap_set(wlc_phy_t *ppi, uint32 machwcap); @@ -255,9 +255,9 @@ extern void wlc_phy_runbist_config(wlc_phy_t *ppi, bool start_end); extern void wlc_phy_freqtrack_start(wlc_phy_t *ppi); extern void wlc_phy_freqtrack_end(wlc_phy_t *ppi); -extern const uint8 *wlc_phy_get_ofdm_rate_lookup(void); +extern const u8 *wlc_phy_get_ofdm_rate_lookup(void); extern int8 wlc_phy_get_tx_power_offset_by_mcs(wlc_phy_t *ppi, - uint8 mcs_offset); -extern int8 wlc_phy_get_tx_power_offset(wlc_phy_t *ppi, uint8 tbl_offset); + u8 mcs_offset); +extern int8 wlc_phy_get_tx_power_offset(wlc_phy_t *ppi, u8 tbl_offset); #endif /* _wlc_phy_h_ */ diff --git a/drivers/staging/brcm80211/phy/wlc_phy_int.h b/drivers/staging/brcm80211/phy/wlc_phy_int.h index d5e61c4..703e85d 100644 --- a/drivers/staging/brcm80211/phy/wlc_phy_int.h +++ b/drivers/staging/brcm80211/phy/wlc_phy_int.h @@ -49,8 +49,8 @@ typedef int (*longtrnfn_t) (phy_info_t *, int); typedef void (*txiqccgetfn_t) (phy_info_t *, uint16 *, uint16 *); typedef void (*txiqccsetfn_t) (phy_info_t *, uint16, uint16); typedef uint16(*txloccgetfn_t) (phy_info_t *); -typedef void (*radioloftgetfn_t) (phy_info_t *, uint8 *, uint8 *, uint8 *, - uint8 *); +typedef void (*radioloftgetfn_t) (phy_info_t *, u8 *, u8 *, u8 *, + u8 *); typedef int32(*rxsigpwrfn_t) (phy_info_t *, int32); typedef void (*detachfn_t) (phy_info_t *); @@ -247,7 +247,7 @@ typedef enum { #define PHY_CHAIN_TX_DISABLE_TEMP 115 #define PHY_HYSTERESIS_DELTATEMP 5 -#define PHY_BITSCNT(x) bcm_bitcount((uint8 *)&(x), sizeof(uint8)) +#define PHY_BITSCNT(x) bcm_bitcount((u8 *)&(x), sizeof(u8)) #define MOD_PHY_REG(pi, phy_type, reg_name, field, value) \ mod_phy_reg(pi, phy_type##_##reg_name, phy_type##_##reg_name##_##field##_MASK, \ @@ -299,7 +299,7 @@ typedef struct phytbl_info { } phytbl_info_t; typedef struct { - uint8 curr_home_channel; + u8 curr_home_channel; uint16 crsminpwrthld_40_stored; uint16 crsminpwrthld_20L_stored; uint16 crsminpwrthld_20U_stored; @@ -426,7 +426,7 @@ typedef struct _nphy_txpwrindex { uint16 AfectrlOverride; uint16 AfeCtrlDacGain; uint16 rad_gain; - uint8 bbmult; + u8 bbmult; uint16 iqcomp_a; uint16 iqcomp_b; uint16 locomp; @@ -502,10 +502,10 @@ typedef struct { uint16 txiqlocal_a; uint16 txiqlocal_b; uint16 txiqlocal_didq; - uint8 txiqlocal_ei0; - uint8 txiqlocal_eq0; - uint8 txiqlocal_fi0; - uint8 txiqlocal_fq0; + u8 txiqlocal_ei0; + u8 txiqlocal_eq0; + u8 txiqlocal_fi0; + u8 txiqlocal_fq0; uint16 txiqlocal_bestcoeffs[11]; uint16 txiqlocal_bestcoeffs_valid; @@ -550,24 +550,24 @@ struct shared_phy { uint fast_timer; uint slow_timer; uint glacial_timer; - uint8 rx_antdiv; + u8 rx_antdiv; int8 phy_noise_window[MA_WINDOW_SZ]; uint phy_noise_index; - uint8 hw_phytxchain; - uint8 hw_phyrxchain; - uint8 phytxchain; - uint8 phyrxchain; - uint8 rssi_mode; + u8 hw_phytxchain; + u8 hw_phyrxchain; + u8 phytxchain; + u8 phyrxchain; + u8 rssi_mode; bool _rifs_phy; }; struct phy_pub { uint phy_type; uint phy_rev; - uint8 phy_corenum; + u8 phy_corenum; uint16 radioid; - uint8 radiorev; - uint8 radiover; + u8 radiorev; + u8 radiover; uint coreflags; uint ana_rev; @@ -617,9 +617,9 @@ struct phy_info { bool ofdm_rateset_war; bool bf_preempt_4306; chanspec_t radio_chanspec; - uint8 antsel_type; + u8 antsel_type; uint16 bw; - uint8 txpwr_percent; + u8 txpwr_percent; bool phy_init_por; bool init_in_progress; @@ -627,7 +627,7 @@ struct phy_info { bool sbtml_gm; uint refcnt; bool watchdog_override; - uint8 phynoise_state; + u8 phynoise_state; uint phynoise_now; int phynoise_chan_watchdog; bool phynoise_polling; @@ -641,25 +641,25 @@ struct phy_info { int16 txpa_5g_mid[PWRTBL_NUM_COEFF]; int16 txpa_5g_hi[PWRTBL_NUM_COEFF]; - uint8 tx_srom_max_2g; - uint8 tx_srom_max_5g_low; - uint8 tx_srom_max_5g_mid; - uint8 tx_srom_max_5g_hi; - uint8 tx_srom_max_rate_2g[TXP_NUM_RATES]; - uint8 tx_srom_max_rate_5g_low[TXP_NUM_RATES]; - uint8 tx_srom_max_rate_5g_mid[TXP_NUM_RATES]; - uint8 tx_srom_max_rate_5g_hi[TXP_NUM_RATES]; - uint8 tx_user_target[TXP_NUM_RATES]; + u8 tx_srom_max_2g; + u8 tx_srom_max_5g_low; + u8 tx_srom_max_5g_mid; + u8 tx_srom_max_5g_hi; + u8 tx_srom_max_rate_2g[TXP_NUM_RATES]; + u8 tx_srom_max_rate_5g_low[TXP_NUM_RATES]; + u8 tx_srom_max_rate_5g_mid[TXP_NUM_RATES]; + u8 tx_srom_max_rate_5g_hi[TXP_NUM_RATES]; + u8 tx_user_target[TXP_NUM_RATES]; int8 tx_power_offset[TXP_NUM_RATES]; - uint8 tx_power_target[TXP_NUM_RATES]; + u8 tx_power_target[TXP_NUM_RATES]; srom_fem_t srom_fem2g; srom_fem_t srom_fem5g; - uint8 tx_power_max; - uint8 tx_power_max_rate_ind; + u8 tx_power_max; + u8 tx_power_max_rate_ind; bool hwpwrctrl; - uint8 nphy_txpwrctrl; + u8 nphy_txpwrctrl; int8 nphy_txrx_chain; bool phy_5g_pwrgain; @@ -667,16 +667,16 @@ struct phy_info { uint16 phy_wreg_limit; int8 n_preamble_override; - uint8 antswitch; - uint8 aa2g, aa5g; + u8 antswitch; + u8 aa2g, aa5g; int8 idle_tssi[CH_5G_GROUP]; int8 target_idle_tssi; int8 txpwr_est_Pout; - uint8 tx_power_min; - uint8 txpwr_limit[TXP_NUM_RATES]; - uint8 txpwr_env_limit[TXP_NUM_RATES]; - uint8 adj_pwr_tbl_nphy[ADJ_PWR_TBL_LEN]; + u8 tx_power_min; + u8 txpwr_limit[TXP_NUM_RATES]; + u8 txpwr_env_limit[TXP_NUM_RATES]; + u8 adj_pwr_tbl_nphy[ADJ_PWR_TBL_LEN]; bool channel_14_wide_filter; @@ -684,7 +684,7 @@ struct phy_info { bool txpwridx_override_aphy; int16 radiopwr_override; uint16 hwpwr_txcur; - uint8 saved_txpwr_idx; + u8 saved_txpwr_idx; bool edcrs_threshold_lock; @@ -706,13 +706,13 @@ struct phy_info { bool phy_forcecal; bool phy_fixed_noise; uint32 xtalfreq; - uint8 pdiv; + u8 pdiv; int8 carrier_suppr_disable; bool phy_bphy_evm; bool phy_bphy_rfcs; int8 phy_scraminit; - uint8 phy_gpiosel; + u8 phy_gpiosel; int16 phy_txcore_disable_temp; int16 phy_txcore_enable_temp; @@ -731,7 +731,7 @@ struct phy_info { bool loopback_gain; int16 max_lpback_gain_hdB; int16 trsw_rx_gain_hdB; - uint8 power_vec[8]; + u8 power_vec[8]; uint16 rc_cal; int nrssi_table_delta; @@ -741,9 +741,9 @@ struct phy_info { int max_rssi; int8 txpwridx; - uint8 min_txpower; + u8 min_txpower; - uint8 a_band_high_disable; + u8 a_band_high_disable; uint16 tx_vos; uint16 global_tx_bb_dc_bias_loft; @@ -764,7 +764,7 @@ struct phy_info { int8 *m_tssi_to_dbm; int8 *l_tssi_to_dbm; int8 *h_tssi_to_dbm; - uint8 *hwtxpwr; + u8 *hwtxpwr; uint16 freqtrack_saved_regs[2]; int cur_interference_mode; @@ -777,7 +777,7 @@ struct phy_info { uint phycal_txpower; bool pkteng_in_progress; - uint8 phy_aa2g; + u8 phy_aa2g; bool nphy_tableloaded; int8 nphy_rssisel; @@ -791,42 +791,42 @@ struct phy_info { uint32 ofdm5gpo; uint32 ofdm5glpo; uint32 ofdm5ghpo; - uint8 bw402gpo; - uint8 bw405gpo; - uint8 bw405glpo; - uint8 bw405ghpo; - uint8 cdd2gpo; - uint8 cdd5gpo; - uint8 cdd5glpo; - uint8 cdd5ghpo; - uint8 stbc2gpo; - uint8 stbc5gpo; - uint8 stbc5glpo; - uint8 stbc5ghpo; - uint8 bwdup2gpo; - uint8 bwdup5gpo; - uint8 bwdup5glpo; - uint8 bwdup5ghpo; + u8 bw402gpo; + u8 bw405gpo; + u8 bw405glpo; + u8 bw405ghpo; + u8 cdd2gpo; + u8 cdd5gpo; + u8 cdd5glpo; + u8 cdd5ghpo; + u8 stbc2gpo; + u8 stbc5gpo; + u8 stbc5glpo; + u8 stbc5ghpo; + u8 bwdup2gpo; + u8 bwdup5gpo; + u8 bwdup5glpo; + u8 bwdup5ghpo; uint16 mcs2gpo[8]; uint16 mcs5gpo[8]; uint16 mcs5glpo[8]; uint16 mcs5ghpo[8]; uint32 nphy_rxcalparams; - uint8 phy_spuravoid; + u8 phy_spuravoid; bool phy_isspuravoid; - uint8 phy_pabias; - uint8 nphy_papd_skip; - uint8 nphy_tssi_slope; + u8 phy_pabias; + u8 nphy_papd_skip; + u8 nphy_tssi_slope; int16 nphy_noise_win[PHY_CORE_MAX][PHY_NOISE_WINDOW_SZ]; - uint8 nphy_noise_index; + u8 nphy_noise_index; - uint8 nphy_txpid2g[PHY_CORE_NUM_2]; - uint8 nphy_txpid5g[PHY_CORE_NUM_2]; - uint8 nphy_txpid5gl[PHY_CORE_NUM_2]; - uint8 nphy_txpid5gh[PHY_CORE_NUM_2]; + u8 nphy_txpid2g[PHY_CORE_NUM_2]; + u8 nphy_txpid5g[PHY_CORE_NUM_2]; + u8 nphy_txpid5gl[PHY_CORE_NUM_2]; + u8 nphy_txpid5gh[PHY_CORE_NUM_2]; bool nphy_gain_boost; bool nphy_elna_gain_config; @@ -836,12 +836,12 @@ struct phy_info { bool phyhang_avoid; bool rssical_nphy; - uint8 nphy_perical; + u8 nphy_perical; uint nphy_perical_last; - uint8 cal_type_override; - uint8 mphase_cal_phase_id; - uint8 mphase_txcal_cmdidx; - uint8 mphase_txcal_numcmds; + u8 cal_type_override; + u8 mphase_cal_phase_id; + u8 mphase_txcal_cmdidx; + u8 mphase_txcal_numcmds; uint16 mphase_txcal_bestcoeffs[11]; chanspec_t nphy_txiqlocal_chanspec; chanspec_t nphy_iqcal_chanspec_2G; @@ -856,11 +856,11 @@ struct phy_info { txiqcal_cache_t calibration_cache; rssical_cache_t rssical_cache; - uint8 nphy_txpwr_idx[2]; - uint8 nphy_papd_cal_type; + u8 nphy_txpwr_idx[2]; + u8 nphy_papd_cal_type; uint nphy_papd_last_cal; uint16 nphy_papd_tx_gain_at_last_cal[2]; - uint8 nphy_papd_cal_gain_index[2]; + u8 nphy_papd_cal_gain_index[2]; int16 nphy_papd_epsilon_offset[2]; bool nphy_papd_recal_enable; uint32 nphy_papd_recal_counter; @@ -872,8 +872,8 @@ struct phy_info { uint16 classifier_state; uint16 clip_state[2]; uint nphy_deaf_count; - uint8 rxiq_samps; - uint8 rxiq_antsel; + u8 rxiq_samps; + u8 rxiq_antsel; uint16 rfctrlIntc1_save; uint16 rfctrlIntc2_save; @@ -881,9 +881,9 @@ struct phy_info { uint16 tx_rx_cal_radio_saveregs[22]; uint16 tx_rx_cal_phy_saveregs[15]; - uint8 nphy_cal_orig_pwr_idx[2]; - uint8 nphy_txcal_pwr_idx[2]; - uint8 nphy_rxcal_pwr_idx[2]; + u8 nphy_cal_orig_pwr_idx[2]; + u8 nphy_txcal_pwr_idx[2]; + u8 nphy_rxcal_pwr_idx[2]; uint16 nphy_cal_orig_tx_gain[2]; nphy_txgains_t nphy_cal_target_gain; uint16 nphy_txcal_bbmult; @@ -917,7 +917,7 @@ struct phy_info { uint16 init_gain_core2; uint16 init_gainb_core1; uint16 init_gainb_core2; - uint8 aci_noise_curr_channel; + u8 aci_noise_curr_channel; uint16 init_gain_rfseq[4]; bool radio_is_on; @@ -931,10 +931,10 @@ struct phy_info { uint tbl_save_id; uint tbl_save_offset; - uint8 txpwrctrl; + u8 txpwrctrl; int8 txpwrindex[PHY_CORE_MAX]; - uint8 phycal_tempdelta; + u8 phycal_tempdelta; uint32 mcs20_po; uint32 mcs40_po; }; @@ -950,22 +950,22 @@ typedef struct radio_regs { uint16 address; uint32 init_a; uint32 init_g; - uint8 do_init_a; - uint8 do_init_g; + u8 do_init_a; + u8 do_init_g; } radio_regs_t; typedef struct radio_20xx_regs { uint16 address; - uint8 init; - uint8 do_init; + u8 init; + u8 do_init; } radio_20xx_regs_t; typedef struct lcnphy_radio_regs { uint16 address; - uint8 init_a; - uint8 init_g; - uint8 do_init_a; - uint8 do_init_g; + u8 init_a; + u8 init_g; + u8 do_init_a; + u8 do_init_g; } lcnphy_radio_regs_t; extern lcnphy_radio_regs_t lcnphy_radio_regs_2064[]; @@ -1024,9 +1024,9 @@ extern void write_phy_channel_reg(phy_info_t *pi, uint val); extern void wlc_phy_txpower_update_shm(phy_info_t *pi); extern void wlc_phy_cordic(fixed theta, cint32 *val); -extern uint8 wlc_phy_nbits(int32 value); +extern u8 wlc_phy_nbits(int32 value); extern uint32 wlc_phy_sqrt_int(uint32 value); -extern void wlc_phy_compute_dB(uint32 *cmplx_pwr, int8 *p_dB, uint8 core); +extern void wlc_phy_compute_dB(uint32 *cmplx_pwr, int8 *p_dB, u8 core); extern uint wlc_phy_init_radio_regs_allbands(phy_info_t *pi, radio_20xx_regs_t *radioregs); @@ -1075,14 +1075,14 @@ extern void wlc_lcnphy_start_tx_tone(phy_info_t *pi, int32 f_kHz, uint16 max_val, bool iqcalmode); extern void wlc_phy_txpower_sromlimit_get_nphy(phy_info_t *pi, uint chan, - uint8 *max_pwr, uint8 rate_id); -extern void wlc_phy_ofdm_to_mcs_powers_nphy(uint8 *power, uint8 rate_mcs_start, - uint8 rate_mcs_end, - uint8 rate_ofdm_start); -extern void wlc_phy_mcs_to_ofdm_powers_nphy(uint8 *power, - uint8 rate_ofdm_start, - uint8 rate_ofdm_end, - uint8 rate_mcs_start); + u8 *max_pwr, u8 rate_id); +extern void wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start, + u8 rate_mcs_end, + u8 rate_ofdm_start); +extern void wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power, + u8 rate_ofdm_start, + u8 rate_ofdm_end, + u8 rate_mcs_start); extern uint16 wlc_lcnphy_tempsense(phy_info_t *pi, bool mode); extern int16 wlc_lcnphy_tempsense_new(phy_info_t *pi, bool mode); @@ -1095,7 +1095,7 @@ extern void wlc_2064_vco_cal(phy_info_t *pi); extern void wlc_phy_txpower_recalc_target(phy_info_t *pi); extern uint32 wlc_phy_qdiv_roundup(uint32 dividend, uint32 divisor, - uint8 precision); + u8 precision); #define LCNPHY_TBL_ID_PAPDCOMPDELTATBL 0x18 #define LCNPHY_TX_POWER_TABLE_SIZE 128 @@ -1115,8 +1115,8 @@ extern void wlc_lcnphy_set_tx_iqcc(phy_info_t *pi, uint16 a, uint16 b); extern void wlc_lcnphy_set_tx_locc(phy_info_t *pi, uint16 didq); extern void wlc_lcnphy_get_tx_iqcc(phy_info_t *pi, uint16 *a, uint16 *b); extern uint16 wlc_lcnphy_get_tx_locc(phy_info_t *pi); -extern void wlc_lcnphy_get_radio_loft(phy_info_t *pi, uint8 *ei0, - uint8 *eq0, uint8 *fi0, uint8 *fq0); +extern void wlc_lcnphy_get_radio_loft(phy_info_t *pi, u8 *ei0, + u8 *eq0, u8 *fi0, u8 *fq0); extern void wlc_lcnphy_calib_modes(phy_info_t *pi, uint mode); extern void wlc_lcnphy_deaf_mode(phy_info_t *pi, bool mode); extern bool wlc_phy_tpc_isenabled_lcnphy(phy_info_t *pi); @@ -1161,32 +1161,32 @@ extern void wlc_phy_table_write_nphy(phy_info_t *pi, uint32, uint32, uint32, if ((BUSTYPE((pi)->sh->bustype) == PCI_BUS) && NREV_LT((pi)->pubpi.phy_rev, 3)) \ (void)R_REG((pi)->sh->osh, &(pi)->regs->maccontrol) -extern void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, uint8 caltype); +extern void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, u8 caltype); extern void wlc_phy_aci_reset_nphy(phy_info_t *pi); extern void wlc_phy_pa_override_nphy(phy_info_t *pi, bool en); -extern uint8 wlc_phy_get_chan_freq_range_nphy(phy_info_t *pi, uint chan); +extern u8 wlc_phy_get_chan_freq_range_nphy(phy_info_t *pi, uint chan); extern void wlc_phy_switch_radio_nphy(phy_info_t *pi, bool on); extern void wlc_phy_stf_chain_upd_nphy(phy_info_t *pi); -extern void wlc_phy_force_rfseq_nphy(phy_info_t *pi, uint8 cmd); +extern void wlc_phy_force_rfseq_nphy(phy_info_t *pi, u8 cmd); extern int16 wlc_phy_tempsense_nphy(phy_info_t *pi); extern uint16 wlc_phy_classifier_nphy(phy_info_t *pi, uint16 mask, uint16 val); extern void wlc_phy_rx_iq_est_nphy(phy_info_t *pi, phy_iq_est_t *est, - uint16 num_samps, uint8 wait_time, - uint8 wait_for_crs); + uint16 num_samps, u8 wait_time, + u8 wait_for_crs); -extern void wlc_phy_rx_iq_coeffs_nphy(phy_info_t *pi, uint8 write, +extern void wlc_phy_rx_iq_coeffs_nphy(phy_info_t *pi, u8 write, nphy_iq_comp_t *comp); extern void wlc_phy_aci_and_noise_reduction_nphy(phy_info_t *pi); -extern void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, uint8 rxcore_bitmask); -extern uint8 wlc_phy_rxcore_getstate_nphy(wlc_phy_t *pih); +extern void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, u8 rxcore_bitmask); +extern u8 wlc_phy_rxcore_getstate_nphy(wlc_phy_t *pih); -extern void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, uint8 ctrl_type); +extern void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, u8 ctrl_type); extern void wlc_phy_txpwr_fixpower_nphy(phy_info_t *pi); extern void wlc_phy_txpwr_apply_nphy(phy_info_t *pi); extern void wlc_phy_txpwr_papd_cal_nphy(phy_info_t *pi); @@ -1196,21 +1196,21 @@ extern nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi); extern int wlc_phy_cal_txiqlo_nphy(phy_info_t *pi, nphy_txgains_t target_gain, bool full, bool m); extern int wlc_phy_cal_rxiq_nphy(phy_info_t *pi, nphy_txgains_t target_gain, - uint8 type, bool d); -extern void wlc_phy_txpwr_index_nphy(phy_info_t *pi, uint8 core_mask, + u8 type, bool d); +extern void wlc_phy_txpwr_index_nphy(phy_info_t *pi, u8 core_mask, int8 txpwrindex, bool res); -extern void wlc_phy_rssisel_nphy(phy_info_t *pi, uint8 core, uint8 rssi_type); -extern int wlc_phy_poll_rssi_nphy(phy_info_t *pi, uint8 rssi_type, - int32 *rssi_buf, uint8 nsamps); +extern void wlc_phy_rssisel_nphy(phy_info_t *pi, u8 core, u8 rssi_type); +extern int wlc_phy_poll_rssi_nphy(phy_info_t *pi, u8 rssi_type, + int32 *rssi_buf, u8 nsamps); extern void wlc_phy_rssi_cal_nphy(phy_info_t *pi); extern int wlc_phy_aci_scan_nphy(phy_info_t *pi); extern void wlc_phy_cal_txgainctrl_nphy(phy_info_t *pi, int32 dBm_targetpower, bool debug); extern int wlc_phy_tx_tone_nphy(phy_info_t *pi, uint32 f_kHz, uint16 max_val, - uint8 mode, uint8, bool); + u8 mode, u8, bool); extern void wlc_phy_stopplayback_nphy(phy_info_t *pi); extern void wlc_phy_est_tonepwr_nphy(phy_info_t *pi, int32 *qdBm_pwrbuf, - uint8 num_samps); + u8 num_samps); extern void wlc_phy_radio205x_vcocal_nphy(phy_info_t *pi); extern int wlc_phy_rssi_compute_nphy(phy_info_t *pi, wlc_d11rxhdr_t *wlc_rxh); @@ -1218,7 +1218,7 @@ extern int wlc_phy_rssi_compute_nphy(phy_info_t *pi, wlc_d11rxhdr_t *wlc_rxh); #define NPHY_TESTPATTERN_BPHY_EVM 0 #define NPHY_TESTPATTERN_BPHY_RFCS 1 -extern void wlc_phy_nphy_tkip_rifs_war(phy_info_t *pi, uint8 rifs); +extern void wlc_phy_nphy_tkip_rifs_war(phy_info_t *pi, u8 rifs); void wlc_phy_get_pwrdet_offsets(phy_info_t *pi, int8 *cckoffset, int8 *ofdmoffset); diff --git a/drivers/staging/brcm80211/phy/wlc_phy_lcn.c b/drivers/staging/brcm80211/phy/wlc_phy_lcn.c index a82e58d..a53d33c 100644 --- a/drivers/staging/brcm80211/phy/wlc_phy_lcn.c +++ b/drivers/staging/brcm80211/phy/wlc_phy_lcn.c @@ -160,11 +160,11 @@ typedef enum { typedef struct { lcnphy_txgains_t gains; bool useindex; - uint8 index; + u8 index; } lcnphy_txcalgains_t; typedef struct { - uint8 chan; + u8 chan; int16 a; int16 b; } lcnphy_rx_iqcomp_t; @@ -544,7 +544,7 @@ static const int8 lcnphy_gain_index_offset_for_rssi[] = { -2 }; -extern CONST uint8 spur_tbl_rev0[]; +extern CONST u8 spur_tbl_rev0[]; extern CONST uint32 dot11lcnphytbl_rx_gain_info_sz_rev1; extern CONST dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev1[]; extern CONST dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa; @@ -553,14 +553,14 @@ extern CONST dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250; typedef struct _chan_info_2064_lcnphy { uint chan; uint freq; - uint8 logen_buftune; - uint8 logen_rccr_tx; - uint8 txrf_mix_tune_ctrl; - uint8 pa_input_tune_g; - uint8 logen_rccr_rx; - uint8 pa_rxrf_lna1_freq_tune; - uint8 pa_rxrf_lna2_freq_tune; - uint8 rxrf_rxrf_spare1; + u8 logen_buftune; + u8 logen_rccr_tx; + u8 txrf_mix_tune_ctrl; + u8 pa_input_tune_g; + u8 logen_rccr_rx; + u8 pa_rxrf_lna1_freq_tune; + u8 pa_rxrf_lna2_freq_tune; + u8 rxrf_rxrf_spare1; } chan_info_2064_lcnphy_t; static chan_info_2064_lcnphy_t chan_info_2064_lcnphy[] = { @@ -972,12 +972,12 @@ uint16 #define wlc_radio_2064_rcal_done(pi) (0 != (read_radio_reg(pi, RADIO_2064_REG05C) & 0x20)) #define tempsense_done(pi) (0x8000 == (read_phy_reg(pi, 0x476) & 0x8000)) -#define LCNPHY_IQLOCC_READ(val) ((uint8)(-(int8)(((val) & 0xf0) >> 4) + (int8)((val) & 0x0f))) +#define LCNPHY_IQLOCC_READ(val) ((u8)(-(int8)(((val) & 0xf0) >> 4) + (int8)((val) & 0x0f))) #define FIXED_TXPWR 78 #define LCNPHY_TEMPSENSE(val) ((int16)((val > 255) ? (val - 512) : val)) static uint32 wlc_lcnphy_qdiv_roundup(uint32 divident, uint32 divisor, - uint8 precision); + u8 precision); static void wlc_lcnphy_set_rx_gain_by_distribution(phy_info_t *pi, uint16 ext_lna, uint16 trsw, uint16 biq2, uint16 biq1, @@ -986,8 +986,8 @@ static void wlc_lcnphy_set_rx_gain_by_distribution(phy_info_t *pi, static void wlc_lcnphy_clear_tx_power_offsets(phy_info_t *pi); static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, uint16 gain); static void wlc_lcnphy_set_trsw_override(phy_info_t *pi, bool tx, bool rx); -static void wlc_lcnphy_set_bbmult(phy_info_t *pi, uint8 m0); -static uint8 wlc_lcnphy_get_bbmult(phy_info_t *pi); +static void wlc_lcnphy_set_bbmult(phy_info_t *pi, u8 m0); +static u8 wlc_lcnphy_get_bbmult(phy_info_t *pi); static void wlc_lcnphy_get_tx_gain(phy_info_t *pi, lcnphy_txgains_t *gains); static void wlc_lcnphy_set_tx_gain_override(phy_info_t *pi, bool bEnable); static void wlc_lcnphy_toggle_afe_pwdn(phy_info_t *pi); @@ -995,16 +995,16 @@ static void wlc_lcnphy_rx_gain_override_enable(phy_info_t *pi, bool enable); static void wlc_lcnphy_set_tx_gain(phy_info_t *pi, lcnphy_txgains_t *target_gains); static bool wlc_lcnphy_rx_iq_est(phy_info_t *pi, uint16 num_samps, - uint8 wait_time, lcnphy_iq_est_t *iq_est); + u8 wait_time, lcnphy_iq_est_t *iq_est); static bool wlc_lcnphy_calc_rx_iq_comp(phy_info_t *pi, uint16 num_samps); static uint16 wlc_lcnphy_get_pa_gain(phy_info_t *pi); -static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, uint8 mode); +static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, u8 mode); extern void wlc_lcnphy_tx_pwr_ctrl_init(wlc_phy_t *ppi); extern void wlc_lcnphy_pktengtx(wlc_phy_t *ppi, wl_pkteng_t *pkteng, - uint8 rate, struct ether_addr *sa, + u8 rate, struct ether_addr *sa, uint32 wait_delay); static void wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, - uint8 channel); + u8 channel); static void wlc_lcnphy_load_tx_gain_table(phy_info_t *pi, const lcnphy_tx_gain_tbl_entry *g); @@ -1077,7 +1077,7 @@ wlc_lcnphy_common_write_table(phy_info_t *pi, uint32 tbl_id, } static uint32 -wlc_lcnphy_qdiv_roundup(uint32 dividend, uint32 divisor, uint8 precision) +wlc_lcnphy_qdiv_roundup(uint32 dividend, uint32 divisor, u8 precision) { uint32 quotient, remainder, roundup, rbit; @@ -1218,7 +1218,7 @@ static void wlc_lcnphy_txrx_spur_avoidance_mode(phy_info_t *pi, bool enable) void wlc_phy_chanspec_set_lcnphy(phy_info_t *pi, chanspec_t chanspec) { - uint8 channel = CHSPEC_CHANNEL(chanspec); + u8 channel = CHSPEC_CHANNEL(chanspec); wlc_phy_chanspec_radio_set((wlc_phy_t *) pi, chanspec); @@ -1312,7 +1312,7 @@ wlc_lcnphy_set_tx_gain(phy_info_t *pi, lcnphy_txgains_t *target_gains) wlc_lcnphy_enable_tx_gain_override(pi); } -static void wlc_lcnphy_set_bbmult(phy_info_t *pi, uint8 m0) +static void wlc_lcnphy_set_bbmult(phy_info_t *pi, u8 m0) { uint16 m0m1 = (uint16) m0 << 8; phytbl_info_t tab; @@ -1853,7 +1853,7 @@ wlc_lcnphy_tx_iqlo_cal(phy_info_t *pi, lcnphy_txgains_t cal_gains, temp_gains; uint16 hash; - uint8 band_idx; + u8 band_idx; int j; uint16 ncorr_override[5]; uint16 syst_coeffs[] = { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, @@ -2148,15 +2148,15 @@ static void wlc_lcnphy_idle_tssi_est(wlc_phy_t *ppi) wlapi_enable_mac(pi->sh->physhim); } -static void wlc_lcnphy_vbat_temp_sense_setup(phy_info_t *pi, uint8 mode) +static void wlc_lcnphy_vbat_temp_sense_setup(phy_info_t *pi, u8 mode) { bool suspend; uint16 save_txpwrCtrlEn; - uint8 auxpga_vmidcourse, auxpga_vmidfine, auxpga_gain; + u8 auxpga_vmidcourse, auxpga_vmidfine, auxpga_gain; uint16 auxpga_vmid; phytbl_info_t tab; uint32 val; - uint8 save_reg007, save_reg0FF, save_reg11F, save_reg005, save_reg025, + u8 save_reg007, save_reg0FF, save_reg11F, save_reg005, save_reg025, save_reg112; uint16 values_to_save[14]; int8 index; @@ -2164,12 +2164,12 @@ static void wlc_lcnphy_vbat_temp_sense_setup(phy_info_t *pi, uint8 mode) phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; OSL_DELAY(999); - save_reg007 = (uint8) read_radio_reg(pi, RADIO_2064_REG007); - save_reg0FF = (uint8) read_radio_reg(pi, RADIO_2064_REG0FF); - save_reg11F = (uint8) read_radio_reg(pi, RADIO_2064_REG11F); - save_reg005 = (uint8) read_radio_reg(pi, RADIO_2064_REG005); - save_reg025 = (uint8) read_radio_reg(pi, RADIO_2064_REG025); - save_reg112 = (uint8) read_radio_reg(pi, RADIO_2064_REG112); + save_reg007 = (u8) read_radio_reg(pi, RADIO_2064_REG007); + save_reg0FF = (u8) read_radio_reg(pi, RADIO_2064_REG0FF); + save_reg11F = (u8) read_radio_reg(pi, RADIO_2064_REG11F); + save_reg005 = (u8) read_radio_reg(pi, RADIO_2064_REG005); + save_reg025 = (u8) read_radio_reg(pi, RADIO_2064_REG025); + save_reg112 = (u8) read_radio_reg(pi, RADIO_2064_REG112); for (i = 0; i < 14; i++) values_to_save[i] = read_phy_reg(pi, tempsense_phy_regs[i]); @@ -2293,7 +2293,7 @@ static void wlc_lcnphy_vbat_temp_sense_setup(phy_info_t *pi, uint8 mode) void WLBANDINITFN(wlc_lcnphy_tx_pwr_ctrl_init) (wlc_phy_t *ppi) { lcnphy_txgains_t tx_gains; - uint8 bbmult; + u8 bbmult; phytbl_info_t tab; int32 a1, b0, b1; int32 tssi, pwr, maxtargetpwr, mintargetpwr; @@ -2368,7 +2368,7 @@ void WLBANDINITFN(wlc_lcnphy_tx_pwr_ctrl_init) (wlc_phy_t *ppi) wlapi_enable_mac(pi->sh->physhim); } -static uint8 wlc_lcnphy_get_bbmult(phy_info_t *pi) +static u8 wlc_lcnphy_get_bbmult(phy_info_t *pi) { uint16 m0m1; phytbl_info_t tab; @@ -2380,7 +2380,7 @@ static uint8 wlc_lcnphy_get_bbmult(phy_info_t *pi) tab.tbl_width = 16; wlc_lcnphy_read_table(pi, &tab); - return (uint8) ((m0m1 & 0xff00) >> 8); + return (u8) ((m0m1 & 0xff00) >> 8); } static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, uint16 gain) @@ -2395,7 +2395,7 @@ static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, uint16 gain) void wlc_lcnphy_get_radio_loft(phy_info_t *pi, - uint8 *ei0, uint8 *eq0, uint8 *fi0, uint8 *fq0) + u8 *ei0, u8 *eq0, u8 *fi0, u8 *fq0) { *ei0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG089)); *eq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08A)); @@ -2454,7 +2454,7 @@ void wlc_lcnphy_set_tx_pwr_by_index(phy_info_t *pi, int index) { phytbl_info_t tab; uint16 a, b; - uint8 bb_mult; + u8 bb_mult; uint32 bbmultiqcomp, txgain, locoeffs, rfpower; lcnphy_txgains_t gains; phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; @@ -2462,7 +2462,7 @@ void wlc_lcnphy_set_tx_pwr_by_index(phy_info_t *pi, int index) ASSERT(index <= LCNPHY_MAX_TX_POWER_INDEX); pi_lcn->lcnphy_tx_power_idx_override = (int8) index; - pi_lcn->lcnphy_current_index = (uint8) index; + pi_lcn->lcnphy_current_index = (u8) index; tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; tab.tbl_width = 32; @@ -2486,7 +2486,7 @@ void wlc_lcnphy_set_tx_pwr_by_index(phy_info_t *pi, int index) wlc_lcnphy_set_tx_gain(pi, &gains); wlc_lcnphy_set_pa_gain(pi, (uint16) (txgain >> 24) & 0x7f); - bb_mult = (uint8) ((bbmultiqcomp >> 20) & 0xff); + bb_mult = (u8) ((bbmultiqcomp >> 20) & 0xff); wlc_lcnphy_set_bbmult(pi, bb_mult); wlc_lcnphy_enable_tx_gain_override(pi); @@ -2707,7 +2707,7 @@ wlc_lcnphy_run_samples(phy_info_t *pi, void wlc_lcnphy_deaf_mode(phy_info_t *pi, bool mode) { - uint8 phybw40; + u8 phybw40; phybw40 = CHSPEC_IS40(pi->radio_chanspec); if (LCNREV_LT(pi->pubpi.phy_rev, 2)) { @@ -2732,7 +2732,7 @@ void wlc_lcnphy_start_tx_tone(phy_info_t *pi, int32 f_kHz, uint16 max_val, bool iqcalmode) { - uint8 phy_bw; + u8 phy_bw; uint16 num_samps, t, k; uint32 bw; fixed theta = 0, rot = 0; @@ -2865,13 +2865,13 @@ static void wlc_lcnphy_txpwrtbl_iqlo_cal(phy_info_t *pi) { lcnphy_txgains_t target_gains, old_gains; - uint8 save_bb_mult; + u8 save_bb_mult; uint16 a, b, didq, save_pa_gain = 0; uint idx, SAVE_txpwrindex = 0xFF; uint32 val; uint16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); phytbl_info_t tab; - uint8 ei0, eq0, fi0, fq0; + u8 ei0, eq0, fi0, fq0; phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; wlc_lcnphy_get_tx_gain(pi, &old_gains); @@ -3126,9 +3126,9 @@ int8 wlc_lcnphy_vbatsense(phy_info_t *pi, bool mode) return (int8) avg; } -static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, uint8 mode) +static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, u8 mode) { - uint8 phybw40; + u8 phybw40; phybw40 = CHSPEC_IS40(pi->radio_chanspec); mod_phy_reg(pi, 0x6d1, (0x1 << 7), (1) << 7); @@ -3143,11 +3143,11 @@ static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, uint8 mode) static bool wlc_lcnphy_rx_iq_est(phy_info_t *pi, uint16 num_samps, - uint8 wait_time, lcnphy_iq_est_t *iq_est) + u8 wait_time, lcnphy_iq_est_t *iq_est) { int wait_count = 0; bool result = TRUE; - uint8 phybw40; + u8 phybw40; phybw40 = CHSPEC_IS40(pi->radio_chanspec); mod_phy_reg(pi, 0x6da, (0x1 << 5), (1) << 5); @@ -3279,7 +3279,7 @@ wlc_lcnphy_rx_iq_cal(phy_info_t *pi, const lcnphy_rx_iqcomp_t *iqcomp, { lcnphy_txgains_t old_gains; uint16 tx_pwr_ctrl; - uint8 tx_gain_index_old = 0; + u8 tx_gain_index_old = 0; bool result = FALSE, tx_gain_override_old = FALSE; uint16 i, Core1TxControl_old, RFOverride0_old, RFOverrideVal0_old, rfoverride2_old, rfoverride2val_old, @@ -3619,7 +3619,7 @@ void WLBANDINITFN(wlc_phy_cal_init_lcnphy) (phy_info_t *pi) static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi, chanspec_t chanspec) { - uint8 channel = CHSPEC_CHANNEL(chanspec); + u8 channel = CHSPEC_CHANNEL(chanspec); phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; if (NORADIO_ENAB(pi->pubpi)) @@ -3670,7 +3670,7 @@ static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi, chanspec_t chanspec) } void -wlc_lcnphy_pktengtx(wlc_phy_t *ppi, wl_pkteng_t *pkteng, uint8 rate, +wlc_lcnphy_pktengtx(wlc_phy_t *ppi, wl_pkteng_t *pkteng, u8 rate, struct ether_addr *sa, uint32 wait_delay) { } @@ -3710,7 +3710,7 @@ static void wlc_lcnphy_set_rx_iq_comp(phy_info_t *pi, uint16 a, uint16 b) void WLBANDINITFN(wlc_phy_init_lcnphy) (phy_info_t *pi) { - uint8 phybw40; + u8 phybw40; phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; phybw40 = CHSPEC_IS40(pi->radio_chanspec); @@ -3997,7 +3997,7 @@ wlc_lcnphy_set_cc(phy_info_t *pi, int cal_type, int16 coeff_x, int16 coeff_y) static lcnphy_unsign16_struct wlc_lcnphy_get_cc(phy_info_t *pi, int cal_type) { uint16 a, b, didq; - uint8 di0, dq0, ei, eq, fi, fq; + u8 di0, dq0, ei, eq, fi, fq; lcnphy_unsign16_struct cc; cc.re = 0; cc.im = 0; @@ -4281,8 +4281,8 @@ static void wlc_lcnphy_load_rfpower(phy_info_t *pi) { phytbl_info_t tab; uint32 val, bbmult, rfgain; - uint8 index; - uint8 scale_factor = 1; + u8 index; + u8 scale_factor = 1; int16 temp, temp1, temp2, qQ, qQ1, qQ2, shift; tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; @@ -4329,7 +4329,7 @@ static void wlc_lcnphy_load_rfpower(phy_info_t *pi) static void WLBANDINITFN(wlc_lcnphy_tbl_init) (phy_info_t *pi) { uint idx; - uint8 phybw40; + u8 phybw40; phytbl_info_t tab; uint32 val; @@ -4674,7 +4674,7 @@ static void WLBANDINITFN(wlc_lcnphy_radio_init) (phy_info_t *pi) static void wlc_lcnphy_rcal(phy_info_t *pi) { - uint8 rcal_value; + u8 rcal_value; if (NORADIO_ENAB(pi->pubpi)) return; @@ -4694,7 +4694,7 @@ static void wlc_lcnphy_rcal(phy_info_t *pi) SPINWAIT(!wlc_radio_2064_rcal_done(pi), 10 * 1000 * 1000); if (wlc_radio_2064_rcal_done(pi)) { - rcal_value = (uint8) read_radio_reg(pi, RADIO_2064_REG05C); + rcal_value = (u8) read_radio_reg(pi, RADIO_2064_REG05C); rcal_value = rcal_value & 0x1f; } @@ -4705,7 +4705,7 @@ static void wlc_lcnphy_rcal(phy_info_t *pi) static void wlc_lcnphy_rc_cal(phy_info_t *pi) { - uint8 dflt_rc_cal_val; + u8 dflt_rc_cal_val; uint16 flt_val; if (NORADIO_ENAB(pi->pubpi)) @@ -4737,18 +4737,18 @@ static bool BCMATTACHFN(wlc_phy_txpwr_srom_read_lcnphy) (phy_info_t *pi) uint32 offset_ofdm, offset_mcs; pi_lcn->lcnphy_tr_isolation_mid = - (uint8) PHY_GETINTVAR(pi, "triso2g"); + (u8) PHY_GETINTVAR(pi, "triso2g"); pi_lcn->lcnphy_rx_power_offset = - (uint8) PHY_GETINTVAR(pi, "rxpo2g"); + (u8) PHY_GETINTVAR(pi, "rxpo2g"); pi->txpa_2g[0] = (int16) PHY_GETINTVAR(pi, "pa0b0"); pi->txpa_2g[1] = (int16) PHY_GETINTVAR(pi, "pa0b1"); pi->txpa_2g[2] = (int16) PHY_GETINTVAR(pi, "pa0b2"); - pi_lcn->lcnphy_rssi_vf = (uint8) PHY_GETINTVAR(pi, "rssismf2g"); - pi_lcn->lcnphy_rssi_vc = (uint8) PHY_GETINTVAR(pi, "rssismc2g"); - pi_lcn->lcnphy_rssi_gs = (uint8) PHY_GETINTVAR(pi, "rssisav2g"); + pi_lcn->lcnphy_rssi_vf = (u8) PHY_GETINTVAR(pi, "rssismf2g"); + pi_lcn->lcnphy_rssi_vc = (u8) PHY_GETINTVAR(pi, "rssismc2g"); + pi_lcn->lcnphy_rssi_gs = (u8) PHY_GETINTVAR(pi, "rssisav2g"); { pi_lcn->lcnphy_rssi_vf_lowtemp = pi_lcn->lcnphy_rssi_vf; @@ -4788,9 +4788,9 @@ static bool BCMATTACHFN(wlc_phy_txpwr_srom_read_lcnphy) (phy_info_t *pi) offset_ofdm >>= 4; } } else { - uint8 opo = 0; + u8 opo = 0; - opo = (uint8) PHY_GETINTVAR(pi, "opo"); + opo = (u8) PHY_GETINTVAR(pi, "opo"); for (i = TXP_FIRST_CCK; i <= TXP_LAST_CCK; i++) { pi->tx_srom_max_rate_2g[i] = txpwr; @@ -4818,22 +4818,22 @@ static bool BCMATTACHFN(wlc_phy_txpwr_srom_read_lcnphy) (phy_info_t *pi) pi_lcn->lcnphy_rawtempsense = (uint16) PHY_GETINTVAR(pi, "rawtempsense"); pi_lcn->lcnphy_measPower = - (uint8) PHY_GETINTVAR(pi, "measpower"); + (u8) PHY_GETINTVAR(pi, "measpower"); pi_lcn->lcnphy_tempsense_slope = - (uint8) PHY_GETINTVAR(pi, "tempsense_slope"); + (u8) PHY_GETINTVAR(pi, "tempsense_slope"); pi_lcn->lcnphy_hw_iqcal_en = (bool) PHY_GETINTVAR(pi, "hw_iqcal_en"); pi_lcn->lcnphy_iqcal_swp_dis = (bool) PHY_GETINTVAR(pi, "iqcal_swp_dis"); pi_lcn->lcnphy_tempcorrx = - (uint8) PHY_GETINTVAR(pi, "tempcorrx"); + (u8) PHY_GETINTVAR(pi, "tempcorrx"); pi_lcn->lcnphy_tempsense_option = - (uint8) PHY_GETINTVAR(pi, "tempsense_option"); + (u8) PHY_GETINTVAR(pi, "tempsense_option"); pi_lcn->lcnphy_freqoffset_corr = - (uint8) PHY_GETINTVAR(pi, "freqoffset_corr"); - if ((uint8) getintvar(pi->vars, "aa2g") > 1) + (u8) PHY_GETINTVAR(pi, "freqoffset_corr"); + if ((u8) getintvar(pi->vars, "aa2g") > 1) wlc_phy_ant_rxdiv_set((wlc_phy_t *) pi, - (uint8) getintvar(pi->vars, + (u8) getintvar(pi->vars, "aa2g")); } pi_lcn->lcnphy_cck_dig_filt_type = -1; @@ -4850,10 +4850,10 @@ static bool BCMATTACHFN(wlc_phy_txpwr_srom_read_lcnphy) (phy_info_t *pi) void wlc_2064_vco_cal(phy_info_t *pi) { - uint8 calnrst; + u8 calnrst; mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 1 << 3); - calnrst = (uint8) read_radio_reg(pi, RADIO_2064_REG056) & 0xf8; + calnrst = (u8) read_radio_reg(pi, RADIO_2064_REG056) & 0xf8; write_radio_reg(pi, RADIO_2064_REG056, calnrst); OSL_DELAY(1); write_radio_reg(pi, RADIO_2064_REG056, calnrst | 0x03); @@ -4864,14 +4864,14 @@ void wlc_2064_vco_cal(phy_info_t *pi) } static void -wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, uint8 channel) +wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, u8 channel) { uint i; const chan_info_2064_lcnphy_t *ci; - uint8 rfpll_doubler = 0; - uint8 pll_pwrup, pll_pwrup_ovr; + u8 rfpll_doubler = 0; + u8 pll_pwrup, pll_pwrup_ovr; fixed qFxtal, qFref, qFvco, qFcal; - uint8 d15, d16, f16, e44, e45; + u8 d15, d16, f16, e44, e45; uint32 div_int, div_frac, fvco3, fpfd, fref3, fcal_div; uint16 loop_bw, d30, setCount; if (NORADIO_ENAB(pi->pubpi)) @@ -4920,8 +4920,8 @@ wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, uint8 channel) write_radio_reg(pi, RADIO_2064_REG06C, ci->rxrf_rxrf_spare1); - pll_pwrup = (uint8) read_radio_reg(pi, RADIO_2064_REG044); - pll_pwrup_ovr = (uint8) read_radio_reg(pi, RADIO_2064_REG12B); + pll_pwrup = (u8) read_radio_reg(pi, RADIO_2064_REG044); + pll_pwrup_ovr = (u8) read_radio_reg(pi, RADIO_2064_REG12B); or_radio_reg(pi, RADIO_2064_REG044, 0x07); @@ -4960,10 +4960,10 @@ wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, uint8 channel) f16 = ((d16 + 1) * (d15 + 1)) / qFcal; setCount = f16 * 3 * (ci->freq) / 32 - 1; mod_radio_reg(pi, RADIO_2064_REG053, (0x0f << 0), - (uint8) (setCount >> 8)); + (u8) (setCount >> 8)); or_radio_reg(pi, RADIO_2064_REG053, 0x10); - write_radio_reg(pi, RADIO_2064_REG054, (uint8) (setCount & 0xff)); + write_radio_reg(pi, RADIO_2064_REG054, (u8) (setCount & 0xff)); div_int = ((fvco3 * (PLL_2064_MHZ >> 4)) / fref3) << 4; @@ -4975,13 +4975,13 @@ wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, uint8 channel) div_frac = wlc_lcnphy_qdiv_roundup(div_frac, fref3, 20); mod_radio_reg(pi, RADIO_2064_REG045, (0x1f << 0), - (uint8) (div_int >> 4)); + (u8) (div_int >> 4)); mod_radio_reg(pi, RADIO_2064_REG046, (0x1f << 4), - (uint8) (div_int << 4)); + (u8) (div_int << 4)); mod_radio_reg(pi, RADIO_2064_REG046, (0x0f << 0), - (uint8) (div_frac >> 16)); - write_radio_reg(pi, RADIO_2064_REG047, (uint8) (div_frac >> 8) & 0xff); - write_radio_reg(pi, RADIO_2064_REG048, (uint8) div_frac & 0xff); + (u8) (div_frac >> 16)); + write_radio_reg(pi, RADIO_2064_REG047, (u8) (div_frac >> 8) & 0xff); + write_radio_reg(pi, RADIO_2064_REG048, (u8) div_frac & 0xff); write_radio_reg(pi, RADIO_2064_REG040, 0xfb); @@ -4990,7 +4990,7 @@ wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, uint8 channel) write_radio_reg(pi, RADIO_2064_REG043, 0x0C); { - uint8 h29, h23, c28, d29, h28_ten, e30, h30_ten, cp_current; + u8 h29, h23, c28, d29, h28_ten, e30, h30_ten, cp_current; uint16 c29, c38, c30, g30, d28; c29 = loop_bw; d29 = 200; diff --git a/drivers/staging/brcm80211/phy/wlc_phy_lcn.h b/drivers/staging/brcm80211/phy/wlc_phy_lcn.h index e278a2c..dc7a79c 100644 --- a/drivers/staging/brcm80211/phy/wlc_phy_lcn.h +++ b/drivers/staging/brcm80211/phy/wlc_phy_lcn.h @@ -21,42 +21,42 @@ struct phy_info_lcnphy { int lcnphy_txrf_sp_9_override; - uint8 lcnphy_full_cal_channel; - uint8 lcnphy_cal_counter; + u8 lcnphy_full_cal_channel; + u8 lcnphy_cal_counter; uint16 lcnphy_cal_temper; bool lcnphy_recal; - uint8 lcnphy_rc_cap; + u8 lcnphy_rc_cap; uint32 lcnphy_mcs20_po; - uint8 lcnphy_tr_isolation_mid; - uint8 lcnphy_tr_isolation_low; - uint8 lcnphy_tr_isolation_hi; + u8 lcnphy_tr_isolation_mid; + u8 lcnphy_tr_isolation_low; + u8 lcnphy_tr_isolation_hi; - uint8 lcnphy_bx_arch; - uint8 lcnphy_rx_power_offset; - uint8 lcnphy_rssi_vf; - uint8 lcnphy_rssi_vc; - uint8 lcnphy_rssi_gs; - uint8 lcnphy_tssi_val; - uint8 lcnphy_rssi_vf_lowtemp; - uint8 lcnphy_rssi_vc_lowtemp; - uint8 lcnphy_rssi_gs_lowtemp; + u8 lcnphy_bx_arch; + u8 lcnphy_rx_power_offset; + u8 lcnphy_rssi_vf; + u8 lcnphy_rssi_vc; + u8 lcnphy_rssi_gs; + u8 lcnphy_tssi_val; + u8 lcnphy_rssi_vf_lowtemp; + u8 lcnphy_rssi_vc_lowtemp; + u8 lcnphy_rssi_gs_lowtemp; - uint8 lcnphy_rssi_vf_hightemp; - uint8 lcnphy_rssi_vc_hightemp; - uint8 lcnphy_rssi_gs_hightemp; + u8 lcnphy_rssi_vf_hightemp; + u8 lcnphy_rssi_vc_hightemp; + u8 lcnphy_rssi_gs_hightemp; int16 lcnphy_pa0b0; int16 lcnphy_pa0b1; int16 lcnphy_pa0b2; uint16 lcnphy_rawtempsense; - uint8 lcnphy_measPower; - uint8 lcnphy_tempsense_slope; - uint8 lcnphy_freqoffset_corr; - uint8 lcnphy_tempsense_option; - uint8 lcnphy_tempcorrx; + u8 lcnphy_measPower; + u8 lcnphy_tempsense_slope; + u8 lcnphy_freqoffset_corr; + u8 lcnphy_tempsense_option; + u8 lcnphy_tempcorrx; bool lcnphy_iqcal_swp_dis; bool lcnphy_hw_iqcal_en; uint lcnphy_bandedge_corr; @@ -85,14 +85,14 @@ struct phy_info_lcnphy { uint16 lcnphy_Very_Low_Gain_db; int8 lcnphy_lastsensed_temperature; int8 lcnphy_pkteng_rssi_slope; - uint8 lcnphy_saved_tx_user_target[TXP_NUM_RATES]; - uint8 lcnphy_volt_winner; - uint8 lcnphy_volt_low; - uint8 lcnphy_54_48_36_24mbps_backoff; - uint8 lcnphy_11n_backoff; - uint8 lcnphy_lowerofdm; - uint8 lcnphy_cck; - uint8 lcnphy_psat_2pt3_detected; + u8 lcnphy_saved_tx_user_target[TXP_NUM_RATES]; + u8 lcnphy_volt_winner; + u8 lcnphy_volt_low; + u8 lcnphy_54_48_36_24mbps_backoff; + u8 lcnphy_11n_backoff; + u8 lcnphy_lowerofdm; + u8 lcnphy_cck; + u8 lcnphy_psat_2pt3_detected; int32 lcnphy_lowest_Re_div_Im; int8 lcnphy_final_papd_cal_idx; uint16 lcnphy_extstxctrl4; @@ -102,19 +102,19 @@ struct phy_info_lcnphy { int16 lcnphy_ofdm_dig_filt_type; lcnphy_cal_results_t lcnphy_cal_results; - uint8 lcnphy_psat_pwr; - uint8 lcnphy_psat_indx; + u8 lcnphy_psat_pwr; + u8 lcnphy_psat_indx; int32 lcnphy_min_phase; - uint8 lcnphy_final_idx; - uint8 lcnphy_start_idx; - uint8 lcnphy_current_index; + u8 lcnphy_final_idx; + u8 lcnphy_start_idx; + u8 lcnphy_current_index; uint16 lcnphy_logen_buf_1; uint16 lcnphy_local_ovr_2; uint16 lcnphy_local_oval_6; uint16 lcnphy_local_oval_5; uint16 lcnphy_logen_mixer_1; - uint8 lcnphy_aci_stat; + u8 lcnphy_aci_stat; uint lcnphy_aci_start_time; int8 lcnphy_tx_power_offset[TXP_NUM_RATES]; }; diff --git a/drivers/staging/brcm80211/phy/wlc_phy_n.c b/drivers/staging/brcm80211/phy/wlc_phy_n.c index 5094e8f..1ec4b46 100644 --- a/drivers/staging/brcm80211/phy/wlc_phy_n.c +++ b/drivers/staging/brcm80211/phy/wlc_phy_n.c @@ -151,14 +151,14 @@ typedef struct _nphy_iqcal_params { } nphy_iqcal_params_t; typedef struct _nphy_txiqcal_ladder { - uint8 percent; - uint8 g_env; + u8 percent; + u8 g_env; } nphy_txiqcal_ladder_t; typedef struct { nphy_txgains_t gains; bool useindex; - uint8 index; + u8 index; } nphy_ipa_txcalgains_t; typedef struct nphy_papd_restore_state_t { @@ -258,28 +258,28 @@ typedef struct _chan_info_nphy_2055 { uint16 chan; uint16 freq; uint unknown; - uint8 RF_pll_ref; - uint8 RF_rf_pll_mod1; - uint8 RF_rf_pll_mod0; - uint8 RF_vco_cap_tail; - uint8 RF_vco_cal1; - uint8 RF_vco_cal2; - uint8 RF_pll_lf_c1; - uint8 RF_pll_lf_r1; - uint8 RF_pll_lf_c2; - uint8 RF_lgbuf_cen_buf; - uint8 RF_lgen_tune1; - uint8 RF_lgen_tune2; - uint8 RF_core1_lgbuf_a_tune; - uint8 RF_core1_lgbuf_g_tune; - uint8 RF_core1_rxrf_reg1; - uint8 RF_core1_tx_pga_pad_tn; - uint8 RF_core1_tx_mx_bgtrim; - uint8 RF_core2_lgbuf_a_tune; - uint8 RF_core2_lgbuf_g_tune; - uint8 RF_core2_rxrf_reg1; - uint8 RF_core2_tx_pga_pad_tn; - uint8 RF_core2_tx_mx_bgtrim; + u8 RF_pll_ref; + u8 RF_rf_pll_mod1; + u8 RF_rf_pll_mod0; + u8 RF_vco_cap_tail; + u8 RF_vco_cal1; + u8 RF_vco_cal2; + u8 RF_pll_lf_c1; + u8 RF_pll_lf_r1; + u8 RF_pll_lf_c2; + u8 RF_lgbuf_cen_buf; + u8 RF_lgen_tune1; + u8 RF_lgen_tune2; + u8 RF_core1_lgbuf_a_tune; + u8 RF_core1_lgbuf_g_tune; + u8 RF_core1_rxrf_reg1; + u8 RF_core1_tx_pga_pad_tn; + u8 RF_core1_tx_mx_bgtrim; + u8 RF_core2_lgbuf_a_tune; + u8 RF_core2_lgbuf_g_tune; + u8 RF_core2_rxrf_reg1; + u8 RF_core2_tx_pga_pad_tn; + u8 RF_core2_tx_mx_bgtrim; uint16 PHY_BW1a; uint16 PHY_BW2; uint16 PHY_BW3; @@ -291,43 +291,43 @@ typedef struct _chan_info_nphy_2055 { typedef struct _chan_info_nphy_radio205x { uint16 chan; uint16 freq; - uint8 RF_SYN_pll_vcocal1; - uint8 RF_SYN_pll_vcocal2; - uint8 RF_SYN_pll_refdiv; - uint8 RF_SYN_pll_mmd2; - uint8 RF_SYN_pll_mmd1; - uint8 RF_SYN_pll_loopfilter1; - uint8 RF_SYN_pll_loopfilter2; - uint8 RF_SYN_pll_loopfilter3; - uint8 RF_SYN_pll_loopfilter4; - uint8 RF_SYN_pll_loopfilter5; - uint8 RF_SYN_reserved_addr27; - uint8 RF_SYN_reserved_addr28; - uint8 RF_SYN_reserved_addr29; - uint8 RF_SYN_logen_VCOBUF1; - uint8 RF_SYN_logen_MIXER2; - uint8 RF_SYN_logen_BUF3; - uint8 RF_SYN_logen_BUF4; - uint8 RF_RX0_lnaa_tune; - uint8 RF_RX0_lnag_tune; - uint8 RF_TX0_intpaa_boost_tune; - uint8 RF_TX0_intpag_boost_tune; - uint8 RF_TX0_pada_boost_tune; - uint8 RF_TX0_padg_boost_tune; - uint8 RF_TX0_pgaa_boost_tune; - uint8 RF_TX0_pgag_boost_tune; - uint8 RF_TX0_mixa_boost_tune; - uint8 RF_TX0_mixg_boost_tune; - uint8 RF_RX1_lnaa_tune; - uint8 RF_RX1_lnag_tune; - uint8 RF_TX1_intpaa_boost_tune; - uint8 RF_TX1_intpag_boost_tune; - uint8 RF_TX1_pada_boost_tune; - uint8 RF_TX1_padg_boost_tune; - uint8 RF_TX1_pgaa_boost_tune; - uint8 RF_TX1_pgag_boost_tune; - uint8 RF_TX1_mixa_boost_tune; - uint8 RF_TX1_mixg_boost_tune; + u8 RF_SYN_pll_vcocal1; + u8 RF_SYN_pll_vcocal2; + u8 RF_SYN_pll_refdiv; + u8 RF_SYN_pll_mmd2; + u8 RF_SYN_pll_mmd1; + u8 RF_SYN_pll_loopfilter1; + u8 RF_SYN_pll_loopfilter2; + u8 RF_SYN_pll_loopfilter3; + u8 RF_SYN_pll_loopfilter4; + u8 RF_SYN_pll_loopfilter5; + u8 RF_SYN_reserved_addr27; + u8 RF_SYN_reserved_addr28; + u8 RF_SYN_reserved_addr29; + u8 RF_SYN_logen_VCOBUF1; + u8 RF_SYN_logen_MIXER2; + u8 RF_SYN_logen_BUF3; + u8 RF_SYN_logen_BUF4; + u8 RF_RX0_lnaa_tune; + u8 RF_RX0_lnag_tune; + u8 RF_TX0_intpaa_boost_tune; + u8 RF_TX0_intpag_boost_tune; + u8 RF_TX0_pada_boost_tune; + u8 RF_TX0_padg_boost_tune; + u8 RF_TX0_pgaa_boost_tune; + u8 RF_TX0_pgag_boost_tune; + u8 RF_TX0_mixa_boost_tune; + u8 RF_TX0_mixg_boost_tune; + u8 RF_RX1_lnaa_tune; + u8 RF_RX1_lnag_tune; + u8 RF_TX1_intpaa_boost_tune; + u8 RF_TX1_intpag_boost_tune; + u8 RF_TX1_pada_boost_tune; + u8 RF_TX1_padg_boost_tune; + u8 RF_TX1_pgaa_boost_tune; + u8 RF_TX1_pgag_boost_tune; + u8 RF_TX1_mixa_boost_tune; + u8 RF_TX1_mixg_boost_tune; uint16 PHY_BW1a; uint16 PHY_BW2; uint16 PHY_BW3; @@ -339,34 +339,34 @@ typedef struct _chan_info_nphy_radio205x { typedef struct _chan_info_nphy_radio2057 { uint16 chan; uint16 freq; - uint8 RF_vcocal_countval0; - uint8 RF_vcocal_countval1; - uint8 RF_rfpll_refmaster_sparextalsize; - uint8 RF_rfpll_loopfilter_r1; - uint8 RF_rfpll_loopfilter_c2; - uint8 RF_rfpll_loopfilter_c1; - uint8 RF_cp_kpd_idac; - uint8 RF_rfpll_mmd0; - uint8 RF_rfpll_mmd1; - uint8 RF_vcobuf_tune; - uint8 RF_logen_mx2g_tune; - uint8 RF_logen_mx5g_tune; - uint8 RF_logen_indbuf2g_tune; - uint8 RF_logen_indbuf5g_tune; - uint8 RF_txmix2g_tune_boost_pu_core0; - uint8 RF_pad2g_tune_pus_core0; - uint8 RF_pga_boost_tune_core0; - uint8 RF_txmix5g_boost_tune_core0; - uint8 RF_pad5g_tune_misc_pus_core0; - uint8 RF_lna2g_tune_core0; - uint8 RF_lna5g_tune_core0; - uint8 RF_txmix2g_tune_boost_pu_core1; - uint8 RF_pad2g_tune_pus_core1; - uint8 RF_pga_boost_tune_core1; - uint8 RF_txmix5g_boost_tune_core1; - uint8 RF_pad5g_tune_misc_pus_core1; - uint8 RF_lna2g_tune_core1; - uint8 RF_lna5g_tune_core1; + u8 RF_vcocal_countval0; + u8 RF_vcocal_countval1; + u8 RF_rfpll_refmaster_sparextalsize; + u8 RF_rfpll_loopfilter_r1; + u8 RF_rfpll_loopfilter_c2; + u8 RF_rfpll_loopfilter_c1; + u8 RF_cp_kpd_idac; + u8 RF_rfpll_mmd0; + u8 RF_rfpll_mmd1; + u8 RF_vcobuf_tune; + u8 RF_logen_mx2g_tune; + u8 RF_logen_mx5g_tune; + u8 RF_logen_indbuf2g_tune; + u8 RF_logen_indbuf5g_tune; + u8 RF_txmix2g_tune_boost_pu_core0; + u8 RF_pad2g_tune_pus_core0; + u8 RF_pga_boost_tune_core0; + u8 RF_txmix5g_boost_tune_core0; + u8 RF_pad5g_tune_misc_pus_core0; + u8 RF_lna2g_tune_core0; + u8 RF_lna5g_tune_core0; + u8 RF_txmix2g_tune_boost_pu_core1; + u8 RF_pad2g_tune_pus_core1; + u8 RF_pga_boost_tune_core1; + u8 RF_txmix5g_boost_tune_core1; + u8 RF_pad5g_tune_misc_pus_core1; + u8 RF_lna2g_tune_core1; + u8 RF_lna5g_tune_core1; uint16 PHY_BW1a; uint16 PHY_BW2; uint16 PHY_BW3; @@ -378,24 +378,24 @@ typedef struct _chan_info_nphy_radio2057 { typedef struct _chan_info_nphy_radio2057_rev5 { uint16 chan; uint16 freq; - uint8 RF_vcocal_countval0; - uint8 RF_vcocal_countval1; - uint8 RF_rfpll_refmaster_sparextalsize; - uint8 RF_rfpll_loopfilter_r1; - uint8 RF_rfpll_loopfilter_c2; - uint8 RF_rfpll_loopfilter_c1; - uint8 RF_cp_kpd_idac; - uint8 RF_rfpll_mmd0; - uint8 RF_rfpll_mmd1; - uint8 RF_vcobuf_tune; - uint8 RF_logen_mx2g_tune; - uint8 RF_logen_indbuf2g_tune; - uint8 RF_txmix2g_tune_boost_pu_core0; - uint8 RF_pad2g_tune_pus_core0; - uint8 RF_lna2g_tune_core0; - uint8 RF_txmix2g_tune_boost_pu_core1; - uint8 RF_pad2g_tune_pus_core1; - uint8 RF_lna2g_tune_core1; + u8 RF_vcocal_countval0; + u8 RF_vcocal_countval1; + u8 RF_rfpll_refmaster_sparextalsize; + u8 RF_rfpll_loopfilter_r1; + u8 RF_rfpll_loopfilter_c2; + u8 RF_rfpll_loopfilter_c1; + u8 RF_cp_kpd_idac; + u8 RF_rfpll_mmd0; + u8 RF_rfpll_mmd1; + u8 RF_vcobuf_tune; + u8 RF_logen_mx2g_tune; + u8 RF_logen_indbuf2g_tune; + u8 RF_txmix2g_tune_boost_pu_core0; + u8 RF_pad2g_tune_pus_core0; + u8 RF_lna2g_tune_core0; + u8 RF_txmix2g_tune_boost_pu_core1; + u8 RF_pad2g_tune_pus_core1; + u8 RF_lna2g_tune_core1; uint16 PHY_BW1a; uint16 PHY_BW2; uint16 PHY_BW3; @@ -13755,24 +13755,24 @@ static int8 nphy_papd_pgagain_dlt_5g_2057rev7[] = { -50, -44, -36, -28, -23, -15, -8, 0 }; -static uint8 pad_gain_codes_used_2057rev5[] = { +static u8 pad_gain_codes_used_2057rev5[] = { 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1 }; -static uint8 pad_gain_codes_used_2057rev7[] = { +static u8 pad_gain_codes_used_2057rev7[] = { 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1 }; -static uint8 pad_all_gain_codes_2057[] = { +static u8 pad_all_gain_codes_2057[] = { 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }; -static uint8 pga_all_gain_codes_2057[] = { +static u8 pga_all_gain_codes_2057[] = { 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }; @@ -14075,11 +14075,11 @@ static uint32 nphy_tpc_5GHz_txgain_HiPwrEPA[] = { 0x20d1003a, 0x20d10038, 0x20d10036, 0x20d10034 }; -static uint8 ant_sw_ctrl_tbl_rev8_2o3[] = { 0x14, 0x18 }; -static uint8 ant_sw_ctrl_tbl_rev8[] = { 0x4, 0x8, 0x4, 0x8, 0x11, 0x12 }; -static uint8 ant_sw_ctrl_tbl_rev8_2057v7_core0[] = { +static u8 ant_sw_ctrl_tbl_rev8_2o3[] = { 0x14, 0x18 }; +static u8 ant_sw_ctrl_tbl_rev8[] = { 0x4, 0x8, 0x4, 0x8, 0x11, 0x12 }; +static u8 ant_sw_ctrl_tbl_rev8_2057v7_core0[] = { 0x09, 0x0a, 0x15, 0x16, 0x09, 0x0a }; -static uint8 ant_sw_ctrl_tbl_rev8_2057v7_core1[] = { +static u8 ant_sw_ctrl_tbl_rev8_2057v7_core1[] = { 0x09, 0x0a, 0x09, 0x0a, 0x15, 0x16 }; static bool wlc_phy_chan2freq_nphy(phy_info_t *pi, uint channel, int *f, @@ -14094,7 +14094,7 @@ static void wlc_phy_adjust_rx_analpfbw_nphy(phy_info_t *pi, uint16 reduction_factr); static void wlc_phy_adjust_min_noisevar_nphy(phy_info_t *pi, int ntones, int *, uint32 *buf); -static void wlc_phy_adjust_crsminpwr_nphy(phy_info_t *pi, uint8 minpwr); +static void wlc_phy_adjust_crsminpwr_nphy(phy_info_t *pi, u8 minpwr); static void wlc_phy_txlpfbw_nphy(phy_info_t *pi); static void wlc_phy_spurwar_nphy(phy_info_t *pi); @@ -14116,9 +14116,9 @@ static void wlc_phy_restore_rssical_nphy(phy_info_t *pi); static void wlc_phy_reapply_txcal_coeffs_nphy(phy_info_t *pi); static void wlc_phy_tx_iq_war_nphy(phy_info_t *pi); static int wlc_phy_cal_rxiq_nphy_rev3(phy_info_t *pi, nphy_txgains_t tg, - uint8 type, bool d); -static void wlc_phy_rxcal_gainctrl_nphy_rev5(phy_info_t *pi, uint8 rxcore, - uint16 *rg, uint8 type); + u8 type, bool d); +static void wlc_phy_rxcal_gainctrl_nphy_rev5(phy_info_t *pi, u8 rxcore, + uint16 *rg, u8 type); static void wlc_phy_update_mimoconfig_nphy(phy_info_t *pi, int32 preamble); static void wlc_phy_savecal_nphy(phy_info_t *pi); static void wlc_phy_restorecal_nphy(phy_info_t *pi); @@ -14133,39 +14133,39 @@ static void wlc_phy_extpa_set_tx_digi_filts_nphy(phy_info_t *pi); static void wlc_phy_ipa_set_tx_digi_filts_nphy(phy_info_t *pi); static void wlc_phy_ipa_restore_tx_digi_filts_nphy(phy_info_t *pi); static uint16 wlc_phy_ipa_get_bbmult_nphy(phy_info_t *pi); -static void wlc_phy_ipa_set_bbmult_nphy(phy_info_t *pi, uint8 m0, uint8 m1); +static void wlc_phy_ipa_set_bbmult_nphy(phy_info_t *pi, u8 m0, u8 m1); static uint32 *wlc_phy_get_ipa_gaintbl_nphy(phy_info_t *pi); -static void wlc_phy_a1_nphy(phy_info_t *pi, uint8 core, uint32 winsz, uint32, +static void wlc_phy_a1_nphy(phy_info_t *pi, u8 core, uint32 winsz, uint32, uint32 e); -static uint8 wlc_phy_a3_nphy(phy_info_t *pi, uint8 start_gain, uint8 core); +static u8 wlc_phy_a3_nphy(phy_info_t *pi, u8 start_gain, u8 core); static void wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *, - phy_cal_mode_t, uint8); + phy_cal_mode_t, u8); static void wlc_phy_papd_cal_cleanup_nphy(phy_info_t *pi, nphy_papd_restore_state *state); static void wlc_phy_papd_cal_setup_nphy(phy_info_t *pi, - nphy_papd_restore_state *state, uint8); + nphy_papd_restore_state *state, u8); -static void wlc_phy_clip_det_nphy(phy_info_t *pi, uint8 write, uint16 *vals); +static void wlc_phy_clip_det_nphy(phy_info_t *pi, u8 write, uint16 *vals); -static void wlc_phy_set_rfseq_nphy(phy_info_t *pi, uint8 cmd, uint8 *evts, - uint8 *dlys, uint8 len); +static void wlc_phy_set_rfseq_nphy(phy_info_t *pi, u8 cmd, u8 *evts, + u8 *dlys, u8 len); static uint16 wlc_phy_read_lpf_bw_ctl_nphy(phy_info_t *pi, uint16 offset); static void wlc_phy_rfctrl_override_nphy_rev7(phy_info_t *pi, uint16 field, uint16 value, - uint8 core_mask, uint8 off, - uint8 override_id); + u8 core_mask, u8 off, + u8 override_id); -static void wlc_phy_rssi_cal_nphy_rev2(phy_info_t *pi, uint8 rssi_type); +static void wlc_phy_rssi_cal_nphy_rev2(phy_info_t *pi, u8 rssi_type); static void wlc_phy_rssi_cal_nphy_rev3(phy_info_t *pi); static bool wlc_phy_txpwr_srom_read_nphy(phy_info_t *pi); -static void wlc_phy_txpwr_nphy_srom_convert(uint8 *srom_max, +static void wlc_phy_txpwr_nphy_srom_convert(u8 *srom_max, uint16 *pwr_offset, - uint8 tmp_max_pwr, uint8 rate_start, - uint8 rate_end); + u8 tmp_max_pwr, u8 rate_start, + u8 rate_end); static void wlc_phy_txpwr_limit_to_tbl_nphy(phy_info_t *pi); static void wlc_phy_txpwrctrl_coeff_setup_nphy(phy_info_t *pi); @@ -14173,9 +14173,9 @@ static void wlc_phy_txpwrctrl_idle_tssi_nphy(phy_info_t *pi); static void wlc_phy_txpwrctrl_pwr_setup_nphy(phy_info_t *pi); static bool wlc_phy_txpwr_ison_nphy(phy_info_t *pi); -static uint8 wlc_phy_txpwr_idx_cur_get_nphy(phy_info_t *pi, uint8 core); -static void wlc_phy_txpwr_idx_cur_set_nphy(phy_info_t *pi, uint8 idx0, - uint8 idx1); +static u8 wlc_phy_txpwr_idx_cur_get_nphy(phy_info_t *pi, u8 core); +static void wlc_phy_txpwr_idx_cur_set_nphy(phy_info_t *pi, u8 idx0, + u8 idx1); static void wlc_phy_a4(phy_info_t *pi, bool full_cal); static uint16 wlc_phy_radio205x_rcal(phy_info_t *pi); @@ -14184,11 +14184,11 @@ static uint16 wlc_phy_radio2057_rccal(phy_info_t *pi); static uint16 wlc_phy_gen_load_samples_nphy(phy_info_t *pi, uint32 f_kHz, uint16 max_val, - uint8 dac_test_mode); + u8 dac_test_mode); static void wlc_phy_loadsampletable_nphy(phy_info_t *pi, cint32 *tone_buf, uint16 num_samps); static void wlc_phy_runsamples_nphy(phy_info_t *pi, uint16 n, uint16 lps, - uint16 wait, uint8 iq, uint8 dac_test_mode, + uint16 wait, u8 iq, u8 dac_test_mode, bool modify_bbmult); bool wlc_phy_bist_check_phy(wlc_phy_t *pih) @@ -14297,7 +14297,7 @@ static void WLBANDINITFN(wlc_phy_static_table_download_nphy) (phy_info_t *pi) static void WLBANDINITFN(wlc_phy_tbl_init_nphy) (phy_info_t *pi) { uint idx = 0; - uint8 antswctrllut; + u8 antswctrllut; if (pi->phy_init_por) wlc_phy_static_table_download_nphy(pi); @@ -14426,7 +14426,7 @@ wlc_phy_write_txmacreg_nphy(phy_info_t *pi, uint16 holdoff, uint16 delay) write_phy_reg(pi, 0xb4, delay); } -void wlc_phy_nphy_tkip_rifs_war(phy_info_t *pi, uint8 rifs) +void wlc_phy_nphy_tkip_rifs_war(phy_info_t *pi, u8 rifs) { uint16 holdoff, delay; @@ -14531,7 +14531,7 @@ void WLBANDINITFN(wlc_phy_init_nphy) (phy_info_t *pi) uint16 val; uint16 clip1_ths[2]; nphy_txgains_t target_gain; - uint8 tx_pwr_ctrl_state; + u8 tx_pwr_ctrl_state; bool do_nphy_cal = FALSE; uint core; uint origidx, intr_val; @@ -15040,7 +15040,7 @@ void wlc_phy_stf_chain_upd_nphy(phy_info_t *pi) } } -void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, uint8 rxcore_bitmask) +void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, u8 rxcore_bitmask) { uint16 regval; uint16 tbl_buf[16]; @@ -15081,7 +15081,7 @@ void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, uint8 rxcore_bitmask) if (tbl_buf[i] == NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS) { - pi->rx2tx_biasentry = (uint8) i; + pi->rx2tx_biasentry = (u8) i; tbl_opcode = NPHY_REV3_RFSEQ_CMD_NOP; wlc_phy_table_write_nphy(pi, @@ -15121,7 +15121,7 @@ void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, uint8 rxcore_bitmask) wlapi_enable_mac(pi->sh->physhim); } -uint8 wlc_phy_rxcore_getstate_nphy(wlc_phy_t *pih) +u8 wlc_phy_rxcore_getstate_nphy(wlc_phy_t *pih) { uint16 regval, rxen_bits; phy_info_t *pi = (phy_info_t *) pih; @@ -15129,7 +15129,7 @@ uint8 wlc_phy_rxcore_getstate_nphy(wlc_phy_t *pih) regval = read_phy_reg(pi, 0xa2); rxen_bits = (regval >> 4) & 0xf; - return (uint8) rxen_bits; + return (u8) rxen_bits; } bool wlc_phy_n_txpower_ipa_ison(phy_info_t *pi) @@ -15139,7 +15139,7 @@ bool wlc_phy_n_txpower_ipa_ison(phy_info_t *pi) static void wlc_phy_txpwr_limit_to_tbl_nphy(phy_info_t *pi) { - uint8 idx, idx2, i, delta_ind; + u8 idx, idx2, i, delta_ind; for (idx = TXP_FIRST_CCK; idx <= TXP_LAST_CCK; idx++) { pi->adj_pwr_tbl_nphy[idx] = pi->tx_power_offset[idx]; @@ -15235,7 +15235,7 @@ void wlc_phy_cal_init_nphy(phy_info_t *pi) { } -static void wlc_phy_war_force_trsw_to_R_cliplo_nphy(phy_info_t *pi, uint8 core) +static void wlc_phy_war_force_trsw_to_R_cliplo_nphy(phy_info_t *pi, u8 core) { if (core == PHY_CORE_0) { write_phy_reg(pi, 0x38, 0x4); @@ -15254,9 +15254,9 @@ static void wlc_phy_war_force_trsw_to_R_cliplo_nphy(phy_info_t *pi, uint8 core) } } -static void wlc_phy_war_txchain_upd_nphy(phy_info_t *pi, uint8 txchain) +static void wlc_phy_war_txchain_upd_nphy(phy_info_t *pi, u8 txchain) { - uint8 txchain0, txchain1; + u8 txchain0, txchain1; txchain0 = txchain & 0x1; txchain1 = (txchain & 0x2) >> 1; @@ -15271,7 +15271,7 @@ static void wlc_phy_war_txchain_upd_nphy(phy_info_t *pi, uint8 txchain) static void wlc_phy_workarounds_nphy(phy_info_t *pi) { - uint8 rfseq_rx2tx_events[] = { + u8 rfseq_rx2tx_events[] = { NPHY_RFSEQ_CMD_NOP, NPHY_RFSEQ_CMD_RXG_FBW, NPHY_RFSEQ_CMD_TR_SWITCH, @@ -15280,8 +15280,8 @@ static void wlc_phy_workarounds_nphy(phy_info_t *pi) NPHY_RFSEQ_CMD_TX_GAIN, NPHY_RFSEQ_CMD_EXT_PA }; - uint8 rfseq_rx2tx_dlys[] = { 8, 6, 6, 2, 4, 60, 1 }; - uint8 rfseq_tx2rx_events[] = { + u8 rfseq_rx2tx_dlys[] = { 8, 6, 6, 2, 4, 60, 1 }; + u8 rfseq_tx2rx_events[] = { NPHY_RFSEQ_CMD_NOP, NPHY_RFSEQ_CMD_EXT_PA, NPHY_RFSEQ_CMD_TX_GAIN, @@ -15290,8 +15290,8 @@ static void wlc_phy_workarounds_nphy(phy_info_t *pi) NPHY_RFSEQ_CMD_RXG_FBW, NPHY_RFSEQ_CMD_CLR_HIQ_DIS }; - uint8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 }; - uint8 rfseq_tx2rx_events_rev3[] = { + u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 }; + u8 rfseq_tx2rx_events_rev3[] = { NPHY_REV3_RFSEQ_CMD_EXT_PA, NPHY_REV3_RFSEQ_CMD_INT_PA_PU, NPHY_REV3_RFSEQ_CMD_TX_GAIN, @@ -15301,8 +15301,8 @@ static void wlc_phy_workarounds_nphy(phy_info_t *pi) NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, NPHY_REV3_RFSEQ_CMD_END }; - uint8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 }; - uint8 rfseq_rx2tx_events_rev3[] = { + u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 }; + u8 rfseq_rx2tx_events_rev3[] = { NPHY_REV3_RFSEQ_CMD_NOP, NPHY_REV3_RFSEQ_CMD_RXG_FBW, NPHY_REV3_RFSEQ_CMD_TR_SWITCH, @@ -15313,9 +15313,9 @@ static void wlc_phy_workarounds_nphy(phy_info_t *pi) NPHY_REV3_RFSEQ_CMD_EXT_PA, NPHY_REV3_RFSEQ_CMD_END }; - uint8 rfseq_rx2tx_dlys_rev3[] = { 8, 6, 6, 4, 4, 18, 42, 1, 1 }; + u8 rfseq_rx2tx_dlys_rev3[] = { 8, 6, 6, 4, 4, 18, 42, 1, 1 }; - uint8 rfseq_rx2tx_events_rev3_ipa[] = { + u8 rfseq_rx2tx_events_rev3_ipa[] = { NPHY_REV3_RFSEQ_CMD_NOP, NPHY_REV3_RFSEQ_CMD_RXG_FBW, NPHY_REV3_RFSEQ_CMD_TR_SWITCH, @@ -15326,14 +15326,14 @@ static void wlc_phy_workarounds_nphy(phy_info_t *pi) NPHY_REV3_RFSEQ_CMD_INT_PA_PU, NPHY_REV3_RFSEQ_CMD_END }; - uint8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 }; + u8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 }; uint16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f }; int16 alpha0, alpha1, alpha2; int16 beta0, beta1, beta2; uint32 leg_data_weights, ht_data_weights, nss1_data_weights, stbc_data_weights; - uint8 chan_freq_range = 0; + u8 chan_freq_range = 0; uint16 dac_control = 0x0002; uint16 aux_adc_vmid_rev7_core0[] = { 0x8e, 0x96, 0x96, 0x96 }; uint16 aux_adc_vmid_rev7_core1[] = { 0x8f, 0x9f, 0x9f, 0x96 }; @@ -15348,8 +15348,8 @@ static void wlc_phy_workarounds_nphy(phy_info_t *pi) uint16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 }; int32 min_nvar_val = 0x18d; int32 min_nvar_offset_6mbps = 20; - uint8 pdetrange; - uint8 triso; + u8 pdetrange; + u8 triso; uint16 regval; uint16 afectrl_adc_ctrl1_rev7 = 0x20; uint16 afectrl_adc_ctrl2_rev7 = 0x0; @@ -16244,7 +16244,7 @@ static void wlc_phy_workarounds_nphy(phy_info_t *pi) if (pi->sh->boardflags2 & BFL2_SKWRKFEM_BRD || (pi->sh->boardtype == 0x8b)) { uint i; - uint8 war_dlys[] = { 1, 6, 6, 2, 4, 20, 1 }; + u8 war_dlys[] = { 1, 6, 6, 2, 4, 20, 1 }; for (i = 0; i < ARRAYSIZE(rfseq_rx2tx_dlys); i++) rfseq_rx2tx_dlys[i] = war_dlys[i]; } @@ -16350,12 +16350,12 @@ static void wlc_phy_workarounds_nphy_gainctrl(phy_info_t *pi) { uint16 w1th, hpf_code, currband; int ctr; - uint8 rfseq_updategainu_events[] = { + u8 rfseq_updategainu_events[] = { NPHY_RFSEQ_CMD_RX_GAIN, NPHY_RFSEQ_CMD_CLR_HIQ_DIS, NPHY_RFSEQ_CMD_SET_HPF_BW }; - uint8 rfseq_updategainu_dlys[] = { 10, 30, 1 }; + u8 rfseq_updategainu_dlys[] = { 10, 30, 1 }; int8 lna1G_gain_db[] = { 7, 11, 16, 23 }; int8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 }; int8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 }; @@ -16455,31 +16455,31 @@ static void wlc_phy_workarounds_nphy_gainctrl(phy_info_t *pi) uint16 clip1loA_gaincode_rev5 = 0x2086; uint16 clip1loA_gaincode_rev6 = 0x2086; uint16 clip1lo_gaincode; - uint8 crsminG_th = 0x18; - uint8 crsminG_th_rev5 = 0x18; - uint8 crsminG_th_rev6 = 0x18; - uint8 crsminA_th = 0x1e; - uint8 crsminA_th_rev4 = 0x24; - uint8 crsminA_th_rev5 = 0x24; - uint8 crsminA_th_rev6 = 0x24; - uint8 crsmin_th; - uint8 crsminlG_th = 0x18; - uint8 crsminlG_th_rev5 = 0x18; - uint8 crsminlG_th_rev6 = 0x18; - uint8 crsminlA_th = 0x1e; - uint8 crsminlA_th_rev4 = 0x24; - uint8 crsminlA_th_rev5 = 0x24; - uint8 crsminlA_th_rev6 = 0x24; - uint8 crsminl_th = 0; - uint8 crsminuG_th = 0x18; - uint8 crsminuG_th_rev5 = 0x18; - uint8 crsminuG_th_rev6 = 0x18; - uint8 crsminuA_th = 0x1e; - uint8 crsminuA_th_rev4 = 0x24; - uint8 crsminuA_th_rev5 = 0x24; - uint8 crsminuA_th_rev6 = 0x24; - uint8 crsminuA_th_rev6_224B0 = 0x2d; - uint8 crsminu_th; + u8 crsminG_th = 0x18; + u8 crsminG_th_rev5 = 0x18; + u8 crsminG_th_rev6 = 0x18; + u8 crsminA_th = 0x1e; + u8 crsminA_th_rev4 = 0x24; + u8 crsminA_th_rev5 = 0x24; + u8 crsminA_th_rev6 = 0x24; + u8 crsmin_th; + u8 crsminlG_th = 0x18; + u8 crsminlG_th_rev5 = 0x18; + u8 crsminlG_th_rev6 = 0x18; + u8 crsminlA_th = 0x1e; + u8 crsminlA_th_rev4 = 0x24; + u8 crsminlA_th_rev5 = 0x24; + u8 crsminlA_th_rev6 = 0x24; + u8 crsminl_th = 0; + u8 crsminuG_th = 0x18; + u8 crsminuG_th_rev5 = 0x18; + u8 crsminuG_th_rev6 = 0x18; + u8 crsminuA_th = 0x1e; + u8 crsminuA_th_rev4 = 0x24; + u8 crsminuA_th_rev5 = 0x24; + u8 crsminuA_th_rev6 = 0x24; + u8 crsminuA_th_rev6_224B0 = 0x2d; + u8 crsminu_th; uint16 nbclipG_th = 0x20d; uint16 nbclipG_th_rev4 = 0x1a1; uint16 nbclipG_th_rev5 = 0x1d0; @@ -16489,17 +16489,17 @@ static void wlc_phy_workarounds_nphy_gainctrl(phy_info_t *pi) uint16 nbclipA_th_rev5 = 0x0a9; uint16 nbclipA_th_rev6 = 0x0f0; uint16 nbclip_th = 0; - uint8 w1clipG_th = 5; - uint8 w1clipG_th_rev5 = 9; - uint8 w1clipG_th_rev6 = 5; - uint8 w1clipA_th = 25, w1clip_th; - uint8 rssi_gain_default = 0x50; - uint8 rssiG_gain_rev6_224B0 = 0x50; - uint8 rssiA_gain_rev5 = 0x90; - uint8 rssiA_gain_rev6 = 0x90; - uint8 rssi_gain; + u8 w1clipG_th = 5; + u8 w1clipG_th_rev5 = 9; + u8 w1clipG_th_rev6 = 5; + u8 w1clipA_th = 25, w1clip_th; + u8 rssi_gain_default = 0x50; + u8 rssiG_gain_rev6_224B0 = 0x50; + u8 rssiA_gain_rev5 = 0x90; + u8 rssiA_gain_rev6 = 0x90; + u8 rssi_gain; uint16 regval[21]; - uint8 triso; + u8 triso; triso = (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g.triso : pi->srom_fem2g.triso; @@ -17040,13 +17040,13 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(phy_info_t *pi) uint16 clip1md_gaincode_B; uint16 clip1lo_gaincode; uint16 clip1lo_gaincode_B; - uint8 crsminl_th = 0; - uint8 crsminu_th; + u8 crsminl_th = 0; + u8 crsminu_th; uint16 nbclip_th = 0; - uint8 w1clip_th; + u8 w1clip_th; uint16 freq; int8 nvar_baseline_offset0 = 0, nvar_baseline_offset1 = 0; - uint8 chg_nbclip_th = 0; + u8 chg_nbclip_th = 0; mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); @@ -17232,7 +17232,7 @@ static void wlc_phy_adjust_lnagaintbl_nphy(phy_info_t *pi) uint core; int ctr; int16 gain_delta[2]; - uint8 curr_channel; + u8 curr_channel; uint16 minmax_gain[2]; uint16 regval[4]; @@ -17791,7 +17791,7 @@ wlc_phy_chan2freq_nphy(phy_info_t *pi, uint channel, int *f, return FALSE; } -uint8 wlc_phy_get_chan_freq_range_nphy(phy_info_t *pi, uint channel) +u8 wlc_phy_get_chan_freq_range_nphy(phy_info_t *pi, uint channel) { int freq; chan_info_nphy_radio2057_t *t0 = NULL; @@ -18705,7 +18705,7 @@ wlc_phy_adjust_min_noisevar_nphy(phy_info_t *pi, int ntones, int *tone_id_buf, } } -static void wlc_phy_adjust_crsminpwr_nphy(phy_info_t *pi, uint8 minpwr) +static void wlc_phy_adjust_crsminpwr_nphy(phy_info_t *pi, u8 minpwr) { uint16 regval; @@ -18758,7 +18758,7 @@ static void wlc_phy_adjust_crsminpwr_nphy(phy_info_t *pi, uint8 minpwr) static void wlc_phy_txlpfbw_nphy(phy_info_t *pi) { - uint8 tx_lpf_bw = 0; + u8 tx_lpf_bw = 0; if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { if (CHSPEC_IS40(pi->radio_chanspec)) { @@ -19038,7 +19038,7 @@ wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec, if (NREV_GE(pi->pubpi.phy_rev, 3) && (pi->phy_spuravoid != SPURAVOID_DISABLE)) { - uint8 spuravoid = 0; + u8 spuravoid = 0; val = CHSPEC_CHANNEL(chanspec); if (!CHSPEC_IS40(pi->radio_chanspec)) { @@ -19649,7 +19649,7 @@ uint16 wlc_phy_classifier_nphy(phy_info_t *pi, uint16 mask, uint16 val) return new_ctl; } -static void wlc_phy_clip_det_nphy(phy_info_t *pi, uint8 write, uint16 *vals) +static void wlc_phy_clip_det_nphy(phy_info_t *pi, u8 write, uint16 *vals) { if (write == 0) { @@ -19661,7 +19661,7 @@ static void wlc_phy_clip_det_nphy(phy_info_t *pi, uint8 write, uint16 *vals) } } -void wlc_phy_force_rfseq_nphy(phy_info_t *pi, uint8 cmd) +void wlc_phy_force_rfseq_nphy(phy_info_t *pi, u8 cmd) { uint16 trigger_mask, status_mask; uint16 orig_RfseqCoreActv; @@ -19707,15 +19707,15 @@ void wlc_phy_force_rfseq_nphy(phy_info_t *pi, uint8 cmd) } static void -wlc_phy_set_rfseq_nphy(phy_info_t *pi, uint8 cmd, uint8 *events, uint8 *dlys, - uint8 len) +wlc_phy_set_rfseq_nphy(phy_info_t *pi, u8 cmd, u8 *events, u8 *dlys, + u8 len) { uint32 t1_offset, t2_offset; - uint8 ctr; - uint8 end_event = + u8 ctr; + u8 end_event = NREV_GE(pi->pubpi.phy_rev, 3) ? NPHY_REV3_RFSEQ_CMD_END : NPHY_RFSEQ_CMD_END; - uint8 end_dly = 1; + u8 end_dly = 1; ASSERT(len <= 16); @@ -19765,11 +19765,11 @@ static uint16 wlc_phy_read_lpf_bw_ctl_nphy(phy_info_t *pi, uint16 offset) static void wlc_phy_rfctrl_override_nphy_rev7(phy_info_t *pi, uint16 field, uint16 value, - uint8 core_mask, uint8 off, uint8 override_id) + u8 core_mask, u8 off, u8 override_id) { - uint8 core_num; + u8 core_num; uint16 addr = 0, en_addr = 0, val_addr = 0, en_mask = 0, val_mask = 0; - uint8 val_shift = 0; + u8 val_shift = 0; if (NREV_GE(pi->pubpi.phy_rev, 7)) { en_mask = field; @@ -20035,12 +20035,12 @@ wlc_phy_rfctrl_override_nphy_rev7(phy_info_t *pi, uint16 field, uint16 value, static void wlc_phy_rfctrl_override_nphy(phy_info_t *pi, uint16 field, uint16 value, - uint8 core_mask, uint8 off) + u8 core_mask, u8 off) { - uint8 core_num; + u8 core_num; uint16 addr = 0, mask = 0, en_addr = 0, val_addr = 0, en_mask = 0, val_mask = 0; - uint8 shift = 0, val_shift = 0; + u8 shift = 0, val_shift = 0; if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { @@ -20281,7 +20281,7 @@ wlc_phy_rfctrl_override_nphy(phy_info_t *pi, uint16 field, uint16 value, static void wlc_phy_rfctrl_override_1tomany_nphy(phy_info_t *pi, uint16 cmd, uint16 value, - uint8 core_mask, uint8 off) + u8 core_mask, u8 off) { uint16 rfmxgain = 0, lpfgain = 0; uint16 tgain = 0; @@ -20367,7 +20367,7 @@ wlc_phy_rfctrl_override_1tomany_nphy(phy_info_t *pi, uint16 cmd, uint16 value, static void wlc_phy_scale_offset_rssi_nphy(phy_info_t *pi, uint16 scale, int8 offset, - uint8 coresel, uint8 rail, uint8 rssi_type) + u8 coresel, u8 rail, u8 rssi_type) { uint16 valuetostuff; @@ -20506,7 +20506,7 @@ wlc_phy_scale_offset_rssi_nphy(phy_info_t *pi, uint16 scale, int8 offset, } } -void wlc_phy_rssisel_nphy(phy_info_t *pi, uint8 core_code, uint8 rssi_type) +void wlc_phy_rssisel_nphy(phy_info_t *pi, u8 core_code, u8 rssi_type) { uint16 mask, val; uint16 afectrlovr_rssi_val, rfctrlcmd_rxen_val, rfctrlcmd_coresel_val, @@ -20515,7 +20515,7 @@ void wlc_phy_rssisel_nphy(phy_info_t *pi, uint8 core_code, uint8 rssi_type) rfctrlovr_trigger_val; uint16 afectrlovr_rssi_mask, rfctrlcmd_mask, rfctrlovr_mask; uint16 rfctrlcmd_val, rfctrlovr_val; - uint8 core; + u8 core; if (NREV_GE(pi->pubpi.phy_rev, 3)) { if (core_code == RADIO_MIMO_CORESEL_OFF) { @@ -20810,8 +20810,8 @@ void wlc_phy_rssisel_nphy(phy_info_t *pi, uint8 core_code, uint8 rssi_type) } int -wlc_phy_poll_rssi_nphy(phy_info_t *pi, uint8 rssi_type, int32 *rssi_buf, - uint8 nsamps) +wlc_phy_poll_rssi_nphy(phy_info_t *pi, u8 rssi_type, int32 *rssi_buf, + u8 nsamps) { int16 rssi0, rssi1; uint16 afectrlCore1_save = 0; @@ -20827,7 +20827,7 @@ wlc_phy_poll_rssi_nphy(phy_info_t *pi, uint8 rssi_type, int32 *rssi_buf, uint16 rfctrlrssiothers1_save = 0; uint16 rfctrlrssiothers2_save = 0; int8 tmp_buf[4]; - uint8 ctr = 0, samp = 0; + u8 ctr = 0, samp = 0; int32 rssi_out_val; uint16 gpiosel_orig; @@ -21193,9 +21193,9 @@ int16 wlc_phy_tempsense_nphy(phy_info_t *pi) } static void -wlc_phy_set_rssi_2055_vcm(phy_info_t *pi, uint8 rssi_type, uint8 *vcm_buf) +wlc_phy_set_rssi_2055_vcm(phy_info_t *pi, u8 rssi_type, u8 *vcm_buf) { - uint8 core; + u8 core; for (core = 0; core < pi->pubpi.phy_corenum; core++) { if (rssi_type == NPHY_RSSI_SEL_NB) { @@ -21259,7 +21259,7 @@ void wlc_phy_rssi_cal_nphy(phy_info_t *pi) } } -static void wlc_phy_rssi_cal_nphy_rev2(phy_info_t *pi, uint8 rssi_type) +static void wlc_phy_rssi_cal_nphy_rev2(phy_info_t *pi, u8 rssi_type) { int32 target_code; uint16 classif_state; @@ -21269,9 +21269,9 @@ static void wlc_phy_rssi_cal_nphy_rev2(phy_info_t *pi, uint8 rssi_type) uint16 rfctrlintc_override_val; uint16 clip_off[] = { 0xffff, 0xffff }; uint16 rf_pd_val, pd_mask, rssi_ctrl_mask; - uint8 vcm, min_vcm, vcm_tmp[4]; - uint8 vcm_final[4] = { 0, 0, 0, 0 }; - uint8 result_idx, ctr; + u8 vcm, min_vcm, vcm_tmp[4]; + u8 vcm_final[4] = { 0, 0, 0, 0 }; + u8 result_idx, ctr; int32 poll_results[4][4] = { {0, 0, 0, 0}, {0, 0, 0, 0}, @@ -21509,12 +21509,12 @@ wlc_phy_rssi_compute_nphy(phy_info_t *pi, wlc_d11rxhdr_t *wlc_rxh) } static void -wlc_phy_rfctrlintc_override_nphy(phy_info_t *pi, uint8 field, uint16 value, - uint8 core_code) +wlc_phy_rfctrlintc_override_nphy(phy_info_t *pi, u8 field, uint16 value, + u8 core_code) { uint16 mask; uint16 val; - uint8 core; + u8 core; if (NREV_GE(pi->pubpi.phy_rev, 3)) { for (core = 0; core < pi->pubpi.phy_corenum; core++) { @@ -21749,9 +21749,9 @@ static void wlc_phy_rssi_cal_nphy_rev3(phy_info_t *pi) uint16 clip_state[2]; uint16 clip_off[] = { 0xffff, 0xffff }; int32 target_code; - uint8 vcm, min_vcm; - uint8 vcm_final = 0; - uint8 result_idx; + u8 vcm, min_vcm; + u8 vcm_final = 0; + u8 result_idx; int32 poll_results[8][4] = { {0, 0, 0, 0}, {0, 0, 0, 0}, @@ -21767,10 +21767,10 @@ static void wlc_phy_rssi_cal_nphy_rev3(phy_info_t *pi) int32 fine_digital_offset[4]; int32 poll_results_min[4] = { 0, 0, 0, 0 }; int32 min_poll; - uint8 vcm_level_max; - uint8 core; - uint8 wb_cnt; - uint8 rssi_type; + u8 vcm_level_max; + u8 core; + u8 wb_cnt; + u8 rssi_type; uint16 NPHY_Rfctrlintc1_save, NPHY_Rfctrlintc2_save; uint16 NPHY_AfectrlOverride1_save, NPHY_AfectrlOverride2_save; uint16 NPHY_AfectrlCore1_save, NPHY_AfectrlCore2_save; @@ -21779,7 +21779,7 @@ static void wlc_phy_rssi_cal_nphy_rev3(phy_info_t *pi) uint16 NPHY_RfctrlCmd_save; uint16 NPHY_RfctrlMiscReg1_save, NPHY_RfctrlMiscReg2_save; uint16 NPHY_RfctrlRSSIOTHERS1_save, NPHY_RfctrlRSSIOTHERS2_save; - uint8 rxcore_state; + u8 rxcore_state; uint16 NPHY_REV7_RfctrlOverride3_save, NPHY_REV7_RfctrlOverride4_save; uint16 NPHY_REV7_RfctrlOverride5_save, NPHY_REV7_RfctrlOverride6_save; uint16 NPHY_REV7_RfctrlMiscReg3_save, NPHY_REV7_RfctrlMiscReg4_save; @@ -22340,9 +22340,9 @@ static void wlc_phy_restore_rssical_nphy(phy_info_t *pi) static uint16 wlc_phy_gen_load_samples_nphy(phy_info_t *pi, uint32 f_kHz, uint16 max_val, - uint8 dac_test_mode) + u8 dac_test_mode) { - uint8 phy_bw, is_phybw40; + u8 phy_bw, is_phybw40; uint16 num_samps, t, spur; fixed theta = 0, rot = 0; uint32 tbl_len; @@ -22390,7 +22390,7 @@ wlc_phy_gen_load_samples_nphy(phy_info_t *pi, uint32 f_kHz, uint16 max_val, int wlc_phy_tx_tone_nphy(phy_info_t *pi, uint32 f_kHz, uint16 max_val, - uint8 iqmode, uint8 dac_test_mode, bool modify_bbmult) + u8 iqmode, u8 dac_test_mode, bool modify_bbmult) { uint16 num_samps; uint16 loops = 0xffff; @@ -22439,11 +22439,11 @@ wlc_phy_loadsampletable_nphy(phy_info_t *pi, cint32 *tone_buf, static void wlc_phy_runsamples_nphy(phy_info_t *pi, uint16 num_samps, uint16 loops, - uint16 wait, uint8 iqmode, uint8 dac_test_mode, + uint16 wait, u8 iqmode, u8 dac_test_mode, bool modify_bbmult) { uint16 bb_mult; - uint8 phy_bw, sample_cmd; + u8 phy_bw, sample_cmd; uint16 orig_RfseqCoreActv; uint16 lpf_bw_ctl_override3, lpf_bw_ctl_override4, lpf_bw_ctl_miscreg3, lpf_bw_ctl_miscreg4; @@ -22570,7 +22570,7 @@ void wlc_phy_stopplayback_nphy(phy_info_t *pi) nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi) { uint16 base_idx[2], curr_gain[2]; - uint8 core_no; + u8 core_no; nphy_txgains_t target_gain; uint32 *tx_pwrctrl_tbl = NULL; @@ -22729,10 +22729,10 @@ wlc_phy_iqcal_gainparams_nphy(phy_info_t *pi, uint16 core_no, nphy_txgains_t target_gain, nphy_iqcal_params_t *params) { - uint8 k; + u8 k; int idx; uint16 gain_index; - uint8 band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0); + u8 band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0); if (NREV_GE(pi->pubpi.phy_rev, 3)) { if (NREV_GE(pi->pubpi.phy_rev, 7)) { @@ -23472,14 +23472,14 @@ static void wlc_phy_txcal_phycleanup_nphy(phy_info_t *pi) #define NPHY_TEST_TONE_FREQ_20MHz 2500 void -wlc_phy_est_tonepwr_nphy(phy_info_t *pi, int32 *qdBm_pwrbuf, uint8 num_samps) +wlc_phy_est_tonepwr_nphy(phy_info_t *pi, int32 *qdBm_pwrbuf, u8 num_samps) { uint16 tssi_reg; int32 temp, pwrindex[2]; int32 idle_tssi[2]; int32 rssi_buf[4]; int32 tssival[2]; - uint8 tssi_type; + u8 tssi_type; tssi_reg = read_phy_reg(pi, 0x1e9); @@ -23491,7 +23491,7 @@ wlc_phy_est_tonepwr_nphy(phy_info_t *pi, int32 *qdBm_pwrbuf, uint8 num_samps) tssi_type = CHSPEC_IS5G(pi->radio_chanspec) ? - (uint8)NPHY_RSSI_SEL_TSSI_5G:(uint8)NPHY_RSSI_SEL_TSSI_2G; + (u8)NPHY_RSSI_SEL_TSSI_5G:(u8)NPHY_RSSI_SEL_TSSI_2G; wlc_phy_poll_rssi_nphy(pi, tssi_type, rssi_buf, num_samps); @@ -23546,8 +23546,8 @@ static void wlc_phy_internal_cal_txgain_nphy(phy_info_t *pi) static void wlc_phy_precal_txgain_nphy(phy_info_t *pi) { bool save_bbmult = FALSE; - uint8 txcal_index_2057_rev5n7 = 0; - uint8 txcal_index_2057_rev3n4n6 = 10; + u8 txcal_index_2057_rev5n7 = 0; + u8 txcal_index_2057_rev3n4n6 = 10; if (pi->use_int_tx_iqlo_cal_nphy) { if (NREV_GE(pi->pubpi.phy_rev, 7)) { @@ -23749,10 +23749,10 @@ wlc_phy_cal_txgainctrl_nphy(phy_info_t *pi, int32 dBm_targetpower, bool debug) } wlc_phy_txpwr_index_nphy(pi, (1 << core), - (uint8) txpwrindex, TRUE); + (u8) txpwrindex, TRUE); } - pi->nphy_txcal_pwr_idx[core] = (uint8) txpwrindex; + pi->nphy_txcal_pwr_idx[core] = (u8) txpwrindex; if (debug) { uint16 radio_gain; @@ -23840,10 +23840,10 @@ static void wlc_phy_update_txcal_ladder_nphy(phy_info_t *pi, uint16 core) } } -void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, uint8 caltype) +void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, u8 caltype) { nphy_txgains_t target_gain; - uint8 tx_pwr_ctrl_state; + u8 tx_pwr_ctrl_state; bool fullcal = TRUE; bool restore_tx_gain = FALSE; bool mphase; @@ -23884,9 +23884,9 @@ void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, uint8 caltype) if ((pi->mphase_cal_phase_id == MPHASE_CAL_STATE_IDLE) || (pi->mphase_cal_phase_id == MPHASE_CAL_STATE_INIT)) { pi->nphy_cal_orig_pwr_idx[0] = - (uint8) ((read_phy_reg(pi, 0x1ed) >> 8) & 0x7f); + (u8) ((read_phy_reg(pi, 0x1ed) >> 8) & 0x7f); pi->nphy_cal_orig_pwr_idx[1] = - (uint8) ((read_phy_reg(pi, 0x1ee) >> 8) & 0x7f); + (u8) ((read_phy_reg(pi, 0x1ee) >> 8) & 0x7f); if (pi->nphy_txpwrctrl != PHY_TPC_HW_OFF) { wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, @@ -24102,12 +24102,12 @@ wlc_phy_cal_txiqlo_nphy(phy_info_t *pi, nphy_txgains_t target_gain, { uint16 val; uint16 tbl_buf[11]; - uint8 cal_cnt; + u8 cal_cnt; uint16 cal_cmd; - uint8 num_cals, max_cal_cmds; + u8 num_cals, max_cal_cmds; uint16 core_no, cal_type; uint16 diq_start = 0; - uint8 phy_bw; + u8 phy_bw; uint16 max_val; uint16 tone_freq; uint16 gain_save[2]; @@ -24116,7 +24116,7 @@ wlc_phy_cal_txiqlo_nphy(phy_info_t *pi, nphy_txgains_t target_gain, uint32 tbl_len; void *tbl_ptr; bool ladder_updated[2]; - uint8 mphase_cal_lastphase = 0; + u8 mphase_cal_lastphase = 0; int bcmerror = BCME_OK; bool phyhang_avoid_state = FALSE; @@ -24515,7 +24515,7 @@ static void wlc_phy_tx_iq_war_nphy(phy_info_t *pi) } void -wlc_phy_rx_iq_coeffs_nphy(phy_info_t *pi, uint8 write, nphy_iq_comp_t *pcomp) +wlc_phy_rx_iq_coeffs_nphy(phy_info_t *pi, u8 write, nphy_iq_comp_t *pcomp) { if (write) { write_phy_reg(pi, 0x9a, pcomp->a0); @@ -24532,9 +24532,9 @@ wlc_phy_rx_iq_coeffs_nphy(phy_info_t *pi, uint8 write, nphy_iq_comp_t *pcomp) void wlc_phy_rx_iq_est_nphy(phy_info_t *pi, phy_iq_est_t *est, uint16 num_samps, - uint8 wait_time, uint8 wait_for_crs) + u8 wait_time, u8 wait_for_crs) { - uint8 core; + u8 core; write_phy_reg(pi, 0x12b, num_samps); mod_phy_reg(pi, 0x12a, (0xff << 0), (wait_time << 0)); @@ -24564,9 +24564,9 @@ wlc_phy_rx_iq_est_nphy(phy_info_t *pi, phy_iq_est_t *est, uint16 num_samps, } #define CAL_RETRY_CNT 2 -static void wlc_phy_calc_rx_iq_comp_nphy(phy_info_t *pi, uint8 core_mask) +static void wlc_phy_calc_rx_iq_comp_nphy(phy_info_t *pi, u8 core_mask) { - uint8 curr_core; + u8 curr_core; phy_iq_est_t est[PHY_CORE_MAX]; nphy_iq_comp_t old_comp, new_comp; int32 iq = 0; @@ -24687,7 +24687,7 @@ static void wlc_phy_calc_rx_iq_comp_nphy(phy_info_t *pi, uint8 core_mask) wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); } -static void wlc_phy_rxcal_radio_setup_nphy(phy_info_t *pi, uint8 rx_core) +static void wlc_phy_rxcal_radio_setup_nphy(phy_info_t *pi, u8 rx_core) { uint16 offtune_val; uint16 bias_g = 0; @@ -24984,7 +24984,7 @@ static void wlc_phy_rxcal_radio_setup_nphy(phy_info_t *pi, uint8 rx_core) } } -static void wlc_phy_rxcal_radio_cleanup_nphy(phy_info_t *pi, uint8 rx_core) +static void wlc_phy_rxcal_radio_cleanup_nphy(phy_info_t *pi, u8 rx_core) { if (NREV_GE(pi->pubpi.phy_rev, 7)) { if (rx_core == PHY_CORE_0) { @@ -25154,9 +25154,9 @@ static void wlc_phy_rxcal_radio_cleanup_nphy(phy_info_t *pi, uint8 rx_core) } } -static void wlc_phy_rxcal_physetup_nphy(phy_info_t *pi, uint8 rx_core) +static void wlc_phy_rxcal_physetup_nphy(phy_info_t *pi, u8 rx_core) { - uint8 tx_core; + u8 tx_core; uint16 rx_antval, tx_antval; if (NREV_GE(pi->pubpi.phy_rev, 7)) { @@ -25281,7 +25281,7 @@ static void wlc_phy_rxcal_physetup_nphy(phy_info_t *pi, uint8 rx_core) } } -static void wlc_phy_rxcal_phycleanup_nphy(phy_info_t *pi, uint8 rx_core) +static void wlc_phy_rxcal_phycleanup_nphy(phy_info_t *pi, u8 rx_core) { write_phy_reg(pi, 0xa2, pi->tx_rx_cal_phy_saveregs[0]); @@ -25308,22 +25308,22 @@ static void wlc_phy_rxcal_phycleanup_nphy(phy_info_t *pi, uint8 rx_core) } static void -wlc_phy_rxcal_gainctrl_nphy_rev5(phy_info_t *pi, uint8 rx_core, - uint16 *rxgain, uint8 cal_type) +wlc_phy_rxcal_gainctrl_nphy_rev5(phy_info_t *pi, u8 rx_core, + uint16 *rxgain, u8 cal_type) { uint16 num_samps; phy_iq_est_t est[PHY_CORE_MAX]; - uint8 tx_core; + u8 tx_core; nphy_iq_comp_t save_comp, zero_comp; uint32 i_pwr, q_pwr, curr_pwr, optim_pwr = 0, prev_pwr = 0, thresh_pwr = 10000; int16 desired_log2_pwr, actual_log2_pwr, delta_pwr; bool gainctrl_done = FALSE; - uint8 mix_tia_gain = 3; + u8 mix_tia_gain = 3; int8 optim_gaintbl_index = 0, prev_gaintbl_index = 0; int8 curr_gaintbl_index = 3; - uint8 gainctrl_dirn = NPHY_RXCAL_GAIN_INIT; + u8 gainctrl_dirn = NPHY_RXCAL_GAIN_INIT; nphy_ipa_txrxgain_t *nphy_rxcal_gaintbl; uint16 hpvga, lpf_biq1, lpf_biq0, lna2, lna1; int16 fine_gain_idx; @@ -25516,14 +25516,14 @@ wlc_phy_rxcal_gainctrl_nphy_rev5(phy_info_t *pi, uint8 rx_core, } static void -wlc_phy_rxcal_gainctrl_nphy(phy_info_t *pi, uint8 rx_core, uint16 *rxgain, - uint8 cal_type) +wlc_phy_rxcal_gainctrl_nphy(phy_info_t *pi, u8 rx_core, uint16 *rxgain, + u8 cal_type) { wlc_phy_rxcal_gainctrl_nphy_rev5(pi, rx_core, rxgain, cal_type); } -static uint8 -wlc_phy_rc_sweep_nphy(phy_info_t *pi, uint8 core_idx, uint8 loopback_type) +static u8 +wlc_phy_rc_sweep_nphy(phy_info_t *pi, u8 core_idx, u8 loopback_type) { uint32 target_bws[2] = { 9500, 21000 }; uint32 ref_tones[2] = { 3000, 6000 }; @@ -25765,15 +25765,15 @@ wlc_phy_rc_sweep_nphy(phy_info_t *pi, uint8 core_idx, uint8 loopback_type) #define WAIT_FOR_SCOPE 4000000 static int wlc_phy_cal_rxiq_nphy_rev3(phy_info_t *pi, nphy_txgains_t target_gain, - uint8 cal_type, bool debug) + u8 cal_type, bool debug) { uint16 orig_BBConfig; - uint8 core_no, rx_core; - uint8 best_rccal[2]; + u8 core_no, rx_core; + u8 best_rccal[2]; uint16 gain_save[2]; uint16 cal_gain[2]; nphy_iqcal_params_t cal_params[2]; - uint8 rxcore_state; + u8 rxcore_state; int8 rxlpf_rccal_hpc, txlpf_rccal_lpc; int8 txlpf_idac; bool phyhang_avoid_state = FALSE; @@ -25925,7 +25925,7 @@ wlc_phy_cal_rxiq_nphy_rev2(phy_info_t *pi, nphy_txgains_t target_gain, bool debug) { phy_iq_est_t est[PHY_CORE_MAX]; - uint8 core_num, rx_core, tx_core; + u8 core_num, rx_core, tx_core; uint16 lna_vals[] = { 0x3, 0x3, 0x1 }; uint16 hpf1_vals[] = { 0x7, 0x2, 0x0 }; uint16 hpf2_vals[] = { 0x2, 0x0, 0x0 }; @@ -25935,13 +25935,13 @@ wlc_phy_cal_rxiq_nphy_rev2(phy_info_t *pi, nphy_txgains_t target_gain, uint16 orig_RfctrlIntcRx, orig_RfctrlIntcTx; uint16 num_samps; uint32 i_pwr, q_pwr, tot_pwr[3]; - uint8 gain_pass, use_hpf_num; + u8 gain_pass, use_hpf_num; uint16 mask, val1, val2; uint16 core_no; uint16 gain_save[2]; uint16 cal_gain[2]; nphy_iqcal_params_t cal_params[2]; - uint8 phy_bw; + u8 phy_bw; int bcmerror = BCME_OK; bool first_playtone = TRUE; @@ -26148,7 +26148,7 @@ wlc_phy_cal_rxiq_nphy_rev2(phy_info_t *pi, nphy_txgains_t target_gain, int wlc_phy_cal_rxiq_nphy(phy_info_t *pi, nphy_txgains_t target_gain, - uint8 cal_type, bool debug) + u8 cal_type, bool debug) { if (NREV_GE(pi->pubpi.phy_rev, 7)) { @@ -26237,7 +26237,7 @@ static uint16 wlc_phy_ipa_get_bbmult_nphy(phy_info_t *pi) return m0m1; } -static void wlc_phy_ipa_set_bbmult_nphy(phy_info_t *pi, uint8 m0, uint8 m1) +static void wlc_phy_ipa_set_bbmult_nphy(phy_info_t *pi, u8 m0, u8 m1) { uint16 m0m1 = (uint16) ((m0 << 8) | m1); @@ -26318,10 +26318,10 @@ static uint32 *wlc_phy_get_ipa_gaintbl_nphy(phy_info_t *pi) static void wlc_phy_papd_cal_setup_nphy(phy_info_t *pi, nphy_papd_restore_state *state, - uint8 core) + u8 core) { int32 tone_freq; - uint8 off_core; + u8 off_core; uint16 mixgain = 0; off_core = core ^ 0x1; @@ -26595,7 +26595,7 @@ wlc_phy_papd_cal_setup_nphy(phy_info_t *pi, nphy_papd_restore_state *state, static void wlc_phy_papd_cal_cleanup_nphy(phy_info_t *pi, nphy_papd_restore_state *state) { - uint8 core; + u8 core; wlc_phy_stopplayback_nphy(pi); @@ -26719,7 +26719,7 @@ wlc_phy_papd_cal_cleanup_nphy(phy_info_t *pi, nphy_papd_restore_state *state) } static void -wlc_phy_a1_nphy(phy_info_t *pi, uint8 core, uint32 winsz, uint32 start, +wlc_phy_a1_nphy(phy_info_t *pi, u8 core, uint32 winsz, uint32 start, uint32 end) { uint32 *buf, *src, *dst, sz; @@ -26774,12 +26774,12 @@ wlc_phy_a1_nphy(phy_info_t *pi, uint8 core, uint32 winsz, uint32 start, static void wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *txgains, - phy_cal_mode_t cal_mode, uint8 core) + phy_cal_mode_t cal_mode, u8 core) { uint16 phy_a1, phy_a2, phy_a3; uint16 phy_a4, phy_a5; bool phy_a6; - uint8 phy_a7, m[2]; + u8 phy_a7, m[2]; uint32 phy_a8 = 0; nphy_txgains_t phy_a9; @@ -27073,7 +27073,7 @@ wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *txgains, } } -static uint8 wlc_phy_a3_nphy(phy_info_t *pi, uint8 start_gain, uint8 core) +static u8 wlc_phy_a3_nphy(phy_info_t *pi, u8 start_gain, u8 core) { int phy_a1; int phy_a2; @@ -27086,9 +27086,9 @@ static uint8 wlc_phy_a3_nphy(phy_info_t *pi, uint8 start_gain, uint8 core) int phy_a10; bool phy_a11 = FALSE; int phy_a12; - uint8 phy_a13 = 0; - uint8 phy_a14; - uint8 *phy_a15 = NULL; + u8 phy_a13 = 0; + u8 phy_a14; + u8 *phy_a15 = NULL; phy_a4.useindex = TRUE; phy_a12 = start_gain; @@ -27153,16 +27153,16 @@ static uint8 wlc_phy_a3_nphy(phy_info_t *pi, uint8 start_gain, uint8 core) if (!phy_a6 && (phy_a3 != phy_a5)) { if (!phy_a3) { - phy_a12 -= (uint8) phy_a1; + phy_a12 -= (u8) phy_a1; } phy_a11 = TRUE; break; } if (phy_a3) - phy_a12 += (uint8) phy_a1; + phy_a12 += (u8) phy_a1; else - phy_a12 -= (uint8) phy_a1; + phy_a12 -= (u8) phy_a1; if ((phy_a12 < phy_a14) || (phy_a12 > phy_a13)) { if (phy_a12 < phy_a14) { @@ -27182,7 +27182,7 @@ static uint8 wlc_phy_a3_nphy(phy_info_t *pi, uint8 start_gain, uint8 core) phy_a2 = 10; phy_a1 = 8; for (phy_a10 = 0; phy_a10 < phy_a2; phy_a10++) { - phy_a4.index = (uint8) phy_a12; + phy_a4.index = (u8) phy_a12; wlc_phy_a2_nphy(pi, &phy_a4, CAL_GCTRL, core); wlc_phy_table_read_nphy(pi, @@ -27199,16 +27199,16 @@ static uint8 wlc_phy_a3_nphy(phy_info_t *pi, uint8 start_gain, uint8 core) if (!phy_a6 && (phy_a3 != phy_a5)) { if (!phy_a3) { - phy_a12 -= (uint8) phy_a1; + phy_a12 -= (u8) phy_a1; } phy_a11 = TRUE; break; } if (phy_a3) - phy_a12 += (uint8) phy_a1; + phy_a12 += (u8) phy_a1; else - phy_a12 -= (uint8) phy_a1; + phy_a12 -= (u8) phy_a1; if ((phy_a12 < 0) || (phy_a12 > 127)) { if (phy_a12 < 0) { @@ -27227,9 +27227,9 @@ static uint8 wlc_phy_a3_nphy(phy_info_t *pi, uint8 start_gain, uint8 core) } if (NREV_GE(pi->pubpi.phy_rev, 7)) { - return (uint8) phy_a15[phy_a12]; + return (u8) phy_a15[phy_a12]; } else { - return (uint8) phy_a12; + return (u8) phy_a12; } } @@ -27239,8 +27239,8 @@ static void wlc_phy_a4(phy_info_t *pi, bool full_cal) nphy_ipa_txcalgains_t phy_b1[2]; nphy_papd_restore_state phy_b2; bool phy_b3; - uint8 phy_b4; - uint8 phy_b5; + u8 phy_b4; + u8 phy_b5; int16 phy_b6, phy_b7, phy_b8; uint16 phy_b9; int16 phy_b10, phy_b11, phy_b12; @@ -27534,7 +27534,7 @@ void wlc_phy_txpwr_fixpower_nphy(phy_info_t *pi) uint core; uint32 txgain; uint16 rad_gain, dac_gain, bbmult, m1m2; - uint8 txpi[2], chan_freq_range; + u8 txpi[2], chan_freq_range; int32 rfpwr_offset; ASSERT(pi->nphy_txpwrctrl == PHY_TPC_HW_OFF); @@ -27687,13 +27687,13 @@ void wlc_phy_txpwr_fixpower_nphy(phy_info_t *pi) } static void -wlc_phy_txpwr_nphy_srom_convert(uint8 *srom_max, uint16 *pwr_offset, - uint8 tmp_max_pwr, uint8 rate_start, - uint8 rate_end) +wlc_phy_txpwr_nphy_srom_convert(u8 *srom_max, uint16 *pwr_offset, + u8 tmp_max_pwr, u8 rate_start, + u8 rate_end) { - uint8 rate; - uint8 word_num, nibble_num; - uint8 tmp_nibble; + u8 rate; + u8 word_num, nibble_num; + u8 tmp_nibble; for (rate = rate_start; rate <= rate_end; rate++) { word_num = (rate - rate_start) >> 2; @@ -27705,10 +27705,10 @@ wlc_phy_txpwr_nphy_srom_convert(uint8 *srom_max, uint16 *pwr_offset, } static void -wlc_phy_txpwr_nphy_po_apply(uint8 *srom_max, uint8 pwr_offset, - uint8 rate_start, uint8 rate_end) +wlc_phy_txpwr_nphy_po_apply(u8 *srom_max, u8 pwr_offset, + u8 rate_start, u8 rate_end) { - uint8 rate; + u8 rate; for (rate = rate_start; rate <= rate_end; rate++) { srom_max[rate] -= 2 * pwr_offset; @@ -27716,10 +27716,10 @@ wlc_phy_txpwr_nphy_po_apply(uint8 *srom_max, uint8 pwr_offset, } void -wlc_phy_ofdm_to_mcs_powers_nphy(uint8 *power, uint8 rate_mcs_start, - uint8 rate_mcs_end, uint8 rate_ofdm_start) +wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start, + u8 rate_mcs_end, u8 rate_ofdm_start) { - uint8 rate1, rate2; + u8 rate1, rate2; rate2 = rate_ofdm_start; for (rate1 = rate_mcs_start; rate1 <= rate_mcs_end - 1; rate1++) { @@ -27730,10 +27730,10 @@ wlc_phy_ofdm_to_mcs_powers_nphy(uint8 *power, uint8 rate_mcs_start, } void -wlc_phy_mcs_to_ofdm_powers_nphy(uint8 *power, uint8 rate_ofdm_start, - uint8 rate_ofdm_end, uint8 rate_mcs_start) +wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power, u8 rate_ofdm_start, + u8 rate_ofdm_end, u8 rate_mcs_start) { - uint8 rate1, rate2; + u8 rate1, rate2; for (rate1 = rate_ofdm_start, rate2 = rate_mcs_start; rate1 <= rate_ofdm_end; rate1++, rate2++) { @@ -27746,10 +27746,10 @@ wlc_phy_mcs_to_ofdm_powers_nphy(uint8 *power, uint8 rate_ofdm_start, void BCMNMIATTACHFN(wlc_phy_txpwr_apply_nphy) (phy_info_t *pi) { uint rate1, rate2, band_num; - uint8 tmp_bw40po = 0, tmp_cddpo = 0, tmp_stbcpo = 0; - uint8 tmp_max_pwr = 0; + u8 tmp_bw40po = 0, tmp_cddpo = 0, tmp_stbcpo = 0; + u8 tmp_max_pwr = 0; uint16 pwr_offsets1[2], *pwr_offsets2 = NULL; - uint8 *tx_srom_max_rate = NULL; + u8 *tx_srom_max_rate = NULL; for (band_num = 0; band_num < (CH_2G_GROUP + CH_5G_GROUP); band_num++) { switch (band_num) { @@ -27980,9 +27980,9 @@ static void BCMATTACHFN(wlc_phy_txpwr_srom_read_ppr_nphy) (phy_info_t *pi) case 0: pi->nphy_txpid2g[PHY_CORE_0] = - (uint8) PHY_GETINTVAR(pi, "txpid2ga0"); + (u8) PHY_GETINTVAR(pi, "txpid2ga0"); pi->nphy_txpid2g[PHY_CORE_1] = - (uint8) PHY_GETINTVAR(pi, "txpid2ga1"); + (u8) PHY_GETINTVAR(pi, "txpid2ga1"); pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_2g = (int8) PHY_GETINTVAR(pi, "maxp2ga0"); pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_2g = @@ -28020,9 +28020,9 @@ static void BCMATTACHFN(wlc_phy_txpwr_srom_read_ppr_nphy) (phy_info_t *pi) case 1: pi->nphy_txpid5g[PHY_CORE_0] = - (uint8) PHY_GETINTVAR(pi, "txpid5ga0"); + (u8) PHY_GETINTVAR(pi, "txpid5ga0"); pi->nphy_txpid5g[PHY_CORE_1] = - (uint8) PHY_GETINTVAR(pi, "txpid5ga1"); + (u8) PHY_GETINTVAR(pi, "txpid5ga1"); pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_5gm = (int8) PHY_GETINTVAR(pi, "maxp5ga0"); pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_5gm = @@ -28058,9 +28058,9 @@ static void BCMATTACHFN(wlc_phy_txpwr_srom_read_ppr_nphy) (phy_info_t *pi) case 2: pi->nphy_txpid5gl[0] = - (uint8) PHY_GETINTVAR(pi, "txpid5gla0"); + (u8) PHY_GETINTVAR(pi, "txpid5gla0"); pi->nphy_txpid5gl[1] = - (uint8) PHY_GETINTVAR(pi, "txpid5gla1"); + (u8) PHY_GETINTVAR(pi, "txpid5gla1"); pi->nphy_pwrctrl_info[0].max_pwr_5gl = (int8) PHY_GETINTVAR(pi, "maxp5gla0"); pi->nphy_pwrctrl_info[1].max_pwr_5gl = @@ -28102,9 +28102,9 @@ static void BCMATTACHFN(wlc_phy_txpwr_srom_read_ppr_nphy) (phy_info_t *pi) case 3: pi->nphy_txpid5gh[0] = - (uint8) PHY_GETINTVAR(pi, "txpid5gha0"); + (u8) PHY_GETINTVAR(pi, "txpid5gha0"); pi->nphy_txpid5gh[1] = - (uint8) PHY_GETINTVAR(pi, "txpid5gha1"); + (u8) PHY_GETINTVAR(pi, "txpid5gha1"); pi->nphy_pwrctrl_info[0].max_pwr_5gh = (int8) PHY_GETINTVAR(pi, "maxp5gha0"); pi->nphy_pwrctrl_info[1].max_pwr_5gh = @@ -28152,28 +28152,28 @@ static void BCMATTACHFN(wlc_phy_txpwr_srom_read_ppr_nphy) (phy_info_t *pi) static bool BCMATTACHFN(wlc_phy_txpwr_srom_read_nphy) (phy_info_t *pi) { - pi->antswitch = (uint8) PHY_GETINTVAR(pi, "antswitch"); - pi->aa2g = (uint8) PHY_GETINTVAR(pi, "aa2g"); - pi->aa5g = (uint8) PHY_GETINTVAR(pi, "aa5g"); + pi->antswitch = (u8) PHY_GETINTVAR(pi, "antswitch"); + pi->aa2g = (u8) PHY_GETINTVAR(pi, "aa2g"); + pi->aa5g = (u8) PHY_GETINTVAR(pi, "aa5g"); - pi->srom_fem2g.tssipos = (uint8) PHY_GETINTVAR(pi, "tssipos2g"); - pi->srom_fem2g.extpagain = (uint8) PHY_GETINTVAR(pi, "extpagain2g"); - pi->srom_fem2g.pdetrange = (uint8) PHY_GETINTVAR(pi, "pdetrange2g"); - pi->srom_fem2g.triso = (uint8) PHY_GETINTVAR(pi, "triso2g"); - pi->srom_fem2g.antswctrllut = (uint8) PHY_GETINTVAR(pi, "antswctl2g"); + pi->srom_fem2g.tssipos = (u8) PHY_GETINTVAR(pi, "tssipos2g"); + pi->srom_fem2g.extpagain = (u8) PHY_GETINTVAR(pi, "extpagain2g"); + pi->srom_fem2g.pdetrange = (u8) PHY_GETINTVAR(pi, "pdetrange2g"); + pi->srom_fem2g.triso = (u8) PHY_GETINTVAR(pi, "triso2g"); + pi->srom_fem2g.antswctrllut = (u8) PHY_GETINTVAR(pi, "antswctl2g"); - pi->srom_fem5g.tssipos = (uint8) PHY_GETINTVAR(pi, "tssipos5g"); - pi->srom_fem5g.extpagain = (uint8) PHY_GETINTVAR(pi, "extpagain5g"); - pi->srom_fem5g.pdetrange = (uint8) PHY_GETINTVAR(pi, "pdetrange5g"); - pi->srom_fem5g.triso = (uint8) PHY_GETINTVAR(pi, "triso5g"); + pi->srom_fem5g.tssipos = (u8) PHY_GETINTVAR(pi, "tssipos5g"); + pi->srom_fem5g.extpagain = (u8) PHY_GETINTVAR(pi, "extpagain5g"); + pi->srom_fem5g.pdetrange = (u8) PHY_GETINTVAR(pi, "pdetrange5g"); + pi->srom_fem5g.triso = (u8) PHY_GETINTVAR(pi, "triso5g"); if (PHY_GETVAR(pi, "antswctl5g")) { pi->srom_fem5g.antswctrllut = - (uint8) PHY_GETINTVAR(pi, "antswctl5g"); + (u8) PHY_GETINTVAR(pi, "antswctl5g"); } else { pi->srom_fem5g.antswctrllut = - (uint8) PHY_GETINTVAR(pi, "antswctl2g"); + (u8) PHY_GETINTVAR(pi, "antswctl2g"); } wlc_phy_txpower_ipa_upd(pi); @@ -28199,7 +28199,7 @@ static bool BCMATTACHFN(wlc_phy_txpwr_srom_read_nphy) (phy_info_t *pi) pi->phy_txcore_enable_temp = pi->phy_txcore_disable_temp - PHY_HYSTERESIS_DELTATEMP; - pi->phycal_tempdelta = (uint8) PHY_GETINTVAR(pi, "phycal_tempdelta"); + pi->phycal_tempdelta = (u8) PHY_GETINTVAR(pi, "phycal_tempdelta"); if (pi->phycal_tempdelta > NPHY_CAL_MAXTEMPDELTA) { pi->phycal_tempdelta = 0; } @@ -28211,7 +28211,7 @@ static bool BCMATTACHFN(wlc_phy_txpwr_srom_read_nphy) (phy_info_t *pi) void wlc_phy_txpower_recalc_target_nphy(phy_info_t *pi) { - uint8 tx_pwr_ctrl_state; + u8 tx_pwr_ctrl_state; wlc_phy_txpwr_limit_to_tbl_nphy(pi); wlc_phy_txpwrctrl_pwr_setup_nphy(pi); @@ -28302,7 +28302,7 @@ static void wlc_phy_txpwrctrl_coeff_setup_nphy(phy_info_t *pi) static void wlc_phy_ipa_internal_tssi_setup_nphy(phy_info_t *pi) { - uint8 core; + u8 core; if (NREV_GE(pi->pubpi.phy_rev, 7)) { for (core = 0; core < pi->pubpi.phy_corenum; core++) { @@ -28437,7 +28437,7 @@ static void wlc_phy_txpwrctrl_idle_tssi_nphy(phy_info_t *pi) OSL_DELAY(20); int_val = - wlc_phy_poll_rssi_nphy(pi, (uint8) NPHY_RSSI_SEL_TSSI_2G, rssi_buf, + wlc_phy_poll_rssi_nphy(pi, (u8) NPHY_RSSI_SEL_TSSI_2G, rssi_buf, 1); wlc_phy_stopplayback_nphy(pi); wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_OFF, 0); @@ -28453,25 +28453,25 @@ static void wlc_phy_txpwrctrl_idle_tssi_nphy(phy_info_t *pi) if (NREV_GE(pi->pubpi.phy_rev, 3)) { pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = - (uint8) ((int_val >> 24) & 0xff); + (u8) ((int_val >> 24) & 0xff); pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = - (uint8) ((int_val >> 24) & 0xff); + (u8) ((int_val >> 24) & 0xff); pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = - (uint8) ((int_val >> 8) & 0xff); + (u8) ((int_val >> 8) & 0xff); pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = - (uint8) ((int_val >> 8) & 0xff); + (u8) ((int_val >> 8) & 0xff); } else { pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = - (uint8) ((int_val >> 24) & 0xff); + (u8) ((int_val >> 24) & 0xff); pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = - (uint8) ((int_val >> 8) & 0xff); + (u8) ((int_val >> 8) & 0xff); pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = - (uint8) ((int_val >> 16) & 0xff); + (u8) ((int_val >> 16) & 0xff); pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = - (uint8) ((int_val) & 0xff); + (u8) ((int_val) & 0xff); } } @@ -28482,11 +28482,11 @@ static void wlc_phy_txpwrctrl_pwr_setup_nphy(phy_info_t *pi) int16 a1[2], b0[2], b1[2]; int8 target_pwr_qtrdbm[2]; int32 num, den, pwr_est; - uint8 chan_freq_range; - uint8 idle_tssi[2]; + u8 chan_freq_range; + u8 idle_tssi[2]; uint32 tbl_id, tbl_len, tbl_offset; uint32 regval[64]; - uint8 core; + u8 core; if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); @@ -28719,17 +28719,17 @@ static bool wlc_phy_txpwr_ison_nphy(phy_info_t *pi) (0x1 << 14) | (0x1 << 13)); } -static uint8 wlc_phy_txpwr_idx_cur_get_nphy(phy_info_t *pi, uint8 core) +static u8 wlc_phy_txpwr_idx_cur_get_nphy(phy_info_t *pi, u8 core) { uint16 tmp; tmp = read_phy_reg(pi, ((core == PHY_CORE_0) ? 0x1ed : 0x1ee)); tmp = (tmp & (0x7f << 8)) >> 8; - return (uint8) tmp; + return (u8) tmp; } static void -wlc_phy_txpwr_idx_cur_set_nphy(phy_info_t *pi, uint8 idx0, uint8 idx1) +wlc_phy_txpwr_idx_cur_set_nphy(phy_info_t *pi, u8 idx0, u8 idx1) { mod_phy_reg(pi, 0x1e7, (0x7f << 0), idx0); @@ -28775,10 +28775,10 @@ void wlc_phy_txpwr_papd_cal_nphy(phy_info_t *pi) } } -void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, uint8 ctrl_type) +void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, u8 ctrl_type) { uint16 mask = 0, val = 0, ishw = 0; - uint8 ctr; + u8 ctr; uint core; uint32 tbl_offset; uint32 tbl_len; @@ -28804,7 +28804,7 @@ void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, uint8 ctrl_type) core++) pi->nphy_txpwr_idx[core] = wlc_phy_txpwr_idx_cur_get_nphy(pi, - (uint8) + (u8) core); } @@ -28921,20 +28921,20 @@ void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, uint8 ctrl_type) } void -wlc_phy_txpwr_index_nphy(phy_info_t *pi, uint8 core_mask, int8 txpwrindex, +wlc_phy_txpwr_index_nphy(phy_info_t *pi, u8 core_mask, int8 txpwrindex, bool restore_cals) { - uint8 core, txpwrctl_tbl; + u8 core, txpwrctl_tbl; uint16 tx_ind0, iq_ind0, lo_ind0; uint16 m1m2; uint32 txgain; uint16 rad_gain, dac_gain; - uint8 bbmult; + u8 bbmult; uint32 iqcomp; uint16 iqcomp_a, iqcomp_b; uint32 locomp; uint16 tmpval; - uint8 tx_pwr_ctrl_state; + u8 tx_pwr_ctrl_state; int32 rfpwr_offset; uint16 regval[2]; @@ -29047,7 +29047,7 @@ wlc_phy_txpwr_index_nphy(phy_info_t *pi, uint8 core_mask, int8 txpwrindex, tmpval >>= ((core == PHY_CORE_0) ? 8 : 0); tmpval &= 0xff; pi->nphy_txpwrindex[core].bbmult = - (uint8) tmpval; + (u8) tmpval; wlc_phy_table_read_nphy(pi, 15, 2, (80 + 2 * core), 16, @@ -29160,10 +29160,10 @@ wlc_phy_txpwr_index_nphy(phy_info_t *pi, uint8 core_mask, int8 txpwrindex, } void -wlc_phy_txpower_sromlimit_get_nphy(phy_info_t *pi, uint chan, uint8 *max_pwr, - uint8 txp_rate_idx) +wlc_phy_txpower_sromlimit_get_nphy(phy_info_t *pi, uint chan, u8 *max_pwr, + u8 txp_rate_idx) { - uint8 chan_freq_range; + u8 chan_freq_range; chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, chan); switch (chan_freq_range) { diff --git a/drivers/staging/brcm80211/phy/wlc_phytbl_lcn.c b/drivers/staging/brcm80211/phy/wlc_phytbl_lcn.c index adfb97b..1c79400 100644 --- a/drivers/staging/brcm80211/phy/wlc_phytbl_lcn.c +++ b/drivers/staging/brcm80211/phy/wlc_phytbl_lcn.c @@ -450,7 +450,7 @@ CONST uint16 dot11lcn_aux_gain_idx_tbl_2G[] = { 0x0000 }; -CONST uint8 dot11lcn_gain_val_tbl_2G[] = { +CONST u8 dot11lcn_gain_val_tbl_2G[] = { 0xfc, 0x02, 0x08, @@ -915,7 +915,7 @@ CONST uint16 dot11lcn_aux_gain_idx_tbl_extlna_2G[] = { 0x0000 }; -CONST uint8 dot11lcn_gain_val_tbl_extlna_2G[] = { +CONST u8 dot11lcn_gain_val_tbl_extlna_2G[] = { 0xfc, 0x02, 0x08, @@ -2131,7 +2131,7 @@ CONST uint16 dot11lcn_sw_ctrl_tbl_rev0[] = { 0x0002, }; -CONST uint8 dot11lcn_nf_table_rev0[] = { +CONST u8 dot11lcn_nf_table_rev0[] = { 0x5f, 0x36, 0x29, @@ -2150,7 +2150,7 @@ CONST uint8 dot11lcn_nf_table_rev0[] = { 0x1f, }; -CONST uint8 dot11lcn_gain_val_tbl_rev0[] = { +CONST u8 dot11lcn_gain_val_tbl_rev0[] = { 0x09, 0x0f, 0x14, @@ -2213,7 +2213,7 @@ CONST uint8 dot11lcn_gain_val_tbl_rev0[] = { 0x00, }; -CONST uint8 dot11lcn_spur_tbl_rev0[] = { +CONST u8 dot11lcn_spur_tbl_rev0[] = { 0x01, 0x01, 0x01, diff --git a/drivers/staging/brcm80211/phy/wlc_phytbl_n.c b/drivers/staging/brcm80211/phy/wlc_phytbl_n.c index e5f2e02..4fc20ec 100644 --- a/drivers/staging/brcm80211/phy/wlc_phytbl_n.c +++ b/drivers/staging/brcm80211/phy/wlc_phytbl_n.c @@ -854,7 +854,7 @@ CONST uint32 frame_struct_rev0[] = { 0x00000000, }; -CONST uint8 frame_lut_rev0[] = { +CONST u8 frame_lut_rev0[] = { 0x02, 0x04, 0x14, @@ -2607,7 +2607,7 @@ CONST uint32 chanest_tbl_rev0[] = { 0x10101010, }; -CONST uint8 mcs_tbl_rev0[] = { +CONST u8 mcs_tbl_rev0[] = { 0x00, 0x08, 0x0a, @@ -3256,7 +3256,7 @@ CONST uint32 noise_var_tbl1_rev0[] = { 0x0000014d, }; -CONST uint8 est_pwr_lut_core0_rev0[] = { +CONST u8 est_pwr_lut_core0_rev0[] = { 0x50, 0x4f, 0x4e, @@ -3323,7 +3323,7 @@ CONST uint8 est_pwr_lut_core0_rev0[] = { 0x11, }; -CONST uint8 est_pwr_lut_core1_rev0[] = { +CONST u8 est_pwr_lut_core1_rev0[] = { 0x50, 0x4f, 0x4e, @@ -3390,7 +3390,7 @@ CONST uint8 est_pwr_lut_core1_rev0[] = { 0x11, }; -CONST uint8 adj_pwr_lut_core0_rev0[] = { +CONST u8 adj_pwr_lut_core0_rev0[] = { 0x00, 0x00, 0x00, @@ -3521,7 +3521,7 @@ CONST uint8 adj_pwr_lut_core0_rev0[] = { 0x00, }; -CONST uint8 adj_pwr_lut_core1_rev0[] = { +CONST u8 adj_pwr_lut_core1_rev0[] = { 0x00, 0x00, 0x00, @@ -7616,7 +7616,7 @@ CONST uint32 chanest_tbl_rev3[] = { 0x10101010, }; -CONST uint8 frame_lut_rev3[] = { +CONST u8 frame_lut_rev3[] = { 0x02, 0x04, 0x14, @@ -7651,7 +7651,7 @@ CONST uint8 frame_lut_rev3[] = { 0x2a, }; -CONST uint8 est_pwr_lut_core0_rev3[] = { +CONST u8 est_pwr_lut_core0_rev3[] = { 0x55, 0x54, 0x54, @@ -7718,7 +7718,7 @@ CONST uint8 est_pwr_lut_core0_rev3[] = { 0xfd, }; -CONST uint8 est_pwr_lut_core1_rev3[] = { +CONST u8 est_pwr_lut_core1_rev3[] = { 0x55, 0x54, 0x54, @@ -7785,7 +7785,7 @@ CONST uint8 est_pwr_lut_core1_rev3[] = { 0xfd, }; -CONST uint8 adj_pwr_lut_core0_rev3[] = { +CONST u8 adj_pwr_lut_core0_rev3[] = { 0x00, 0x00, 0x00, @@ -7916,7 +7916,7 @@ CONST uint8 adj_pwr_lut_core0_rev3[] = { 0x00, }; -CONST uint8 adj_pwr_lut_core1_rev3[] = { +CONST u8 adj_pwr_lut_core1_rev3[] = { 0x00, 0x00, 0x00, -- 2.7.4