From e7c4e1dbd06f3eefc93731aeb18d4b522199eb54 Mon Sep 17 00:00:00 2001 From: Jackie Li Date: Sat, 31 Mar 2012 19:19:36 +0800 Subject: [PATCH] hwc: update swapchain to save/restore plane position & size BZ: 28857 Kernel patch for sprite + overlay blending support. This patch sets primary plane pixel format to BRGA8888 to support premultipled alpha blending between sprite & overlay planes. Change-Id: I9d7252e5bf45c95015eff73dbde04df8212f7e61 Signed-off-by: Jackie Li Reviewed-on: http://android.intel.com:8080/41994 Reviewed-by: Hu, Austin Reviewed-by: Xu, Randy Tested-by: Tong, BoX Reviewed-by: buildbot Tested-by: buildbot --- .../3rdparty/linux_framebuffer_drm/drmlfb.h | 6 ++++ .../linux_framebuffer_drm/drmlfb_displayclass.c | 25 +++++++++++--- .../3rdparty/linux_framebuffer_drm/drmlfb_linux.c | 39 +++++++++++++++++++--- 3 files changed, 62 insertions(+), 8 deletions(-) diff --git a/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb.h b/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb.h index c3b5a4f..f6615dc 100755 --- a/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb.h +++ b/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb.h @@ -220,10 +220,16 @@ typedef struct MRSTLFB_DEVINFO_TAG MRST_BOOL bLastFlipAddrValid; uint32_t uPlaneACntr; + uint32_t uPlaneAPos; + uint32_t uPlaneASize; uint32_t uPlaneAStride; uint32_t uPlaneBCntr; + uint32_t uPlaneBPos; + uint32_t uPlaneBSize; uint32_t uPlaneBStride; uint32_t uPlaneCCntr; + uint32_t uPlaneCPos; + uint32_t uPlaneCSize; uint32_t uPlaneCStride; MRST_BOOL bScreenState; } MRSTLFB_DEVINFO; diff --git a/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb_displayclass.c b/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb_displayclass.c index 089e120..aadda27 100755 --- a/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb_displayclass.c +++ b/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb_displayclass.c @@ -89,7 +89,24 @@ static void MRSTLFBFlip(MRSTLFB_DEVINFO *psDevInfo, MRSTLFB_BUFFER *psBuffer) static void MRSTLFBFlipOverlay(MRSTLFB_DEVINFO *psDevInfo, struct intel_overlay_context *psContext) { + struct drm_device *dev; + struct drm_psb_private *dev_priv; + u32 ovadd_reg = OV_OVADD; + + dev = psDevInfo->psDrmDevice; + dev_priv = + (struct drm_psb_private *)psDevInfo->psDrmDevice->dev_private; + + DRM_INFO("%s: flip 0x%x, index %d, pipe 0x%x\n", __func__, + psContext->ovadd, psContext->index, psContext->pipe); + + if (psContext->index == 1) + ovadd_reg = OVC_OVADD; + psContext->ovadd |= psContext->pipe; + psContext->ovadd |= 1; + + PSB_WVDC32(psContext->ovadd, ovadd_reg); } static void MRSTLFBFlipSprite(MRSTLFB_DEVINFO *psDevInfo, @@ -152,7 +169,7 @@ static void MRSTLFBFlipContexts(MRSTLFB_DEVINFO *psDevInfo, /*flip all active overlay planes*/ for (i = 0; i < INTEL_OVERLAY_PLANE_NUM; i++) { - if (psContexts->active_overlays & (i << i)) { + if (psContexts->active_overlays & (1 << i)) { psOverlayContext = &psContexts->overlay_contexts[i]; MRSTLFBFlipOverlay(psDevInfo, psOverlayContext); } @@ -1797,14 +1814,14 @@ MRST_ERROR MRSTLFBInit(struct drm_device * dev) psDevInfo->psDrmDevice = dev; psDevInfo->ulRefCount = 0; - /*save default plane config*/ - MRSTLFBSavePlaneConfig(psDevInfo); - if(InitDev(psDevInfo) != MRST_OK) { return (MRST_ERROR_INIT_FAILURE); } + /*save default plane config*/ + MRSTLFBSavePlaneConfig(psDevInfo); + if(MRSTLFBGetLibFuncAddr ("PVRGetDisplayClassJTable", &pfnGetPVRJTable) != MRST_OK) { return (MRST_ERROR_INIT_FAILURE); diff --git a/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb_linux.c b/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb_linux.c index 052b1ea..609c12a 100755 --- a/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb_linux.c +++ b/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb_linux.c @@ -192,11 +192,26 @@ void MRSTLFBSavePlaneConfig(MRSTLFB_DEVINFO *psDevInfo) { struct drm_psb_private *dev_priv = (struct drm_psb_private *) psDevInfo->psDrmDevice->dev_private; + u32 uPlaneFormat = 0; + + /*update format based on active display pixel format*/ + switch (psDevInfo->sDisplayFormat.pixelformat) { + case PVRSRV_PIXEL_FORMAT_RGB565: + uPlaneFormat = DISPPLANE_16BPP; + break; + case PVRSRV_PIXEL_FORMAT_ARGB8888: + default: + uPlaneFormat = DISPPLANE_32BPP; + break; + } + if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, false)) return; - psDevInfo->uPlaneACntr = PSB_RVDC32(DSPACNTR); + psDevInfo->uPlaneACntr = uPlaneFormat; psDevInfo->uPlaneAStride = PSB_RVDC32(DSPASTRIDE); + psDevInfo->uPlaneAPos = PSB_RVDC32(DSPAPOS); + psDevInfo->uPlaneASize = PSB_RVDC32(DSPASIZE); #ifdef CONFIG_MDFD_HDMI /*TODO: fully support HDMI later*/ /*psDevInfo->uPlaneBCntr = PSB_RVDC32(DSPBCNTR);*/ @@ -204,20 +219,30 @@ void MRSTLFBSavePlaneConfig(MRSTLFB_DEVINFO *psDevInfo) #endif #ifdef CONFIG_MDFD_DUAL_MIPI - psDevInfo->uPlaneCCntr = PSB_RVDC32(DSPCCNTR); + psDevInfo->uPlaneCCntr = uPlaneFormat; psDevInfo->uPlaneCStride = PSB_RVDC32(DSPCSTRIDE); + psDevInfo->uPlaneCPos = PSB_RVDC32(DSPCPOS); + psDevInfo->uPlaneCSize = PSB_RVDC32(DSPCSIZE); #endif ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND); + } void MRSTLFBRestorePlaneConfig(MRSTLFB_DEVINFO *psDevInfo) { struct drm_psb_private *dev_priv = (struct drm_psb_private *) psDevInfo->psDrmDevice->dev_private; + u32 uDspCntr = 0; + if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, false)) return; - PSB_WVDC32(psDevInfo->uPlaneACntr, DSPACNTR); + uDspCntr = PSB_RVDC32(DSPACNTR); + uDspCntr &= ~(0xf << 26); + uDspCntr |= psDevInfo->uPlaneACntr; + PSB_WVDC32(uDspCntr, DSPACNTR); PSB_WVDC32(psDevInfo->uPlaneAStride, DSPASTRIDE); + PSB_WVDC32(psDevInfo->uPlaneAPos, DSPAPOS); + PSB_WVDC32(psDevInfo->uPlaneASize, DSPASIZE); #ifdef CONFIG_MDFD_HDMI /*TODO: fully support HDMI later*/ /*PSB_WVDC32(psDevInfo->uPlaneBCntr, DSPBCNTR);*/ @@ -225,8 +250,14 @@ void MRSTLFBRestorePlaneConfig(MRSTLFB_DEVINFO *psDevInfo) #endif #ifdef CONFIG_MDFD_DUAL_MIPI + uDspCntr = PSB_RVDC32(DSPCCNTR); + uDspCntr &= ~(0xf << 26); + uDspCntr |= psDevInfo->uPlaneCCntr; + PSB_WVDC32(uDspCntr, DSPCCNTR); PSB_WVDC32(psDevInfo->uPlaneCCntr, DSPCCNTR); - PSB_RVDC32(psDevInfo->uPlaneCStride, DSPCSTRIDE); + PSB_WVDC32(psDevInfo->uPlaneCStride, DSPCSTRIDE); + PSB_WVDC32(psDevInfo->uPlaneCPos, DSPCPOS); + PSB_WVDC32(psDevInfo->uPlaneCSize, DSPCSIZE); #endif ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND); } -- 2.7.4