From e7c2e4d368e2efc8789b65d141fb633ebb163a70 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Thu, 9 Nov 2017 11:28:31 +0100 Subject: [PATCH] drm/bridge/sii8620: filter unsupported modes The maximum pixel clock depends on the version of the connected MHL adapter. Add mode_valid callback to filter out modes with too high pixel clock to avoid failure in mode_fixup later. Signed-off-by: Marek Szyprowski Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20171109102831.19844-1-m.szyprowski@samsung.com --- drivers/gpu/drm/bridge/sil-sii8620.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c index b7eb704..268d66d 100644 --- a/drivers/gpu/drm/bridge/sil-sii8620.c +++ b/drivers/gpu/drm/bridge/sil-sii8620.c @@ -2191,6 +2191,19 @@ static void sii8620_detach(struct drm_bridge *bridge) rc_unregister_device(ctx->rc_dev); } +static enum drm_mode_status sii8620_mode_valid(struct drm_bridge *bridge, + const struct drm_display_mode *mode) +{ + struct sii8620 *ctx = bridge_to_sii8620(bridge); + bool can_pack = ctx->devcap[MHL_DCAP_VID_LINK_MODE] & + MHL_DCAP_VID_LINK_PPIXEL; + unsigned int max_pclk = sii8620_is_mhl3(ctx) ? MHL3_MAX_LCLK : + MHL1_MAX_LCLK; + max_pclk /= can_pack ? 2 : 3; + + return (mode->clock > max_pclk) ? MODE_CLOCK_HIGH : MODE_OK; +} + static bool sii8620_mode_fixup(struct drm_bridge *bridge, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) @@ -2238,6 +2251,7 @@ static const struct drm_bridge_funcs sii8620_bridge_funcs = { .attach = sii8620_attach, .detach = sii8620_detach, .mode_fixup = sii8620_mode_fixup, + .mode_valid = sii8620_mode_valid, }; static int sii8620_probe(struct i2c_client *client, -- 2.7.4