From e7742f914e25912a232e1f582af6c833eaeff986 Mon Sep 17 00:00:00 2001 From: Christophe Lebouc Date: Wed, 16 May 2012 15:29:05 +0200 Subject: [PATCH] Upgrade board_ids management BZ: 35949 Upgrade board_ids management Change-Id: Iab11035e9fa148d7f36be46f5dd43e4dc04c08e4 Signed-off-by: Christophe Lebouc Reviewed-on: http://android.intel.com:8080/49010 Reviewed-by: Rimauro, Gilles Reviewed-by: buildbot Tested-by: buildbot --- arch/x86/include/asm/intel-mid.h | 31 +++++++++++++++++++++------- arch/x86/platform/intel-mid/board-redridge.c | 20 +++++++----------- 2 files changed, 31 insertions(+), 20 deletions(-) diff --git a/arch/x86/include/asm/intel-mid.h b/arch/x86/include/asm/intel-mid.h index 4e18416..c1288d9 100644 --- a/arch/x86/include/asm/intel-mid.h +++ b/arch/x86/include/asm/intel-mid.h @@ -118,19 +118,33 @@ enum { extern int mfld_board_type(void); /* - MSIC Pin, Pin#, ID, CDK Aava BKB BKB BKB BKB BKB - -------- ----- --- (Fab-B) FF-Proto Pr2Proto Pr2Volume PR2PnP PR3 PR3PnP - GPIO0LV0 L13 BID_0 0 0 1 1 0 1 0 - GPIO0LV1 H12 BID_1 1 1 0 0 0 0 0 - GPIO0LV2 K13 BID_2 0 1 1 1 0 1 0 - GPIO0LV3 J11 BID_3 0 0 0 0 1 0 1 - GPIO0LV4 K14 FAB_ID0 1 x 1 0 0 1 1 - GPIO0LV5 J15 FAB_ID1 0 0 0 1 0 1 0 + MSIC Pin, Pin#, ID, CDK BKB BKB BKB BKB BKB + -------- ----- --- (Fab-B) Pr2Proto Pr2Volume PR2PnP PR3 PR3PnP + GPIO0LV0 L13 BID_0 0 1 1 0 1 0 + GPIO0LV1 H12 BID_1 1 0 0 0 0 0 + GPIO0LV2 K13 BID_2 0 1 1 0 1 0 + GPIO0LV3 J11 BID_3 0 0 0 1 0 1 + GPIO0LV4 K14 FAB_ID0 1 1 0 0 1 1 + GPIO0LV5 J15 FAB_ID1 0 0 1 0 1 0 + + + MSIC Pin, Pin#, ID, Aava RR RR RR Joki + -------- ----- --- FF-Proto DV10 DV20 DV21 EV20 + GPIO0LV0 L13 BID_0 0 1 1 1 0 + GPIO0LV1 H12 BID_1 1 0 0 0 1 + GPIO0LV2 K13 BID_2 1 1 1 1 1 + GPIO0LV3 J11 BID_3 0 0 0 0 0 + GPIO0LV4 K14 FAB_ID0 x 0 1 0 1 + GPIO0LV5 J15 FAB_ID1 0 1 0 0 0 + + */ + enum { MFLD_BID_UNKNOWN = 0, MFLD_BID_CDK = 0x12, MFLD_BID_AAVA = 0x06, + MFLD_BID_JOKI_EV20 = 0x16, MFLD_BID_PR2_PROTO = 0x15, MFLD_BID_PR2_PNP = 0x08, MFLD_BID_PR2_VOLUME = 0x25, @@ -138,6 +152,7 @@ enum { MFLD_BID_PR3_PNP = 0x18, MFLD_BID_RR_DV10 = 0x25, MFLD_BID_RR_DV20 = 0x15, + MFLD_BID_RR_DV21 = 0x05, MFLD_BID_LEX = 0xe0000025, CLVT_BID_VV = 0x08, CLVT_BID_PR0 = 0x04 diff --git a/arch/x86/platform/intel-mid/board-redridge.c b/arch/x86/platform/intel-mid/board-redridge.c index 82db76e..1ded398 100644 --- a/arch/x86/platform/intel-mid/board-redridge.c +++ b/arch/x86/platform/intel-mid/board-redridge.c @@ -157,18 +157,14 @@ static int board_id_proc_show(struct seq_file *m, void *v) char *bid; switch (board_id) { - case MFLD_BID_CDK: - bid = "cdk"; break; - case MFLD_BID_AAVA: - bid = "aava"; break; - case MFLD_BID_PR2_PROTO: - case MFLD_BID_PR2_PNP: - bid = "pr2_proto"; break; - case MFLD_BID_PR2_VOLUME: - bid = "pr2_volume"; break; - case MFLD_BID_PR3: - case MFLD_BID_PR3_PNP: - bid = "pr3"; break; + case MFLD_BID_JOKI_EV20: + bid = "joki_ev20"; break; + case MFLD_BID_RR_DV10: + bid = "redridge_dv10"; break; + case MFLD_BID_RR_DV20: + bid = "redridge_dv20"; break; + case MFLD_BID_RR_DV21: + bid = "redridge_dv21"; break; default: bid = "unknown"; break; } -- 2.7.4