From e76c95fb40b1081438ca65be8731108fa0272a95 Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Mon, 23 Jan 2023 15:48:15 -0500 Subject: [PATCH] [InstCombine] add tests for signbit compares; NFC --- llvm/lib/Support/NativeFormatting.cpp | 6 +- llvm/test/Transforms/InstCombine/icmp-shr.ll | 128 +++++++++++++++++++++++++++ 2 files changed, 131 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Support/NativeFormatting.cpp b/llvm/lib/Support/NativeFormatting.cpp index 6e8137c..99e705ed 100644 --- a/llvm/lib/Support/NativeFormatting.cpp +++ b/llvm/lib/Support/NativeFormatting.cpp @@ -169,11 +169,11 @@ void llvm::write_double(raw_ostream &S, double N, FloatStyle Style, std::optional Precision) { size_t Prec = Precision.value_or(getDefaultPrecision(Style)); - if (std::isnan(N)) { + if (isnan(N)) { S << "nan"; return; - } else if (std::isinf(N)) { - S << (std::signbit(N) ? "-INF" : "INF"); + } else if (isinf(N)) { + S << (signbit(N) ? "-INF" : "INF"); return; } diff --git a/llvm/test/Transforms/InstCombine/icmp-shr.ll b/llvm/test/Transforms/InstCombine/icmp-shr.ll index cceef2e..340568b 100644 --- a/llvm/test/Transforms/InstCombine/icmp-shr.ll +++ b/llvm/test/Transforms/InstCombine/icmp-shr.ll @@ -1299,3 +1299,131 @@ define i1 @lshr_neg_sgt_zero(i8 %x) { %r = icmp sgt i8 %s, 0 ret i1 %r } + +define i1 @exactly_one_set_signbit(i8 %x, i8 %y) { +; CHECK-LABEL: @exactly_one_set_signbit( +; CHECK-NEXT: [[XSIGN:%.*]] = lshr i8 [[X:%.*]], 7 +; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1 +; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i8 +; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[XSIGN]], [[YPOSZ]] +; CHECK-NEXT: ret i1 [[R]] +; + %xsign = lshr i8 %x, 7 + %ypos = icmp sgt i8 %y, -1 + %yposz = zext i1 %ypos to i8 + %r = icmp eq i8 %xsign, %yposz + ret i1 %r +} + +define i1 @exactly_one_set_signbit_use1(i8 %x, i8 %y) { +; CHECK-LABEL: @exactly_one_set_signbit_use1( +; CHECK-NEXT: [[XSIGN:%.*]] = lshr i8 [[X:%.*]], 7 +; CHECK-NEXT: call void @use(i8 [[XSIGN]]) +; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1 +; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i8 +; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[XSIGN]], [[YPOSZ]] +; CHECK-NEXT: ret i1 [[R]] +; + %xsign = lshr i8 %x, 7 + call void @use(i8 %xsign) + %ypos = icmp sgt i8 %y, -1 + %yposz = zext i1 %ypos to i8 + %r = icmp eq i8 %xsign, %yposz + ret i1 %r +} + +define <2 x i1> @same_signbit(<2 x i8> %x, <2 x i8> %y) { +; CHECK-LABEL: @same_signbit( +; CHECK-NEXT: [[XSIGN:%.*]] = lshr <2 x i8> [[X:%.*]], +; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt <2 x i8> [[Y:%.*]], +; CHECK-NEXT: [[YPOSZ:%.*]] = zext <2 x i1> [[YPOS]] to <2 x i8> +; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[XSIGN]], [[YPOSZ]] +; CHECK-NEXT: ret <2 x i1> [[R]] +; + %xsign = lshr <2 x i8> %x, + %ypos = icmp sgt <2 x i8> %y, + %yposz = zext <2 x i1> %ypos to <2 x i8> + %r = icmp eq <2 x i8> %xsign, %yposz + ret <2 x i1> %r +} + +define i1 @same_signbit_use2(i8 %x, i8 %y) { +; CHECK-LABEL: @same_signbit_use2( +; CHECK-NEXT: [[XSIGN:%.*]] = lshr i8 [[X:%.*]], 7 +; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1 +; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i8 +; CHECK-NEXT: call void @use(i8 [[YPOSZ]]) +; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[XSIGN]], [[YPOSZ]] +; CHECK-NEXT: ret i1 [[R]] +; + %xsign = lshr i8 %x, 7 + %ypos = icmp sgt i8 %y, -1 + %yposz = zext i1 %ypos to i8 + call void @use(i8 %yposz) + %r = icmp eq i8 %xsign, %yposz + ret i1 %r +} + +define i1 @same_signbit_use3(i8 %x, i8 %y) { +; CHECK-LABEL: @same_signbit_use3( +; CHECK-NEXT: [[XSIGN:%.*]] = lshr i8 [[X:%.*]], 7 +; CHECK-NEXT: call void @use(i8 [[XSIGN]]) +; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1 +; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i8 +; CHECK-NEXT: call void @use(i8 [[YPOSZ]]) +; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[XSIGN]], [[YPOSZ]] +; CHECK-NEXT: ret i1 [[R]] +; + %xsign = lshr i8 %x, 7 + call void @use(i8 %xsign) + %ypos = icmp sgt i8 %y, -1 + %yposz = zext i1 %ypos to i8 + call void @use(i8 %yposz) + %r = icmp eq i8 %xsign, %yposz + ret i1 %r +} + +define i1 @exactly_one_set_signbit_wrong_shamt(i8 %x, i8 %y) { +; CHECK-LABEL: @exactly_one_set_signbit_wrong_shamt( +; CHECK-NEXT: [[XSIGN:%.*]] = lshr i8 [[X:%.*]], 6 +; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1 +; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i8 +; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[XSIGN]], [[YPOSZ]] +; CHECK-NEXT: ret i1 [[R]] +; + %xsign = lshr i8 %x, 6 + %ypos = icmp sgt i8 %y, -1 + %yposz = zext i1 %ypos to i8 + %r = icmp eq i8 %xsign, %yposz + ret i1 %r +} + +define i1 @exactly_one_set_signbit_wrong_shr(i8 %x, i8 %y) { +; CHECK-LABEL: @exactly_one_set_signbit_wrong_shr( +; CHECK-NEXT: [[XSIGN:%.*]] = ashr i8 [[X:%.*]], 7 +; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1 +; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i8 +; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[XSIGN]], [[YPOSZ]] +; CHECK-NEXT: ret i1 [[R]] +; + %xsign = ashr i8 %x, 7 + %ypos = icmp sgt i8 %y, -1 + %yposz = zext i1 %ypos to i8 + %r = icmp eq i8 %xsign, %yposz + ret i1 %r +} + +define i1 @exactly_one_set_signbit_wrong_pred(i8 %x, i8 %y) { +; CHECK-LABEL: @exactly_one_set_signbit_wrong_pred( +; CHECK-NEXT: [[XSIGN:%.*]] = lshr i8 [[X:%.*]], 7 +; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1 +; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i8 +; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[XSIGN]], [[YPOSZ]] +; CHECK-NEXT: ret i1 [[R]] +; + %xsign = lshr i8 %x, 7 + %ypos = icmp sgt i8 %y, -1 + %yposz = zext i1 %ypos to i8 + %r = icmp sgt i8 %xsign, %yposz + ret i1 %r +} -- 2.7.4