From e66c6f10272cba050068017081b0996a9fa8b786 Mon Sep 17 00:00:00 2001 From: Takahiro Kuwano Date: Thu, 30 Sep 2021 11:23:37 +0900 Subject: [PATCH] mtd: spi-nor: Add support for Spansion S25FL256L The S25FL256L is a part of the S25FL-L family and has the same feature set as S25FL128L except the density. The datasheet can be found in the following link. https://www.cypress.com/file/316171/download The S25FL256L is 32MB NOR Flash that does not support Bank Address Register. This fixup is activated if CONFIG_SPI_FLASH_BAR is enabled and returns ENOTSUPP in setup() hook to avoid further ops. Tested on Xilinx Zynq-7000 FPGA board. Signed-off-by: Takahiro Kuwano --- drivers/mtd/spi/spi-nor-core.c | 19 +++++++++++++++++++ drivers/mtd/spi/spi-nor-ids.c | 1 + 2 files changed, 20 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index f1b4e5e..7572be5 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -3224,6 +3224,21 @@ static struct spi_nor_fixups s25hx_t_fixups = { .post_bfpt = s25hx_t_post_bfpt_fixup, .post_sfdp = s25hx_t_post_sfdp_fixup, }; + +static int s25fl256l_setup(struct spi_nor *nor, const struct flash_info *info, + const struct spi_nor_flash_parameter *params) +{ + return -ENOTSUPP; /* Bank Address Register is not supported */ +} + +static void s25fl256l_default_init(struct spi_nor *nor) +{ + nor->setup = s25fl256l_setup; +} + +static struct spi_nor_fixups s25fl256l_fixups = { + .default_init = s25fl256l_default_init, +}; #endif #ifdef CONFIG_SPI_FLASH_S28HS512T @@ -3646,6 +3661,10 @@ void spi_nor_set_fixups(struct spi_nor *nor) break; } } + + if (CONFIG_IS_ENABLED(SPI_FLASH_BAR) && + !strcmp(nor->info->name, "s25fl256l")) + nor->fixups = &s25fl256l_fixups; #endif #ifdef CONFIG_SPI_FLASH_S28HS512T diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 08b2571..3e0935e 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -233,6 +233,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("s25fl208k", 0x014014, 0, 64 * 1024, 16, SECT_4K | SPI_NOR_DUAL_READ) }, { INFO("s25fl064l", 0x016017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("s25fl128l", 0x016018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("s25fl256l", 0x016019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO6("s25hl512t", 0x342a1a, 0x0f0390, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | USE_CLSR) }, -- 2.7.4