From e6467df1eb3acc238c14a712c46c41bd5c9b1e52 Mon Sep 17 00:00:00 2001 From: Stefan Mavrodiev Date: Wed, 31 Jul 2019 16:15:52 +0300 Subject: [PATCH] sunxi: Fix pll1 clock calculation clock_sun6i.c is used for sun6i, sun8i and sun50i SoC families. PLL1 clock sets the default system clock, defined as: sun6i: 1008000000 sun8i: 1008000000 sun50i: 816000000 With the current calculation, m = 2 and k = 3. Solving for n, this results 28. Solving back: (24MHz * 28 * 3) / 2 = 1008MHz However if the requested clock is 816, n is 22.66 rounded to 22, which results: (24MHz * 28 * 3) / 2 = 792MHz Changing k to 4 satisfies both system clocks: (24E6 * 21 * 4) / 2 = 1008MHz (24E6 * 17 * 4) / 2 = 816MHz Signed-off-by: Stefan Mavrodiev Acked-by: Jagan Teki --- arch/arm/mach-sunxi/clock_sun6i.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c index 1628f3a..6ca38f7 100644 --- a/arch/arm/mach-sunxi/clock_sun6i.c +++ b/arch/arm/mach-sunxi/clock_sun6i.c @@ -118,7 +118,7 @@ void clock_set_pll1(unsigned int clk) if (clk > 1152000000) { k = 2; } else if (clk > 768000000) { - k = 3; + k = 4; m = 2; } -- 2.7.4