From e5e8b56236cd287b0cd70f02a64161a2b2031de2 Mon Sep 17 00:00:00 2001 From: Pierre-Eric Pelloux-Prayer Date: Tue, 29 Mar 2022 14:36:26 +0200 Subject: [PATCH] radeonsi/sqtt: setup spm bo MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The hardware will write SPM counters to this bo. Reviewed-by: Marek Olšák Part-of: --- src/gallium/drivers/radeonsi/si_perfcounter.c | 26 ++++++++++++++++++++++++++ src/gallium/drivers/radeonsi/si_sqtt.c | 11 ++++++++++- 2 files changed, 36 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c index 571424f..d191c44 100644 --- a/src/gallium/drivers/radeonsi/si_perfcounter.c +++ b/src/gallium/drivers/radeonsi/si_perfcounter.c @@ -713,6 +713,26 @@ void si_init_perfcounters(struct si_screen *screen) } } +static bool +si_spm_init_bo(struct si_context *sctx) +{ + struct radeon_winsys *ws = sctx->ws; + uint64_t size = 32 * 1024 * 1024; /* Default to 32MB. */ + + sctx->spm_trace.buffer_size = size; + sctx->spm_trace.sample_interval = 4096; /* Default to 4096 clk. */ + + sctx->spm_trace.bo = ws->buffer_create( + ws, size, 4096, + RADEON_DOMAIN_VRAM, + RADEON_FLAG_NO_INTERPROCESS_SHARING | + RADEON_FLAG_GTT_WC | + RADEON_FLAG_NO_SUBALLOC); + + return sctx->spm_trace.bo != NULL; +} + + static void si_emit_spm_counters(struct si_context *sctx, struct radeon_cmdbuf *cs) { @@ -886,11 +906,17 @@ si_spm_init(struct si_context *sctx) if (!ac_init_spm(info, pc, ARRAY_SIZE(spm_counters), spm_counters, &sctx->spm_trace)) return false; + if (!si_spm_init_bo(sctx)) + return false; + return true; } void si_spm_finish(struct si_context *sctx) { + struct pb_buffer *bo = sctx->spm_trace.bo; + radeon_bo_reference(sctx->screen->ws, &bo, NULL); + ac_destroy_spm(&sctx->spm_trace); } diff --git a/src/gallium/drivers/radeonsi/si_sqtt.c b/src/gallium/drivers/radeonsi/si_sqtt.c index cefbbec..a468a5f 100644 --- a/src/gallium/drivers/radeonsi/si_sqtt.c +++ b/src/gallium/drivers/radeonsi/si_sqtt.c @@ -389,6 +389,10 @@ si_thread_trace_start(struct si_context *sctx, int family, struct radeon_cmdbuf sctx->thread_trace->bo, RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM); + ws->cs_add_buffer(cs, + sctx->spm_trace.bo, + RADEON_USAGE_READWRITE, + RADEON_DOMAIN_VRAM); si_cp_dma_wait_for_idle(sctx, cs); @@ -432,6 +436,11 @@ si_thread_trace_stop(struct si_context *sctx, int family, struct radeon_cmdbuf * RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM); + ws->cs_add_buffer(cs, + sctx->spm_trace.bo, + RADEON_USAGE_READWRITE, + RADEON_DOMAIN_VRAM); + si_cp_dma_wait_for_idle(sctx, cs); /* Make sure to wait-for-idle before stopping SQTT. */ @@ -711,7 +720,7 @@ si_handle_thread_trace(struct si_context *sctx, struct radeon_cmdbuf *rcs) /* Wait for SQTT to finish and read back the bo */ if (sctx->ws->fence_wait(sctx->ws, sctx->last_sqtt_fence, PIPE_TIMEOUT_INFINITE) && si_get_thread_trace(sctx, &thread_trace)) { - ac_dump_rgp_capture(&sctx->screen->info, &thread_trace, NULL); + ac_dump_rgp_capture(&sctx->screen->info, &thread_trace, &sctx->spm_trace); } else { fprintf(stderr, "Failed to read the trace\n"); } -- 2.7.4