From e5bf7a7aaee7d5505d88aa352621c57fb8ba67c9 Mon Sep 17 00:00:00 2001 From: rsandifo Date: Tue, 12 Apr 2011 12:19:38 +0000 Subject: [PATCH] gcc/ * config/arm/arm.c (arm_print_operand): Use MEM_SIZE to get the size of a '%A' memory reference. (T_DREG, T_QREG): New neon_builtin_type_bits. (arm_init_neon_builtins): Assert that the load and store operands are neon_struct_operands. (locate_neon_builtin_icode): Provide the neon_builtin_type_bits. (NEON_ARG_MEMORY): New builtin_arg. (neon_dereference_pointer): New function. (arm_expand_neon_args): Add a neon_builtin_type_bits argument. Handle NEON_ARG_MEMORY. (arm_expand_neon_builtin): Update after above interface changes. Use NEON_ARG_MEMORY for loads and stores. * config/arm/predicates.md (neon_struct_operand): New predicate. * config/arm/iterators.md (V_two_elem): Tweak formatting. (V_three_elem): Use BLKmode for accesses that have no associated mode. (V_four_elem): Tweak formatting. * config/arm/neon.md (neon_vld1, neon_vld1_dup) (neon_vst1_lane, neon_vst1, neon_vld2) (neon_vld2_lane, neon_vld2_dup, neon_vst2) (neon_vst2_lane, neon_vld3, neon_vld3_lane) (neon_vld3_dup, neon_vst3, neon_vst3_lane) (neon_vld4, neon_vld4_lane, neon_vld4_dup) (neon_vst4): Replace pointer operand with a memory operand. Use %A in the output template. (neon_vld3qa, neon_vld3qb, neon_vst3qa) (neon_vst3qb, neon_vld4qa, neon_vld4qb) (neon_vst4qa, neon_vst4qb): Likewise, but halve the width of the memory access. Remove post-increment. * config/arm/neon-testgen.ml: Allow addresses to have an alignment. gcc/testsuite/ * gcc.target/arm/neon-vld3-1.c: New test. * gcc.target/arm/neon-vst3-1.c: New test. * gcc.target/arm/neon/v*.c: Regenerate. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@172314 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 32 +++ gcc/config/arm/arm.c | 166 +++++++++--- gcc/config/arm/iterators.md | 18 +- gcc/config/arm/neon-testgen.ml | 2 +- gcc/config/arm/neon.md | 300 +++++++++++----------- gcc/config/arm/predicates.md | 4 + gcc/testsuite/ChangeLog | 6 + gcc/testsuite/gcc.target/arm/neon-vld3-1.c | 27 ++ gcc/testsuite/gcc.target/arm/neon-vst3-1.c | 25 ++ gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1f32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1p16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1p8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1s16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1s32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1s64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1s8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1u16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1u32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1u64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1u8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2f32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2p16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2p8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2s16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2s32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2s64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2s8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2u16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2u32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2u64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld2u8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3f32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3p16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3p8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3s16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3s32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3s64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3s8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3u16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3u32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3u64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld3u8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4f32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4p16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4p8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4s16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4s32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4s64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4s8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4u16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4u32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4u64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld4u8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1f32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1p16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1p8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1s16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1s32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1s64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1s8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1u16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1u32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1u64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst1u8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2f32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2p16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2p8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2s16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2s32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2s64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2s8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2u16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2u32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2u64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst2u8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3f32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3p16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3p8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3s16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3s32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3s64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3s8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3u16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3u32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3u64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst3u8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c | 4 +- gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4f32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4p16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4p8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4s16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4s32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4s64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4s8.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4u16.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4u32.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4u64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vst4u8.c | 2 +- 362 files changed, 782 insertions(+), 612 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/neon-vld3-1.c create mode 100644 gcc/testsuite/gcc.target/arm/neon-vst3-1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d7a72db..61d6a94 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,35 @@ +2011-04-12 Richard Sandiford + + * config/arm/arm.c (arm_print_operand): Use MEM_SIZE to get the + size of a '%A' memory reference. + (T_DREG, T_QREG): New neon_builtin_type_bits. + (arm_init_neon_builtins): Assert that the load and store operands + are neon_struct_operands. + (locate_neon_builtin_icode): Provide the neon_builtin_type_bits. + (NEON_ARG_MEMORY): New builtin_arg. + (neon_dereference_pointer): New function. + (arm_expand_neon_args): Add a neon_builtin_type_bits argument. + Handle NEON_ARG_MEMORY. + (arm_expand_neon_builtin): Update after above interface changes. + Use NEON_ARG_MEMORY for loads and stores. + * config/arm/predicates.md (neon_struct_operand): New predicate. + * config/arm/iterators.md (V_two_elem): Tweak formatting. + (V_three_elem): Use BLKmode for accesses that have no associated mode. + (V_four_elem): Tweak formatting. + * config/arm/neon.md (neon_vld1, neon_vld1_dup) + (neon_vst1_lane, neon_vst1, neon_vld2) + (neon_vld2_lane, neon_vld2_dup, neon_vst2) + (neon_vst2_lane, neon_vld3, neon_vld3_lane) + (neon_vld3_dup, neon_vst3, neon_vst3_lane) + (neon_vld4, neon_vld4_lane, neon_vld4_dup) + (neon_vst4): Replace pointer operand with a memory operand. + Use %A in the output template. + (neon_vld3qa, neon_vld3qb, neon_vst3qa) + (neon_vst3qb, neon_vld4qa, neon_vld4qb) + (neon_vst4qa, neon_vst4qb): Likewise, but halve + the width of the memory access. Remove post-increment. + * config/arm/neon-testgen.ml: Allow addresses to have an alignment. + 2011-04-12 Nick Clifton * config/v850/v850.c (expand_prologue): Do not use the CALLT diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 3dc2fdd..d9b9829 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -16566,7 +16566,7 @@ arm_print_operand (FILE *stream, rtx x, int code) { rtx addr; bool postinc = FALSE; - unsigned align, modesize, align_bits; + unsigned align, memsize, align_bits; gcc_assert (GET_CODE (x) == MEM); addr = XEXP (x, 0); @@ -16581,12 +16581,12 @@ arm_print_operand (FILE *stream, rtx x, int code) instruction (for some alignments) as an aid to the memory subsystem of the target. */ align = MEM_ALIGN (x) >> 3; - modesize = GET_MODE_SIZE (GET_MODE (x)); + memsize = INTVAL (MEM_SIZE (x)); /* Only certain alignment specifiers are supported by the hardware. */ - if (modesize == 16 && (align % 32) == 0) + if (memsize == 16 && (align % 32) == 0) align_bits = 256; - else if ((modesize == 8 || modesize == 16) && (align % 16) == 0) + else if ((memsize == 8 || memsize == 16) && (align % 16) == 0) align_bits = 128; else if ((align % 8) == 0) align_bits = 64; @@ -18246,12 +18246,14 @@ enum neon_builtin_type_bits { T_V2SI = 0x0004, T_V2SF = 0x0008, T_DI = 0x0010, + T_DREG = 0x001F, T_V16QI = 0x0020, T_V8HI = 0x0040, T_V4SI = 0x0080, T_V4SF = 0x0100, T_V2DI = 0x0200, T_TI = 0x0400, + T_QREG = 0x07E0, T_EI = 0x0800, T_OI = 0x1000 }; @@ -18897,10 +18899,9 @@ arm_init_neon_builtins (void) if (is_load && k == 1) { /* Neon load patterns always have the memory operand - (a SImode pointer) in the operand 1 position. We - want a const pointer to the element type in that - position. */ - gcc_assert (insn_data[icode].operand[k].mode == SImode); + in the operand 1 position. */ + gcc_assert (insn_data[icode].operand[k].predicate + == neon_struct_operand); switch (1 << j) { @@ -18935,10 +18936,9 @@ arm_init_neon_builtins (void) else if (is_store && k == 0) { /* Similarly, Neon store patterns use operand 0 as - the memory location to store to (a SImode pointer). - Use a pointer to the element type of the store in - that position. */ - gcc_assert (insn_data[icode].operand[k].mode == SImode); + the memory location to store to. */ + gcc_assert (insn_data[icode].operand[k].predicate + == neon_struct_operand); switch (1 << j) { @@ -19258,12 +19258,13 @@ neon_builtin_compare (const void *a, const void *b) } static enum insn_code -locate_neon_builtin_icode (int fcode, neon_itype *itype) +locate_neon_builtin_icode (int fcode, neon_itype *itype, + enum neon_builtin_type_bits *type_bit) { neon_builtin_datum key = { NULL, (neon_itype) 0, 0, { CODE_FOR_nothing }, 0, 0 }; neon_builtin_datum *found; - int idx; + int idx, type, ntypes; key.base_fcode = fcode; found = (neon_builtin_datum *) @@ -19276,20 +19277,84 @@ locate_neon_builtin_icode (int fcode, neon_itype *itype) if (itype) *itype = found->itype; + if (type_bit) + { + ntypes = 0; + for (type = 0; type < T_MAX; type++) + if (found->bits & (1 << type)) + { + if (ntypes == idx) + break; + ntypes++; + } + gcc_assert (type < T_MAX); + *type_bit = (enum neon_builtin_type_bits) (1 << type); + } return found->codes[idx]; } typedef enum { NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, + NEON_ARG_MEMORY, NEON_ARG_STOP } builtin_arg; #define NEON_MAX_BUILTIN_ARGS 5 +/* EXP is a pointer argument to a Neon load or store intrinsic. Derive + and return an expression for the accessed memory. + + The intrinsic function operates on a block of registers that has + mode REG_MODE. This block contains vectors of type TYPE_BIT. + The function references the memory at EXP in mode MEM_MODE; + this mode may be BLKmode if no more suitable mode is available. */ + +static tree +neon_dereference_pointer (tree exp, enum machine_mode mem_mode, + enum machine_mode reg_mode, + enum neon_builtin_type_bits type_bit) +{ + HOST_WIDE_INT reg_size, vector_size, nvectors, nelems; + tree elem_type, upper_bound, array_type; + + /* Work out the size of the register block in bytes. */ + reg_size = GET_MODE_SIZE (reg_mode); + + /* Work out the size of each vector in bytes. */ + gcc_assert (type_bit & (T_DREG | T_QREG)); + vector_size = (type_bit & T_QREG ? 16 : 8); + + /* Work out how many vectors there are. */ + gcc_assert (reg_size % vector_size == 0); + nvectors = reg_size / vector_size; + + /* Work out how many elements are being loaded or stored. + MEM_MODE == REG_MODE implies a one-to-one mapping between register + and memory elements; anything else implies a lane load or store. */ + if (mem_mode == reg_mode) + nelems = vector_size * nvectors; + else + nelems = nvectors; + + /* Work out the type of each element. */ + gcc_assert (POINTER_TYPE_P (TREE_TYPE (exp))); + elem_type = TREE_TYPE (TREE_TYPE (exp)); + + /* Create a type that describes the full access. */ + upper_bound = build_int_cst (size_type_node, nelems - 1); + array_type = build_array_type (elem_type, build_index_type (upper_bound)); + + /* Dereference EXP using that type. */ + exp = convert (build_pointer_type (array_type), exp); + return fold_build2 (MEM_REF, array_type, exp, + build_int_cst (TREE_TYPE (exp), 0)); +} + /* Expand a Neon builtin. */ static rtx arm_expand_neon_args (rtx target, int icode, int have_retval, + enum neon_builtin_type_bits type_bit, tree exp, ...) { va_list ap; @@ -19298,7 +19363,9 @@ arm_expand_neon_args (rtx target, int icode, int have_retval, rtx op[NEON_MAX_BUILTIN_ARGS]; enum machine_mode tmode = insn_data[icode].operand[0].mode; enum machine_mode mode[NEON_MAX_BUILTIN_ARGS]; + enum machine_mode other_mode; int argc = 0; + int opno; if (have_retval && (!target @@ -19316,26 +19383,46 @@ arm_expand_neon_args (rtx target, int icode, int have_retval, break; else { + opno = argc + have_retval; + mode[argc] = insn_data[icode].operand[opno].mode; arg[argc] = CALL_EXPR_ARG (exp, argc); + if (thisarg == NEON_ARG_MEMORY) + { + other_mode = insn_data[icode].operand[1 - opno].mode; + arg[argc] = neon_dereference_pointer (arg[argc], mode[argc], + other_mode, type_bit); + } op[argc] = expand_normal (arg[argc]); - mode[argc] = insn_data[icode].operand[argc + have_retval].mode; switch (thisarg) { case NEON_ARG_COPY_TO_REG: /*gcc_assert (GET_MODE (op[argc]) == mode[argc]);*/ - if (!(*insn_data[icode].operand[argc + have_retval].predicate) + if (!(*insn_data[icode].operand[opno].predicate) (op[argc], mode[argc])) op[argc] = copy_to_mode_reg (mode[argc], op[argc]); break; case NEON_ARG_CONSTANT: /* FIXME: This error message is somewhat unhelpful. */ - if (!(*insn_data[icode].operand[argc + have_retval].predicate) + if (!(*insn_data[icode].operand[opno].predicate) (op[argc], mode[argc])) error ("argument must be a constant"); break; + case NEON_ARG_MEMORY: + gcc_assert (MEM_P (op[argc])); + PUT_MODE (op[argc], mode[argc]); + /* ??? arm_neon.h uses the same built-in functions for signed + and unsigned accesses, casting where necessary. This isn't + alias safe. */ + set_mem_alias_set (op[argc], 0); + if (!(*insn_data[icode].operand[opno].predicate) + (op[argc], mode[argc])) + op[argc] = (replace_equiv_address + (op[argc], force_reg (Pmode, XEXP (op[argc], 0)))); + break; + case NEON_ARG_STOP: gcc_unreachable (); } @@ -19414,14 +19501,15 @@ static rtx arm_expand_neon_builtin (int fcode, tree exp, rtx target) { neon_itype itype; - enum insn_code icode = locate_neon_builtin_icode (fcode, &itype); + enum neon_builtin_type_bits type_bit; + enum insn_code icode = locate_neon_builtin_icode (fcode, &itype, &type_bit); switch (itype) { case NEON_UNOP: case NEON_CONVERT: case NEON_DUPLANE: - return arm_expand_neon_args (target, icode, 1, exp, + return arm_expand_neon_args (target, icode, 1, type_bit, exp, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_STOP); case NEON_BINOP: @@ -19431,90 +19519,90 @@ arm_expand_neon_builtin (int fcode, tree exp, rtx target) case NEON_SCALARMULH: case NEON_SHIFTINSERT: case NEON_LOGICBINOP: - return arm_expand_neon_args (target, icode, 1, exp, + return arm_expand_neon_args (target, icode, 1, type_bit, exp, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_STOP); case NEON_TERNOP: - return arm_expand_neon_args (target, icode, 1, exp, + return arm_expand_neon_args (target, icode, 1, type_bit, exp, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_STOP); case NEON_GETLANE: case NEON_FIXCONV: case NEON_SHIFTIMM: - return arm_expand_neon_args (target, icode, 1, exp, + return arm_expand_neon_args (target, icode, 1, type_bit, exp, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_CONSTANT, NEON_ARG_STOP); case NEON_CREATE: - return arm_expand_neon_args (target, icode, 1, exp, + return arm_expand_neon_args (target, icode, 1, type_bit, exp, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); case NEON_DUP: case NEON_SPLIT: case NEON_REINTERP: - return arm_expand_neon_args (target, icode, 1, exp, + return arm_expand_neon_args (target, icode, 1, type_bit, exp, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); case NEON_COMBINE: case NEON_VTBL: - return arm_expand_neon_args (target, icode, 1, exp, + return arm_expand_neon_args (target, icode, 1, type_bit, exp, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); case NEON_RESULTPAIR: - return arm_expand_neon_args (target, icode, 0, exp, + return arm_expand_neon_args (target, icode, 0, type_bit, exp, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); case NEON_LANEMUL: case NEON_LANEMULL: case NEON_LANEMULH: - return arm_expand_neon_args (target, icode, 1, exp, + return arm_expand_neon_args (target, icode, 1, type_bit, exp, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_CONSTANT, NEON_ARG_STOP); case NEON_LANEMAC: - return arm_expand_neon_args (target, icode, 1, exp, + return arm_expand_neon_args (target, icode, 1, type_bit, exp, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_CONSTANT, NEON_ARG_STOP); case NEON_SHIFTACC: - return arm_expand_neon_args (target, icode, 1, exp, + return arm_expand_neon_args (target, icode, 1, type_bit, exp, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_CONSTANT, NEON_ARG_STOP); case NEON_SCALARMAC: - return arm_expand_neon_args (target, icode, 1, exp, + return arm_expand_neon_args (target, icode, 1, type_bit, exp, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_STOP); case NEON_SELECT: case NEON_VTBX: - return arm_expand_neon_args (target, icode, 1, exp, + return arm_expand_neon_args (target, icode, 1, type_bit, exp, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); case NEON_LOAD1: case NEON_LOADSTRUCT: - return arm_expand_neon_args (target, icode, 1, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); + return arm_expand_neon_args (target, icode, 1, type_bit, exp, + NEON_ARG_MEMORY, NEON_ARG_STOP); case NEON_LOAD1LANE: case NEON_LOADSTRUCTLANE: - return arm_expand_neon_args (target, icode, 1, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, + return arm_expand_neon_args (target, icode, 1, type_bit, exp, + NEON_ARG_MEMORY, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_STOP); case NEON_STORE1: case NEON_STORESTRUCT: - return arm_expand_neon_args (target, icode, 0, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); + return arm_expand_neon_args (target, icode, 0, type_bit, exp, + NEON_ARG_MEMORY, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); case NEON_STORE1LANE: case NEON_STORESTRUCTLANE: - return arm_expand_neon_args (target, icode, 0, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, + return arm_expand_neon_args (target, icode, 0, type_bit, exp, + NEON_ARG_MEMORY, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_STOP); } diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 887c962b..b11b112 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -194,24 +194,22 @@ ;; Mode of pair of elements for each vector mode, to define transfer ;; size for structure lane/dup loads and stores. -(define_mode_attr V_two_elem [(V8QI "HI") (V16QI "HI") - (V4HI "SI") (V8HI "SI") +(define_mode_attr V_two_elem [(V8QI "HI") (V16QI "HI") + (V4HI "SI") (V8HI "SI") (V2SI "V2SI") (V4SI "V2SI") (V2SF "V2SF") (V4SF "V2SF") (DI "V2DI") (V2DI "V2DI")]) ;; Similar, for three elements. -;; ??? Should we define extra modes so that sizes of all three-element -;; accesses can be accurately represented? -(define_mode_attr V_three_elem [(V8QI "SI") (V16QI "SI") - (V4HI "V4HI") (V8HI "V4HI") - (V2SI "V4SI") (V4SI "V4SI") - (V2SF "V4SF") (V4SF "V4SF") - (DI "EI") (V2DI "EI")]) +(define_mode_attr V_three_elem [(V8QI "BLK") (V16QI "BLK") + (V4HI "BLK") (V8HI "BLK") + (V2SI "BLK") (V4SI "BLK") + (V2SF "BLK") (V4SF "BLK") + (DI "EI") (V2DI "EI")]) ;; Similar, for four elements. (define_mode_attr V_four_elem [(V8QI "SI") (V16QI "SI") - (V4HI "V4HI") (V8HI "V4HI") + (V4HI "V4HI") (V8HI "V4HI") (V2SI "V4SI") (V4SI "V4SI") (V2SF "V4SF") (V4SF "V4SF") (DI "OI") (V2DI "OI")]) diff --git a/gcc/config/arm/neon-testgen.ml b/gcc/config/arm/neon-testgen.ml index 63fbbbf..eb2917d 100644 --- a/gcc/config/arm/neon-testgen.ml +++ b/gcc/config/arm/neon-testgen.ml @@ -177,7 +177,7 @@ let rec analyze_shape shape = let alt2 = commas (fun x -> x) (n_things n elt_regexp) "" in "\\\\\\{((" ^ alt1 ^ ")|(" ^ alt2 ^ "))\\\\\\}" | (PtrTo elt | CstPtrTo elt) -> - "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\\\\\]" + "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\(:\\[0-9\\]+\\)?\\\\\\]" | Element_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]" | Element_of_qreg -> (analyze_shape_elt Qreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]" | All_elements_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\\\\\]" diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 723e589..8231782 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -4260,16 +4260,16 @@ (define_insn "neon_vld1" [(set (match_operand:VDQX 0 "s_register_operand" "=w") - (unspec:VDQX [(mem:VDQX (match_operand:SI 1 "s_register_operand" "r"))] + (unspec:VDQX [(match_operand:VDQX 1 "neon_struct_operand" "Um")] UNSPEC_VLD1))] "TARGET_NEON" - "vld1.\t%h0, [%1]" + "vld1.\t%h0, %A1" [(set_attr "neon_type" "neon_vld1_1_2_regs")] ) (define_insn "neon_vld1_lane" [(set (match_operand:VDX 0 "s_register_operand" "=w") - (unspec:VDX [(mem: (match_operand:SI 1 "s_register_operand" "r")) + (unspec:VDX [(match_operand: 1 "neon_struct_operand" "Um") (match_operand:VDX 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i")] UNSPEC_VLD1_LANE))] @@ -4280,9 +4280,9 @@ if (lane < 0 || lane >= max) error ("lane out of range"); if (max == 1) - return "vld1.\t%P0, [%1]"; + return "vld1.\t%P0, %A1"; else - return "vld1.\t{%P0[%c3]}, [%1]"; + return "vld1.\t{%P0[%c3]}, %A1"; } [(set (attr "neon_type") (if_then_else (eq (const_string "") (const_int 2)) @@ -4292,7 +4292,7 @@ (define_insn "neon_vld1_lane" [(set (match_operand:VQX 0 "s_register_operand" "=w") - (unspec:VQX [(mem: (match_operand:SI 1 "s_register_operand" "r")) + (unspec:VQX [(match_operand: 1 "neon_struct_operand" "Um") (match_operand:VQX 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i")] UNSPEC_VLD1_LANE))] @@ -4311,9 +4311,9 @@ } operands[0] = gen_rtx_REG (mode, regno); if (max == 2) - return "vld1.\t%P0, [%1]"; + return "vld1.\t%P0, %A1"; else - return "vld1.\t{%P0[%c3]}, [%1]"; + return "vld1.\t{%P0[%c3]}, %A1"; } [(set (attr "neon_type") (if_then_else (eq (const_string "") (const_int 2)) @@ -4323,14 +4323,14 @@ (define_insn "neon_vld1_dup" [(set (match_operand:VDX 0 "s_register_operand" "=w") - (unspec:VDX [(mem: (match_operand:SI 1 "s_register_operand" "r"))] + (unspec:VDX [(match_operand: 1 "neon_struct_operand" "Um")] UNSPEC_VLD1_DUP))] "TARGET_NEON" { if (GET_MODE_NUNITS (mode) > 1) - return "vld1.\t{%P0[]}, [%1]"; + return "vld1.\t{%P0[]}, %A1"; else - return "vld1.\t%h0, [%1]"; + return "vld1.\t%h0, %A1"; } [(set (attr "neon_type") (if_then_else (gt (const_string "") (const_string "1")) @@ -4340,14 +4340,14 @@ (define_insn "neon_vld1_dup" [(set (match_operand:VQX 0 "s_register_operand" "=w") - (unspec:VQX [(mem: (match_operand:SI 1 "s_register_operand" "r"))] + (unspec:VQX [(match_operand: 1 "neon_struct_operand" "Um")] UNSPEC_VLD1_DUP))] "TARGET_NEON" { if (GET_MODE_NUNITS (mode) > 2) - return "vld1.\t{%e0[], %f0[]}, [%1]"; + return "vld1.\t{%e0[], %f0[]}, %A1"; else - return "vld1.\t%h0, [%1]"; + return "vld1.\t%h0, %A1"; } [(set (attr "neon_type") (if_then_else (gt (const_string "") (const_string "1")) @@ -4356,15 +4356,15 @@ ) (define_insn "neon_vst1" - [(set (mem:VDQX (match_operand:SI 0 "s_register_operand" "r")) + [(set (match_operand:VDQX 0 "neon_struct_operand" "=Um") (unspec:VDQX [(match_operand:VDQX 1 "s_register_operand" "w")] UNSPEC_VST1))] "TARGET_NEON" - "vst1.\t%h1, [%0]" + "vst1.\t%h1, %A0" [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")]) (define_insn "neon_vst1_lane" - [(set (mem: (match_operand:SI 0 "s_register_operand" "r")) + [(set (match_operand: 0 "neon_struct_operand" "=Um") (vec_select: (match_operand:VDX 1 "s_register_operand" "w") (parallel [(match_operand:SI 2 "neon_lane_number" "i")])))] @@ -4375,9 +4375,9 @@ if (lane < 0 || lane >= max) error ("lane out of range"); if (max == 1) - return "vst1.\t{%P1}, [%0]"; + return "vst1.\t{%P1}, %A0"; else - return "vst1.\t{%P1[%c2]}, [%0]"; + return "vst1.\t{%P1[%c2]}, %A0"; } [(set (attr "neon_type") (if_then_else (eq (const_string "") (const_int 1)) @@ -4385,7 +4385,7 @@ (const_string "neon_vst1_vst2_lane")))]) (define_insn "neon_vst1_lane" - [(set (mem: (match_operand:SI 0 "s_register_operand" "r")) + [(set (match_operand: 0 "neon_struct_operand" "=Um") (vec_select: (match_operand:VQX 1 "s_register_operand" "w") (parallel [(match_operand:SI 2 "neon_lane_number" "i")])))] @@ -4404,24 +4404,24 @@ } operands[1] = gen_rtx_REG (mode, regno); if (max == 2) - return "vst1.\t{%P1}, [%0]"; + return "vst1.\t{%P1}, %A0"; else - return "vst1.\t{%P1[%c2]}, [%0]"; + return "vst1.\t{%P1[%c2]}, %A0"; } [(set_attr "neon_type" "neon_vst1_vst2_lane")] ) (define_insn "neon_vld2" [(set (match_operand:TI 0 "s_register_operand" "=w") - (unspec:TI [(mem:TI (match_operand:SI 1 "s_register_operand" "r")) + (unspec:TI [(match_operand:TI 1 "neon_struct_operand" "Um") (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] UNSPEC_VLD2))] "TARGET_NEON" { if ( == 64) - return "vld1.64\t%h0, [%1]"; + return "vld1.64\t%h0, %A1"; else - return "vld2.\t%h0, [%1]"; + return "vld2.\t%h0, %A1"; } [(set (attr "neon_type") (if_then_else (eq (const_string "") (const_string "64")) @@ -4431,16 +4431,16 @@ (define_insn "neon_vld2" [(set (match_operand:OI 0 "s_register_operand" "=w") - (unspec:OI [(mem:OI (match_operand:SI 1 "s_register_operand" "r")) + (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] UNSPEC_VLD2))] "TARGET_NEON" - "vld2.\t%h0, [%1]" + "vld2.\t%h0, %A1" [(set_attr "neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes")]) (define_insn "neon_vld2_lane" [(set (match_operand:TI 0 "s_register_operand" "=w") - (unspec:TI [(mem: (match_operand:SI 1 "s_register_operand" "r")) + (unspec:TI [(match_operand: 1 "neon_struct_operand" "Um") (match_operand:TI 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i") (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] @@ -4457,7 +4457,7 @@ ops[1] = gen_rtx_REG (DImode, regno + 2); ops[2] = operands[1]; ops[3] = operands[3]; - output_asm_insn ("vld2.\t{%P0[%c3], %P1[%c3]}, [%2]", ops); + output_asm_insn ("vld2.\t{%P0[%c3], %P1[%c3]}, %A2", ops); return ""; } [(set_attr "neon_type" "neon_vld1_vld2_lane")] @@ -4465,7 +4465,7 @@ (define_insn "neon_vld2_lane" [(set (match_operand:OI 0 "s_register_operand" "=w") - (unspec:OI [(mem: (match_operand:SI 1 "s_register_operand" "r")) + (unspec:OI [(match_operand: 1 "neon_struct_operand" "Um") (match_operand:OI 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i") (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] @@ -4487,7 +4487,7 @@ ops[1] = gen_rtx_REG (DImode, regno + 4); ops[2] = operands[1]; ops[3] = GEN_INT (lane); - output_asm_insn ("vld2.\t{%P0[%c3], %P1[%c3]}, [%2]", ops); + output_asm_insn ("vld2.\t{%P0[%c3], %P1[%c3]}, %A2", ops); return ""; } [(set_attr "neon_type" "neon_vld1_vld2_lane")] @@ -4495,15 +4495,15 @@ (define_insn "neon_vld2_dup" [(set (match_operand:TI 0 "s_register_operand" "=w") - (unspec:TI [(mem: (match_operand:SI 1 "s_register_operand" "r")) + (unspec:TI [(match_operand: 1 "neon_struct_operand" "Um") (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] UNSPEC_VLD2_DUP))] "TARGET_NEON" { if (GET_MODE_NUNITS (mode) > 1) - return "vld2.\t{%e0[], %f0[]}, [%1]"; + return "vld2.\t{%e0[], %f0[]}, %A1"; else - return "vld1.\t%h0, [%1]"; + return "vld1.\t%h0, %A1"; } [(set (attr "neon_type") (if_then_else (gt (const_string "") (const_string "1")) @@ -4512,16 +4512,16 @@ ) (define_insn "neon_vst2" - [(set (mem:TI (match_operand:SI 0 "s_register_operand" "r")) + [(set (match_operand:TI 0 "neon_struct_operand" "=Um") (unspec:TI [(match_operand:TI 1 "s_register_operand" "w") (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] UNSPEC_VST2))] "TARGET_NEON" { if ( == 64) - return "vst1.64\t%h1, [%0]"; + return "vst1.64\t%h1, %A0"; else - return "vst2.\t%h1, [%0]"; + return "vst2.\t%h1, %A0"; } [(set (attr "neon_type") (if_then_else (eq (const_string "") (const_string "64")) @@ -4530,17 +4530,17 @@ ) (define_insn "neon_vst2" - [(set (mem:OI (match_operand:SI 0 "s_register_operand" "r")) + [(set (match_operand:OI 0 "neon_struct_operand" "=Um") (unspec:OI [(match_operand:OI 1 "s_register_operand" "w") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] UNSPEC_VST2))] "TARGET_NEON" - "vst2.\t%h1, [%0]" + "vst2.\t%h1, %A0" [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")] ) (define_insn "neon_vst2_lane" - [(set (mem: (match_operand:SI 0 "s_register_operand" "r")) + [(set (match_operand: 0 "neon_struct_operand" "=Um") (unspec: [(match_operand:TI 1 "s_register_operand" "w") (match_operand:SI 2 "immediate_operand" "i") @@ -4558,14 +4558,14 @@ ops[1] = gen_rtx_REG (DImode, regno); ops[2] = gen_rtx_REG (DImode, regno + 2); ops[3] = operands[2]; - output_asm_insn ("vst2.\t{%P1[%c3], %P2[%c3]}, [%0]", ops); + output_asm_insn ("vst2.\t{%P1[%c3], %P2[%c3]}, %A0", ops); return ""; } [(set_attr "neon_type" "neon_vst1_vst2_lane")] ) (define_insn "neon_vst2_lane" - [(set (mem: (match_operand:SI 0 "s_register_operand" "r")) + [(set (match_operand: 0 "neon_struct_operand" "=Um") (unspec: [(match_operand:OI 1 "s_register_operand" "w") (match_operand:SI 2 "immediate_operand" "i") @@ -4588,7 +4588,7 @@ ops[1] = gen_rtx_REG (DImode, regno); ops[2] = gen_rtx_REG (DImode, regno + 4); ops[3] = GEN_INT (lane); - output_asm_insn ("vst2.\t{%P1[%c3], %P2[%c3]}, [%0]", ops); + output_asm_insn ("vst2.\t{%P1[%c3], %P2[%c3]}, %A0", ops); return ""; } [(set_attr "neon_type" "neon_vst1_vst2_lane")] @@ -4596,15 +4596,15 @@ (define_insn "neon_vld3" [(set (match_operand:EI 0 "s_register_operand" "=w") - (unspec:EI [(mem:EI (match_operand:SI 1 "s_register_operand" "r")) + (unspec:EI [(match_operand:EI 1 "neon_struct_operand" "Um") (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] UNSPEC_VLD3))] "TARGET_NEON" { if ( == 64) - return "vld1.64\t%h0, [%1]"; + return "vld1.64\t%h0, %A1"; else - return "vld3.\t%h0, [%1]"; + return "vld3.\t%h0, %A1"; } [(set (attr "neon_type") (if_then_else (eq (const_string "") (const_string "64")) @@ -4613,25 +4613,25 @@ ) (define_expand "neon_vld3" - [(match_operand:CI 0 "s_register_operand" "=w") - (match_operand:SI 1 "s_register_operand" "+r") + [(match_operand:CI 0 "s_register_operand") + (match_operand:CI 1 "neon_struct_operand") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_NEON" { - emit_insn (gen_neon_vld3qa (operands[0], operands[1], operands[1])); - emit_insn (gen_neon_vld3qb (operands[0], operands[0], - operands[1], operands[1])); + rtx mem; + + mem = adjust_address (operands[1], EImode, 0); + emit_insn (gen_neon_vld3qa (operands[0], mem)); + mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode)); + emit_insn (gen_neon_vld3qb (operands[0], mem, operands[0])); DONE; }) (define_insn "neon_vld3qa" [(set (match_operand:CI 0 "s_register_operand" "=w") - (unspec:CI [(mem:CI (match_operand:SI 2 "s_register_operand" "1")) + (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VLD3A)) - (set (match_operand:SI 1 "s_register_operand" "=r") - (plus:SI (match_dup 2) - (const_int 24)))] + UNSPEC_VLD3A))] "TARGET_NEON" { int regno = REGNO (operands[0]); @@ -4640,7 +4640,7 @@ ops[1] = gen_rtx_REG (DImode, regno + 4); ops[2] = gen_rtx_REG (DImode, regno + 8); ops[3] = operands[1]; - output_asm_insn ("vld3.\t{%P0, %P1, %P2}, [%3]!", ops); + output_asm_insn ("vld3.\t{%P0, %P1, %P2}, %A3", ops); return ""; } [(set_attr "neon_type" "neon_vld3_vld4")] @@ -4648,13 +4648,10 @@ (define_insn "neon_vld3qb" [(set (match_operand:CI 0 "s_register_operand" "=w") - (unspec:CI [(mem:CI (match_operand:SI 3 "s_register_operand" "2")) - (match_operand:CI 1 "s_register_operand" "0") + (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um") + (match_operand:CI 2 "s_register_operand" "0") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VLD3B)) - (set (match_operand:SI 2 "s_register_operand" "=r") - (plus:SI (match_dup 3) - (const_int 24)))] + UNSPEC_VLD3B))] "TARGET_NEON" { int regno = REGNO (operands[0]); @@ -4662,8 +4659,8 @@ ops[0] = gen_rtx_REG (DImode, regno + 2); ops[1] = gen_rtx_REG (DImode, regno + 6); ops[2] = gen_rtx_REG (DImode, regno + 10); - ops[3] = operands[2]; - output_asm_insn ("vld3.\t{%P0, %P1, %P2}, [%3]!", ops); + ops[3] = operands[1]; + output_asm_insn ("vld3.\t{%P0, %P1, %P2}, %A3", ops); return ""; } [(set_attr "neon_type" "neon_vld3_vld4")] @@ -4671,7 +4668,7 @@ (define_insn "neon_vld3_lane" [(set (match_operand:EI 0 "s_register_operand" "=w") - (unspec:EI [(mem: (match_operand:SI 1 "s_register_operand" "r")) + (unspec:EI [(match_operand: 1 "neon_struct_operand" "Um") (match_operand:EI 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i") (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] @@ -4689,7 +4686,7 @@ ops[2] = gen_rtx_REG (DImode, regno + 4); ops[3] = operands[1]; ops[4] = operands[3]; - output_asm_insn ("vld3.\t{%P0[%c4], %P1[%c4], %P2[%c4]}, [%3]", + output_asm_insn ("vld3.\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %A3", ops); return ""; } @@ -4698,7 +4695,7 @@ (define_insn "neon_vld3_lane" [(set (match_operand:CI 0 "s_register_operand" "=w") - (unspec:CI [(mem: (match_operand:SI 1 "s_register_operand" "r")) + (unspec:CI [(match_operand: 1 "neon_struct_operand" "Um") (match_operand:CI 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i") (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] @@ -4721,7 +4718,7 @@ ops[2] = gen_rtx_REG (DImode, regno + 8); ops[3] = operands[1]; ops[4] = GEN_INT (lane); - output_asm_insn ("vld3.\t{%P0[%c4], %P1[%c4], %P2[%c4]}, [%3]", + output_asm_insn ("vld3.\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %A3", ops); return ""; } @@ -4730,7 +4727,7 @@ (define_insn "neon_vld3_dup" [(set (match_operand:EI 0 "s_register_operand" "=w") - (unspec:EI [(mem: (match_operand:SI 1 "s_register_operand" "r")) + (unspec:EI [(match_operand: 1 "neon_struct_operand" "Um") (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] UNSPEC_VLD3_DUP))] "TARGET_NEON" @@ -4743,11 +4740,11 @@ ops[1] = gen_rtx_REG (DImode, regno + 2); ops[2] = gen_rtx_REG (DImode, regno + 4); ops[3] = operands[1]; - output_asm_insn ("vld3.\t{%P0[], %P1[], %P2[]}, [%3]", ops); + output_asm_insn ("vld3.\t{%P0[], %P1[], %P2[]}, %A3", ops); return ""; } else - return "vld1.\t%h0, [%1]"; + return "vld1.\t%h0, %A1"; } [(set (attr "neon_type") (if_then_else (gt (const_string "") (const_string "1")) @@ -4755,16 +4752,16 @@ (const_string "neon_vld1_1_2_regs")))]) (define_insn "neon_vst3" - [(set (mem:EI (match_operand:SI 0 "s_register_operand" "r")) + [(set (match_operand:EI 0 "neon_struct_operand" "=Um") (unspec:EI [(match_operand:EI 1 "s_register_operand" "w") (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] UNSPEC_VST3))] "TARGET_NEON" { if ( == 64) - return "vst1.64\t%h1, [%0]"; + return "vst1.64\t%h1, %A0"; else - return "vst3.\t%h1, [%0]"; + return "vst3.\t%h1, %A0"; } [(set (attr "neon_type") (if_then_else (eq (const_string "") (const_string "64")) @@ -4772,62 +4769,60 @@ (const_string "neon_vst2_4_regs_vst3_vst4")))]) (define_expand "neon_vst3" - [(match_operand:SI 0 "s_register_operand" "+r") - (match_operand:CI 1 "s_register_operand" "w") + [(match_operand:CI 0 "neon_struct_operand") + (match_operand:CI 1 "s_register_operand") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_NEON" { - emit_insn (gen_neon_vst3qa (operands[0], operands[0], operands[1])); - emit_insn (gen_neon_vst3qb (operands[0], operands[0], operands[1])); + rtx mem; + + mem = adjust_address (operands[0], EImode, 0); + emit_insn (gen_neon_vst3qa (mem, operands[1])); + mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode)); + emit_insn (gen_neon_vst3qb (mem, operands[1])); DONE; }) (define_insn "neon_vst3qa" - [(set (mem:EI (match_operand:SI 1 "s_register_operand" "0")) - (unspec:EI [(match_operand:CI 2 "s_register_operand" "w") + [(set (match_operand:EI 0 "neon_struct_operand" "=Um") + (unspec:EI [(match_operand:CI 1 "s_register_operand" "w") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VST3A)) - (set (match_operand:SI 0 "s_register_operand" "=r") - (plus:SI (match_dup 1) - (const_int 24)))] + UNSPEC_VST3A))] "TARGET_NEON" { - int regno = REGNO (operands[2]); + int regno = REGNO (operands[1]); rtx ops[4]; ops[0] = operands[0]; ops[1] = gen_rtx_REG (DImode, regno); ops[2] = gen_rtx_REG (DImode, regno + 4); ops[3] = gen_rtx_REG (DImode, regno + 8); - output_asm_insn ("vst3.\t{%P1, %P2, %P3}, [%0]!", ops); + output_asm_insn ("vst3.\t{%P1, %P2, %P3}, %A0", ops); return ""; } [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")] ) (define_insn "neon_vst3qb" - [(set (mem:EI (match_operand:SI 1 "s_register_operand" "0")) - (unspec:EI [(match_operand:CI 2 "s_register_operand" "w") + [(set (match_operand:EI 0 "neon_struct_operand" "=Um") + (unspec:EI [(match_operand:CI 1 "s_register_operand" "w") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VST3B)) - (set (match_operand:SI 0 "s_register_operand" "=r") - (plus:SI (match_dup 1) - (const_int 24)))] + UNSPEC_VST3B))] "TARGET_NEON" { - int regno = REGNO (operands[2]); + int regno = REGNO (operands[1]); rtx ops[4]; ops[0] = operands[0]; ops[1] = gen_rtx_REG (DImode, regno + 2); ops[2] = gen_rtx_REG (DImode, regno + 6); ops[3] = gen_rtx_REG (DImode, regno + 10); - output_asm_insn ("vst3.\t{%P1, %P2, %P3}, [%0]!", ops); + output_asm_insn ("vst3.\t{%P1, %P2, %P3}, %A0", ops); return ""; } [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")] ) (define_insn "neon_vst3_lane" - [(set (mem: (match_operand:SI 0 "s_register_operand" "r")) + [(set (match_operand: 0 "neon_struct_operand" "=Um") (unspec: [(match_operand:EI 1 "s_register_operand" "w") (match_operand:SI 2 "immediate_operand" "i") @@ -4846,7 +4841,7 @@ ops[2] = gen_rtx_REG (DImode, regno + 2); ops[3] = gen_rtx_REG (DImode, regno + 4); ops[4] = operands[2]; - output_asm_insn ("vst3.\t{%P1[%c4], %P2[%c4], %P3[%c4]}, [%0]", + output_asm_insn ("vst3.\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %A0", ops); return ""; } @@ -4854,7 +4849,7 @@ ) (define_insn "neon_vst3_lane" - [(set (mem: (match_operand:SI 0 "s_register_operand" "r")) + [(set (match_operand: 0 "neon_struct_operand" "=Um") (unspec: [(match_operand:CI 1 "s_register_operand" "w") (match_operand:SI 2 "immediate_operand" "i") @@ -4878,7 +4873,7 @@ ops[2] = gen_rtx_REG (DImode, regno + 4); ops[3] = gen_rtx_REG (DImode, regno + 8); ops[4] = GEN_INT (lane); - output_asm_insn ("vst3.\t{%P1[%c4], %P2[%c4], %P3[%c4]}, [%0]", + output_asm_insn ("vst3.\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %A0", ops); return ""; } @@ -4886,15 +4881,15 @@ (define_insn "neon_vld4" [(set (match_operand:OI 0 "s_register_operand" "=w") - (unspec:OI [(mem:OI (match_operand:SI 1 "s_register_operand" "r")) + (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um") (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] UNSPEC_VLD4))] "TARGET_NEON" { if ( == 64) - return "vld1.64\t%h0, [%1]"; + return "vld1.64\t%h0, %A1"; else - return "vld4.\t%h0, [%1]"; + return "vld4.\t%h0, %A1"; } [(set (attr "neon_type") (if_then_else (eq (const_string "") (const_string "64")) @@ -4903,25 +4898,25 @@ ) (define_expand "neon_vld4" - [(match_operand:XI 0 "s_register_operand" "=w") - (match_operand:SI 1 "s_register_operand" "+r") + [(match_operand:XI 0 "s_register_operand") + (match_operand:XI 1 "neon_struct_operand") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_NEON" { - emit_insn (gen_neon_vld4qa (operands[0], operands[1], operands[1])); - emit_insn (gen_neon_vld4qb (operands[0], operands[0], - operands[1], operands[1])); + rtx mem; + + mem = adjust_address (operands[1], OImode, 0); + emit_insn (gen_neon_vld4qa (operands[0], mem)); + mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode)); + emit_insn (gen_neon_vld4qb (operands[0], mem, operands[0])); DONE; }) (define_insn "neon_vld4qa" [(set (match_operand:XI 0 "s_register_operand" "=w") - (unspec:XI [(mem:XI (match_operand:SI 2 "s_register_operand" "1")) + (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VLD4A)) - (set (match_operand:SI 1 "s_register_operand" "=r") - (plus:SI (match_dup 2) - (const_int 32)))] + UNSPEC_VLD4A))] "TARGET_NEON" { int regno = REGNO (operands[0]); @@ -4931,7 +4926,7 @@ ops[2] = gen_rtx_REG (DImode, regno + 8); ops[3] = gen_rtx_REG (DImode, regno + 12); ops[4] = operands[1]; - output_asm_insn ("vld4.\t{%P0, %P1, %P2, %P3}, [%4]!", ops); + output_asm_insn ("vld4.\t{%P0, %P1, %P2, %P3}, %A4", ops); return ""; } [(set_attr "neon_type" "neon_vld3_vld4")] @@ -4939,13 +4934,10 @@ (define_insn "neon_vld4qb" [(set (match_operand:XI 0 "s_register_operand" "=w") - (unspec:XI [(mem:XI (match_operand:SI 3 "s_register_operand" "2")) - (match_operand:XI 1 "s_register_operand" "0") + (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um") + (match_operand:XI 2 "s_register_operand" "0") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VLD4B)) - (set (match_operand:SI 2 "s_register_operand" "=r") - (plus:SI (match_dup 3) - (const_int 32)))] + UNSPEC_VLD4B))] "TARGET_NEON" { int regno = REGNO (operands[0]); @@ -4954,8 +4946,8 @@ ops[1] = gen_rtx_REG (DImode, regno + 6); ops[2] = gen_rtx_REG (DImode, regno + 10); ops[3] = gen_rtx_REG (DImode, regno + 14); - ops[4] = operands[2]; - output_asm_insn ("vld4.\t{%P0, %P1, %P2, %P3}, [%4]!", ops); + ops[4] = operands[1]; + output_asm_insn ("vld4.\t{%P0, %P1, %P2, %P3}, %A4", ops); return ""; } [(set_attr "neon_type" "neon_vld3_vld4")] @@ -4963,7 +4955,7 @@ (define_insn "neon_vld4_lane" [(set (match_operand:OI 0 "s_register_operand" "=w") - (unspec:OI [(mem: (match_operand:SI 1 "s_register_operand" "r")) + (unspec:OI [(match_operand: 1 "neon_struct_operand" "Um") (match_operand:OI 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i") (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] @@ -4982,7 +4974,7 @@ ops[3] = gen_rtx_REG (DImode, regno + 6); ops[4] = operands[1]; ops[5] = operands[3]; - output_asm_insn ("vld4.\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, [%4]", + output_asm_insn ("vld4.\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4", ops); return ""; } @@ -4991,7 +4983,7 @@ (define_insn "neon_vld4_lane" [(set (match_operand:XI 0 "s_register_operand" "=w") - (unspec:XI [(mem: (match_operand:SI 1 "s_register_operand" "r")) + (unspec:XI [(match_operand: 1 "neon_struct_operand" "Um") (match_operand:XI 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i") (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] @@ -5015,7 +5007,7 @@ ops[3] = gen_rtx_REG (DImode, regno + 12); ops[4] = operands[1]; ops[5] = GEN_INT (lane); - output_asm_insn ("vld4.\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, [%4]", + output_asm_insn ("vld4.\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4", ops); return ""; } @@ -5024,7 +5016,7 @@ (define_insn "neon_vld4_dup" [(set (match_operand:OI 0 "s_register_operand" "=w") - (unspec:OI [(mem: (match_operand:SI 1 "s_register_operand" "r")) + (unspec:OI [(match_operand: 1 "neon_struct_operand" "Um") (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] UNSPEC_VLD4_DUP))] "TARGET_NEON" @@ -5038,12 +5030,12 @@ ops[2] = gen_rtx_REG (DImode, regno + 4); ops[3] = gen_rtx_REG (DImode, regno + 6); ops[4] = operands[1]; - output_asm_insn ("vld4.\t{%P0[], %P1[], %P2[], %P3[]}, [%4]", + output_asm_insn ("vld4.\t{%P0[], %P1[], %P2[], %P3[]}, %A4", ops); return ""; } else - return "vld1.\t%h0, [%1]"; + return "vld1.\t%h0, %A1"; } [(set (attr "neon_type") (if_then_else (gt (const_string "") (const_string "1")) @@ -5052,16 +5044,16 @@ ) (define_insn "neon_vst4" - [(set (mem:OI (match_operand:SI 0 "s_register_operand" "r")) + [(set (match_operand:OI 0 "neon_struct_operand" "=Um") (unspec:OI [(match_operand:OI 1 "s_register_operand" "w") (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] UNSPEC_VST4))] "TARGET_NEON" { if ( == 64) - return "vst1.64\t%h1, [%0]"; + return "vst1.64\t%h1, %A0"; else - return "vst4.\t%h1, [%0]"; + return "vst4.\t%h1, %A0"; } [(set (attr "neon_type") (if_then_else (eq (const_string "") (const_string "64")) @@ -5070,64 +5062,62 @@ ) (define_expand "neon_vst4" - [(match_operand:SI 0 "s_register_operand" "+r") - (match_operand:XI 1 "s_register_operand" "w") + [(match_operand:XI 0 "neon_struct_operand") + (match_operand:XI 1 "s_register_operand") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_NEON" { - emit_insn (gen_neon_vst4qa (operands[0], operands[0], operands[1])); - emit_insn (gen_neon_vst4qb (operands[0], operands[0], operands[1])); + rtx mem; + + mem = adjust_address (operands[0], OImode, 0); + emit_insn (gen_neon_vst4qa (mem, operands[1])); + mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode)); + emit_insn (gen_neon_vst4qb (mem, operands[1])); DONE; }) (define_insn "neon_vst4qa" - [(set (mem:OI (match_operand:SI 1 "s_register_operand" "0")) - (unspec:OI [(match_operand:XI 2 "s_register_operand" "w") + [(set (match_operand:OI 0 "neon_struct_operand" "=Um") + (unspec:OI [(match_operand:XI 1 "s_register_operand" "w") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VST4A)) - (set (match_operand:SI 0 "s_register_operand" "=r") - (plus:SI (match_dup 1) - (const_int 32)))] + UNSPEC_VST4A))] "TARGET_NEON" { - int regno = REGNO (operands[2]); + int regno = REGNO (operands[1]); rtx ops[5]; ops[0] = operands[0]; ops[1] = gen_rtx_REG (DImode, regno); ops[2] = gen_rtx_REG (DImode, regno + 4); ops[3] = gen_rtx_REG (DImode, regno + 8); ops[4] = gen_rtx_REG (DImode, regno + 12); - output_asm_insn ("vst4.\t{%P1, %P2, %P3, %P4}, [%0]!", ops); + output_asm_insn ("vst4.\t{%P1, %P2, %P3, %P4}, %A0", ops); return ""; } [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")] ) (define_insn "neon_vst4qb" - [(set (mem:OI (match_operand:SI 1 "s_register_operand" "0")) - (unspec:OI [(match_operand:XI 2 "s_register_operand" "w") + [(set (match_operand:OI 0 "neon_struct_operand" "=Um") + (unspec:OI [(match_operand:XI 1 "s_register_operand" "w") (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VST4B)) - (set (match_operand:SI 0 "s_register_operand" "=r") - (plus:SI (match_dup 1) - (const_int 32)))] + UNSPEC_VST4B))] "TARGET_NEON" { - int regno = REGNO (operands[2]); + int regno = REGNO (operands[1]); rtx ops[5]; ops[0] = operands[0]; ops[1] = gen_rtx_REG (DImode, regno + 2); ops[2] = gen_rtx_REG (DImode, regno + 6); ops[3] = gen_rtx_REG (DImode, regno + 10); ops[4] = gen_rtx_REG (DImode, regno + 14); - output_asm_insn ("vst4.\t{%P1, %P2, %P3, %P4}, [%0]!", ops); + output_asm_insn ("vst4.\t{%P1, %P2, %P3, %P4}, %A0", ops); return ""; } [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")] ) (define_insn "neon_vst4_lane" - [(set (mem: (match_operand:SI 0 "s_register_operand" "r")) + [(set (match_operand: 0 "neon_struct_operand" "=Um") (unspec: [(match_operand:OI 1 "s_register_operand" "w") (match_operand:SI 2 "immediate_operand" "i") @@ -5147,7 +5137,7 @@ ops[3] = gen_rtx_REG (DImode, regno + 4); ops[4] = gen_rtx_REG (DImode, regno + 6); ops[5] = operands[2]; - output_asm_insn ("vst4.\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, [%0]", + output_asm_insn ("vst4.\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0", ops); return ""; } @@ -5155,7 +5145,7 @@ ) (define_insn "neon_vst4_lane" - [(set (mem: (match_operand:SI 0 "s_register_operand" "r")) + [(set (match_operand: 0 "neon_struct_operand" "=Um") (unspec: [(match_operand:XI 1 "s_register_operand" "w") (match_operand:SI 2 "immediate_operand" "i") @@ -5180,7 +5170,7 @@ ops[3] = gen_rtx_REG (DImode, regno + 8); ops[4] = gen_rtx_REG (DImode, regno + 12); ops[5] = GEN_INT (lane); - output_asm_insn ("vst4.\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, [%0]", + output_asm_insn ("vst4.\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0", ops); return ""; } diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md index 40ce1f3..891a974 100644 --- a/gcc/config/arm/predicates.md +++ b/gcc/config/arm/predicates.md @@ -683,3 +683,7 @@ } return true; }) + +(define_special_predicate "neon_struct_operand" + (and (match_code "mem") + (match_test "TARGET_32BIT && neon_vector_mem_operand (op, 2)"))) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3eb7c49..b3fe075 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2011-04-12 Richard Sandiford + + * gcc.target/arm/neon-vld3-1.c: New test. + * gcc.target/arm/neon-vst3-1.c: New test. + * gcc.target/arm/neon/v*.c: Regenerate. + 2011-04-12 Jakub Jelinek PR rtl-optimization/48549 diff --git a/gcc/testsuite/gcc.target/arm/neon-vld3-1.c b/gcc/testsuite/gcc.target/arm/neon-vld3-1.c new file mode 100644 index 0000000..0cc5c88 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vld3-1.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O2" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" + +uint32_t buffer[12]; + +void __attribute__((noinline)) +foo (uint32_t *a) +{ + uint32x4x3_t x; + + x = vld3q_u32 (a); + x.val[0] = vaddq_u32 (x.val[0], x.val[1]); + vst3q_u32 (a, x); +} + +int +main (void) +{ + buffer[0] = 1; + buffer[1] = 2; + foo (buffer); + return buffer[0] != 3; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vst3-1.c b/gcc/testsuite/gcc.target/arm/neon-vst3-1.c new file mode 100644 index 0000000..a3bee6c --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vst3-1.c @@ -0,0 +1,25 @@ +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O2" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" + +uint32_t buffer[64]; + +void __attribute__((noinline)) +foo (uint32_t *a) +{ + uint32x4x3_t x; + + x = vld3q_u32 (a); + a[35] = 1; + vst3q_lane_u32 (a + 32, x, 1); +} + +int +main (void) +{ + foo (buffer); + return buffer[35] != 1; +} diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c index 073d88f..fa9cf20 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c @@ -15,5 +15,5 @@ void test_vld1Q_dupf32 (void) out_float32x4_t = vld1q_dup_f32 (0); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c index 1202e92..4e83038 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c @@ -15,5 +15,5 @@ void test_vld1Q_dupp16 (void) out_poly16x8_t = vld1q_dup_p16 (0); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c index 27d7550..70fb898 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c @@ -15,5 +15,5 @@ void test_vld1Q_dupp8 (void) out_poly8x16_t = vld1q_dup_p8 (0); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c index df1e008..1fedcf9 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c @@ -15,5 +15,5 @@ void test_vld1Q_dups16 (void) out_int16x8_t = vld1q_dup_s16 (0); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c index b371299..2abd4e4 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c @@ -15,5 +15,5 @@ void test_vld1Q_dups32 (void) out_int32x4_t = vld1q_dup_s32 (0); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c index b4c3a8c..912b93d 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c @@ -15,5 +15,5 @@ void test_vld1Q_dups64 (void) out_int64x2_t = vld1q_dup_s64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c index badeb3b..e431a5c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c @@ -15,5 +15,5 @@ void test_vld1Q_dups8 (void) out_int8x16_t = vld1q_dup_s8 (0); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c index d247fea..6da7567 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c @@ -15,5 +15,5 @@ void test_vld1Q_dupu16 (void) out_uint16x8_t = vld1q_dup_u16 (0); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c index 1160f98..8e400bd 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c @@ -15,5 +15,5 @@ void test_vld1Q_dupu32 (void) out_uint32x4_t = vld1q_dup_u32 (0); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c index 8cbc89c..234db40 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c @@ -15,5 +15,5 @@ void test_vld1Q_dupu64 (void) out_uint64x2_t = vld1q_dup_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c index c6d52a3..b1e540d 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c @@ -15,5 +15,5 @@ void test_vld1Q_dupu8 (void) out_uint8x16_t = vld1q_dup_u8 (0); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c index bccdd26..8c7689e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c @@ -16,5 +16,5 @@ void test_vld1Q_lanef32 (void) out_float32x4_t = vld1q_lane_f32 (0, arg1_float32x4_t, 1); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c index f080107..163c2a7 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c @@ -16,5 +16,5 @@ void test_vld1Q_lanep16 (void) out_poly16x8_t = vld1q_lane_p16 (0, arg1_poly16x8_t, 1); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c index 4887ebc..7f7a22e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c @@ -16,5 +16,5 @@ void test_vld1Q_lanep8 (void) out_poly8x16_t = vld1q_lane_p8 (0, arg1_poly8x16_t, 1); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c index aeb824c..0d56492 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c @@ -16,5 +16,5 @@ void test_vld1Q_lanes16 (void) out_int16x8_t = vld1q_lane_s16 (0, arg1_int16x8_t, 1); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c index 90556ac..3c5869f 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c @@ -16,5 +16,5 @@ void test_vld1Q_lanes32 (void) out_int32x4_t = vld1q_lane_s32 (0, arg1_int32x4_t, 1); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c index db68bd0..154583b 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c @@ -16,5 +16,5 @@ void test_vld1Q_lanes64 (void) out_int64x2_t = vld1q_lane_s64 (0, arg1_int64x2_t, 1); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c index 3494c07..a6aa3f8 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c @@ -16,5 +16,5 @@ void test_vld1Q_lanes8 (void) out_int8x16_t = vld1q_lane_s8 (0, arg1_int8x16_t, 1); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c index eb791e7..1653dd3 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c @@ -16,5 +16,5 @@ void test_vld1Q_laneu16 (void) out_uint16x8_t = vld1q_lane_u16 (0, arg1_uint16x8_t, 1); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c index 3841c9b..034e24d 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c @@ -16,5 +16,5 @@ void test_vld1Q_laneu32 (void) out_uint32x4_t = vld1q_lane_u32 (0, arg1_uint32x4_t, 1); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c index 082e6a6..ff92e91 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c @@ -16,5 +16,5 @@ void test_vld1Q_laneu64 (void) out_uint64x2_t = vld1q_lane_u64 (0, arg1_uint64x2_t, 1); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c index 194f749..be338f1 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c @@ -16,5 +16,5 @@ void test_vld1Q_laneu8 (void) out_uint8x16_t = vld1q_lane_u8 (0, arg1_uint8x16_t, 1); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c index 1c84b91..d792148 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c @@ -15,5 +15,5 @@ void test_vld1Qf32 (void) out_float32x4_t = vld1q_f32 (0); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c index f470da6..84bceb5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c @@ -15,5 +15,5 @@ void test_vld1Qp16 (void) out_poly16x8_t = vld1q_p16 (0); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c index a46d48b..e756b1b 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c @@ -15,5 +15,5 @@ void test_vld1Qp8 (void) out_poly8x16_t = vld1q_p8 (0); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c index 39ab3fe..aaa29e9 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c @@ -15,5 +15,5 @@ void test_vld1Qs16 (void) out_int16x8_t = vld1q_s16 (0); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c index e12e8d9..14bc422 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c @@ -15,5 +15,5 @@ void test_vld1Qs32 (void) out_int32x4_t = vld1q_s32 (0); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c index 1c6aca4..093aee6 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c @@ -15,5 +15,5 @@ void test_vld1Qs64 (void) out_int64x2_t = vld1q_s64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c index 64e6b00..d4fffd0 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c @@ -15,5 +15,5 @@ void test_vld1Qs8 (void) out_int8x16_t = vld1q_s8 (0); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c index 191deb0..267f7d1 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c @@ -15,5 +15,5 @@ void test_vld1Qu16 (void) out_uint16x8_t = vld1q_u16 (0); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c index e3e01a6..53ccab0 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c @@ -15,5 +15,5 @@ void test_vld1Qu32 (void) out_uint32x4_t = vld1q_u32 (0); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c index 24b55ba..56b0dbd 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c @@ -15,5 +15,5 @@ void test_vld1Qu64 (void) out_uint64x2_t = vld1q_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c index 47e6ad0..d68fc89 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c @@ -15,5 +15,5 @@ void test_vld1Qu8 (void) out_uint8x16_t = vld1q_u8 (0); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c index 41eec0e..6f8435b 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c @@ -15,5 +15,5 @@ void test_vld1_dupf32 (void) out_float32x2_t = vld1_dup_f32 (0); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c index b38b29c..1287b47 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c @@ -15,5 +15,5 @@ void test_vld1_dupp16 (void) out_poly16x4_t = vld1_dup_p16 (0); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c index 69017c4..8fde645 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c @@ -15,5 +15,5 @@ void test_vld1_dupp8 (void) out_poly8x8_t = vld1_dup_p8 (0); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c index 61e0377..084f89e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c @@ -15,5 +15,5 @@ void test_vld1_dups16 (void) out_int16x4_t = vld1_dup_s16 (0); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c index 0429ee5..ba6697a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c @@ -15,5 +15,5 @@ void test_vld1_dups32 (void) out_int32x2_t = vld1_dup_s32 (0); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c index 90ee403..410ee6f 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c @@ -15,5 +15,5 @@ void test_vld1_dups64 (void) out_int64x1_t = vld1_dup_s64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c index aacac04..18b21b5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c @@ -15,5 +15,5 @@ void test_vld1_dups8 (void) out_int8x8_t = vld1_dup_s8 (0); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c index 64d7362..1d893cd 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c @@ -15,5 +15,5 @@ void test_vld1_dupu16 (void) out_uint16x4_t = vld1_dup_u16 (0); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c index 6f3fd96..f640846 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c @@ -15,5 +15,5 @@ void test_vld1_dupu32 (void) out_uint32x2_t = vld1_dup_u32 (0); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c index 262147d..17be90a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c @@ -15,5 +15,5 @@ void test_vld1_dupu64 (void) out_uint64x1_t = vld1_dup_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c index 6038bec..5811f25 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c @@ -15,5 +15,5 @@ void test_vld1_dupu8 (void) out_uint8x8_t = vld1_dup_u8 (0); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c index 3d4b0a4..6165897 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c @@ -16,5 +16,5 @@ void test_vld1_lanef32 (void) out_float32x2_t = vld1_lane_f32 (0, arg1_float32x2_t, 1); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c index 832abbd..feecf1b 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c @@ -16,5 +16,5 @@ void test_vld1_lanep16 (void) out_poly16x4_t = vld1_lane_p16 (0, arg1_poly16x4_t, 1); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c index 04823322..0d17299 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c @@ -16,5 +16,5 @@ void test_vld1_lanep8 (void) out_poly8x8_t = vld1_lane_p8 (0, arg1_poly8x8_t, 1); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c index 571f876..2627241 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c @@ -16,5 +16,5 @@ void test_vld1_lanes16 (void) out_int16x4_t = vld1_lane_s16 (0, arg1_int16x4_t, 1); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c index 057a7ff..39575d4 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c @@ -16,5 +16,5 @@ void test_vld1_lanes32 (void) out_int32x2_t = vld1_lane_s32 (0, arg1_int32x2_t, 1); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c index 1e46d6a..1216405 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c @@ -16,5 +16,5 @@ void test_vld1_lanes64 (void) out_int64x1_t = vld1_lane_s64 (0, arg1_int64x1_t, 0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c index eeebc9b..7c763fd 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c @@ -16,5 +16,5 @@ void test_vld1_lanes8 (void) out_int8x8_t = vld1_lane_s8 (0, arg1_int8x8_t, 1); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c index 116a35f..9d2c45e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c @@ -16,5 +16,5 @@ void test_vld1_laneu16 (void) out_uint16x4_t = vld1_lane_u16 (0, arg1_uint16x4_t, 1); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c index f4907d2..3a7f3ee 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c @@ -16,5 +16,5 @@ void test_vld1_laneu32 (void) out_uint32x2_t = vld1_lane_u32 (0, arg1_uint32x2_t, 1); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c index b5058b0..b9e5d20 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c @@ -16,5 +16,5 @@ void test_vld1_laneu64 (void) out_uint64x1_t = vld1_lane_u64 (0, arg1_uint64x1_t, 0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c index caa08f6..7e4835a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c @@ -16,5 +16,5 @@ void test_vld1_laneu8 (void) out_uint8x8_t = vld1_lane_u8 (0, arg1_uint8x8_t, 1); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1f32.c b/gcc/testsuite/gcc.target/arm/neon/vld1f32.c index 17deac9..2d90ac5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1f32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1f32.c @@ -15,5 +15,5 @@ void test_vld1f32 (void) out_float32x2_t = vld1_f32 (0); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p16.c b/gcc/testsuite/gcc.target/arm/neon/vld1p16.c index ef2e73a..62aa89e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1p16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1p16.c @@ -15,5 +15,5 @@ void test_vld1p16 (void) out_poly16x4_t = vld1_p16 (0); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p8.c b/gcc/testsuite/gcc.target/arm/neon/vld1p8.c index 048bdeb..60e47c2 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1p8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1p8.c @@ -15,5 +15,5 @@ void test_vld1p8 (void) out_poly8x8_t = vld1_p8 (0); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s16.c b/gcc/testsuite/gcc.target/arm/neon/vld1s16.c index 39e12d7..1d4cf52 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1s16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1s16.c @@ -15,5 +15,5 @@ void test_vld1s16 (void) out_int16x4_t = vld1_s16 (0); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s32.c b/gcc/testsuite/gcc.target/arm/neon/vld1s32.c index 80fbfd0..7af67c3 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1s32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1s32.c @@ -15,5 +15,5 @@ void test_vld1s32 (void) out_int32x2_t = vld1_s32 (0); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s64.c b/gcc/testsuite/gcc.target/arm/neon/vld1s64.c index 3ea125d..dadb9de 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1s64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1s64.c @@ -15,5 +15,5 @@ void test_vld1s64 (void) out_int64x1_t = vld1_s64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s8.c b/gcc/testsuite/gcc.target/arm/neon/vld1s8.c index 599c323..c27ebcd 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1s8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1s8.c @@ -15,5 +15,5 @@ void test_vld1s8 (void) out_int8x8_t = vld1_s8 (0); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u16.c b/gcc/testsuite/gcc.target/arm/neon/vld1u16.c index 550ca11..f973d6e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1u16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1u16.c @@ -15,5 +15,5 @@ void test_vld1u16 (void) out_uint16x4_t = vld1_u16 (0); } -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u32.c b/gcc/testsuite/gcc.target/arm/neon/vld1u32.c index e0b673c..4b455b2 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1u32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1u32.c @@ -15,5 +15,5 @@ void test_vld1u32 (void) out_uint32x2_t = vld1_u32 (0); } -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u64.c b/gcc/testsuite/gcc.target/arm/neon/vld1u64.c index eba002c..1504215 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1u64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1u64.c @@ -15,5 +15,5 @@ void test_vld1u64 (void) out_uint64x1_t = vld1_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u8.c b/gcc/testsuite/gcc.target/arm/neon/vld1u8.c index a63bcf2..600d035 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1u8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1u8.c @@ -15,5 +15,5 @@ void test_vld1u8 (void) out_uint8x8_t = vld1_u8 (0); } -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c index de05fd7..9afbbec 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c @@ -16,5 +16,5 @@ void test_vld2Q_lanef32 (void) out_float32x4x2_t = vld2q_lane_f32 (0, arg1_float32x4x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c index 30dd2d9..e1b85aa 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c @@ -16,5 +16,5 @@ void test_vld2Q_lanep16 (void) out_poly16x8x2_t = vld2q_lane_p16 (0, arg1_poly16x8x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c index bc256dd..467c02b 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c @@ -16,5 +16,5 @@ void test_vld2Q_lanes16 (void) out_int16x8x2_t = vld2q_lane_s16 (0, arg1_int16x8x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c index bf184df..5f9c4a8 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c @@ -16,5 +16,5 @@ void test_vld2Q_lanes32 (void) out_int32x4x2_t = vld2q_lane_s32 (0, arg1_int32x4x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c index 37919be..8515729 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c @@ -16,5 +16,5 @@ void test_vld2Q_laneu16 (void) out_uint16x8x2_t = vld2q_lane_u16 (0, arg1_uint16x8x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c index d42638c..65ec23a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c @@ -16,5 +16,5 @@ void test_vld2Q_laneu32 (void) out_uint32x4x2_t = vld2q_lane_u32 (0, arg1_uint32x4x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c index 6e7d1d3..afde42c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c @@ -15,6 +15,6 @@ void test_vld2Qf32 (void) out_float32x4x2_t = vld2q_f32 (0); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c index 18ee431..f740046 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c @@ -15,6 +15,6 @@ void test_vld2Qp16 (void) out_poly16x8x2_t = vld2q_p16 (0); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c index 4751de7..9e4ff25 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c @@ -15,6 +15,6 @@ void test_vld2Qp8 (void) out_poly8x16x2_t = vld2q_p8 (0); } -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c index 638f24a..97c8a2c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c @@ -15,6 +15,6 @@ void test_vld2Qs16 (void) out_int16x8x2_t = vld2q_s16 (0); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c index 51d7dc8..cd03e17 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c @@ -15,6 +15,6 @@ void test_vld2Qs32 (void) out_int32x4x2_t = vld2q_s32 (0); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c index b3fb47d..b33a5a8 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c @@ -15,6 +15,6 @@ void test_vld2Qs8 (void) out_int8x16x2_t = vld2q_s8 (0); } -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c index 7955de6..76169af 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c @@ -15,6 +15,6 @@ void test_vld2Qu16 (void) out_uint16x8x2_t = vld2q_u16 (0); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c index 6099c06..347e164 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c @@ -15,6 +15,6 @@ void test_vld2Qu32 (void) out_uint32x4x2_t = vld2q_u32 (0); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c index 82632ed..3b738a7 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c @@ -15,6 +15,6 @@ void test_vld2Qu8 (void) out_uint8x16x2_t = vld2q_u8 (0); } -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c index aa74e38..54fbd3d 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c @@ -15,5 +15,5 @@ void test_vld2_dupf32 (void) out_float32x2x2_t = vld2_dup_f32 (0); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c index 71be4c1..b5ec4e2 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c @@ -15,5 +15,5 @@ void test_vld2_dupp16 (void) out_poly16x4x2_t = vld2_dup_p16 (0); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c index 17d4ec1..2ad81b5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c @@ -15,5 +15,5 @@ void test_vld2_dupp8 (void) out_poly8x8x2_t = vld2_dup_p8 (0); } -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c index 128e715..43b245d 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c @@ -15,5 +15,5 @@ void test_vld2_dups16 (void) out_int16x4x2_t = vld2_dup_s16 (0); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c index 41461be..51e4fc8 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c @@ -15,5 +15,5 @@ void test_vld2_dups32 (void) out_int32x2x2_t = vld2_dup_s32 (0); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c index e9d4b53..644db84 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c @@ -15,5 +15,5 @@ void test_vld2_dups64 (void) out_int64x1x2_t = vld2_dup_s64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c index 8b3f7979..0159233 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c @@ -15,5 +15,5 @@ void test_vld2_dups8 (void) out_int8x8x2_t = vld2_dup_s8 (0); } -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c index 6b9df90..85bbc46 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c @@ -15,5 +15,5 @@ void test_vld2_dupu16 (void) out_uint16x4x2_t = vld2_dup_u16 (0); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c index d34acec..3549fde 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c @@ -15,5 +15,5 @@ void test_vld2_dupu32 (void) out_uint32x2x2_t = vld2_dup_u32 (0); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c index 16b0465..a830f83 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c @@ -15,5 +15,5 @@ void test_vld2_dupu64 (void) out_uint64x1x2_t = vld2_dup_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c index 94c80a9..c3763c8 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c @@ -15,5 +15,5 @@ void test_vld2_dupu8 (void) out_uint8x8x2_t = vld2_dup_u8 (0); } -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c index 2e02a28..f60279e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c @@ -16,5 +16,5 @@ void test_vld2_lanef32 (void) out_float32x2x2_t = vld2_lane_f32 (0, arg1_float32x2x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c index d52864b..0d7f415 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c @@ -16,5 +16,5 @@ void test_vld2_lanep16 (void) out_poly16x4x2_t = vld2_lane_p16 (0, arg1_poly16x4x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c index 07938a1..8174e7b 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c @@ -16,5 +16,5 @@ void test_vld2_lanep8 (void) out_poly8x8x2_t = vld2_lane_p8 (0, arg1_poly8x8x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c index c19aacf..5a1eb54 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c @@ -16,5 +16,5 @@ void test_vld2_lanes16 (void) out_int16x4x2_t = vld2_lane_s16 (0, arg1_int16x4x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c index 6394d9a..a663c52 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c @@ -16,5 +16,5 @@ void test_vld2_lanes32 (void) out_int32x2x2_t = vld2_lane_s32 (0, arg1_int32x2x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c index 603d323..073ba54 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c @@ -16,5 +16,5 @@ void test_vld2_lanes8 (void) out_int8x8x2_t = vld2_lane_s8 (0, arg1_int8x8x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c index e6a873b..7250b56 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c @@ -16,5 +16,5 @@ void test_vld2_laneu16 (void) out_uint16x4x2_t = vld2_lane_u16 (0, arg1_uint16x4x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c index 58e806f..9a46c65 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c @@ -16,5 +16,5 @@ void test_vld2_laneu32 (void) out_uint32x2x2_t = vld2_lane_u32 (0, arg1_uint32x2x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c index b662354..ba20071 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c @@ -16,5 +16,5 @@ void test_vld2_laneu8 (void) out_uint8x8x2_t = vld2_lane_u8 (0, arg1_uint8x8x2_t, 1); } -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2f32.c b/gcc/testsuite/gcc.target/arm/neon/vld2f32.c index 7597437..c790de9 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2f32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2f32.c @@ -15,5 +15,5 @@ void test_vld2f32 (void) out_float32x2x2_t = vld2_f32 (0); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p16.c b/gcc/testsuite/gcc.target/arm/neon/vld2p16.c index f166d35..4c4338c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2p16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2p16.c @@ -15,5 +15,5 @@ void test_vld2p16 (void) out_poly16x4x2_t = vld2_p16 (0); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p8.c b/gcc/testsuite/gcc.target/arm/neon/vld2p8.c index 612fab6..d319c22 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2p8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2p8.c @@ -15,5 +15,5 @@ void test_vld2p8 (void) out_poly8x8x2_t = vld2_p8 (0); } -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s16.c b/gcc/testsuite/gcc.target/arm/neon/vld2s16.c index 70f6af9..f725d79 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2s16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2s16.c @@ -15,5 +15,5 @@ void test_vld2s16 (void) out_int16x4x2_t = vld2_s16 (0); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s32.c b/gcc/testsuite/gcc.target/arm/neon/vld2s32.c index 4a84effc..3f417ee 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2s32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2s32.c @@ -15,5 +15,5 @@ void test_vld2s32 (void) out_int32x2x2_t = vld2_s32 (0); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s64.c b/gcc/testsuite/gcc.target/arm/neon/vld2s64.c index 0a388d0..b990089 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2s64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2s64.c @@ -15,5 +15,5 @@ void test_vld2s64 (void) out_int64x1x2_t = vld2_s64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s8.c b/gcc/testsuite/gcc.target/arm/neon/vld2s8.c index 110e883..1df9eee 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2s8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2s8.c @@ -15,5 +15,5 @@ void test_vld2s8 (void) out_int8x8x2_t = vld2_s8 (0); } -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u16.c b/gcc/testsuite/gcc.target/arm/neon/vld2u16.c index f2e721b..7440e0c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2u16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2u16.c @@ -15,5 +15,5 @@ void test_vld2u16 (void) out_uint16x4x2_t = vld2_u16 (0); } -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u32.c b/gcc/testsuite/gcc.target/arm/neon/vld2u32.c index f0f069e..940fd74 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2u32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2u32.c @@ -15,5 +15,5 @@ void test_vld2u32 (void) out_uint32x2x2_t = vld2_u32 (0); } -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u64.c b/gcc/testsuite/gcc.target/arm/neon/vld2u64.c index 1d2a3bc..35c046a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2u64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2u64.c @@ -15,5 +15,5 @@ void test_vld2u64 (void) out_uint64x1x2_t = vld2_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u8.c b/gcc/testsuite/gcc.target/arm/neon/vld2u8.c index eb0c5a6..2231e26c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld2u8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld2u8.c @@ -15,5 +15,5 @@ void test_vld2u8 (void) out_uint8x8x2_t = vld2_u8 (0); } -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c index 6c6f520..6bdc1e1 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c @@ -16,5 +16,5 @@ void test_vld3Q_lanef32 (void) out_float32x4x3_t = vld3q_lane_f32 (0, arg1_float32x4x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c index e4e60bc..12b3be0 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c @@ -16,5 +16,5 @@ void test_vld3Q_lanep16 (void) out_poly16x8x3_t = vld3q_lane_p16 (0, arg1_poly16x8x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c index 0456d3b..8ed21e3 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c @@ -16,5 +16,5 @@ void test_vld3Q_lanes16 (void) out_int16x8x3_t = vld3q_lane_s16 (0, arg1_int16x8x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c index fca11ae..af0118d 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c @@ -16,5 +16,5 @@ void test_vld3Q_lanes32 (void) out_int32x4x3_t = vld3q_lane_s32 (0, arg1_int32x4x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c index 56c94b2..7880b98 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c @@ -16,5 +16,5 @@ void test_vld3Q_laneu16 (void) out_uint16x8x3_t = vld3q_lane_u16 (0, arg1_uint16x8x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c index a73a5a2..0b1bce5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c @@ -16,5 +16,5 @@ void test_vld3Q_laneu32 (void) out_uint32x4x3_t = vld3q_lane_u32 (0, arg1_uint32x4x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c index 4589917..6f16d9d 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c @@ -15,6 +15,6 @@ void test_vld3Qf32 (void) out_float32x4x3_t = vld3q_f32 (0); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c index 8c3e5be..ff4ef86 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c @@ -15,6 +15,6 @@ void test_vld3Qp16 (void) out_poly16x8x3_t = vld3q_p16 (0); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c index 0197f51..a237493 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c @@ -15,6 +15,6 @@ void test_vld3Qp8 (void) out_poly8x16x3_t = vld3q_p8 (0); } -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c index ea77096..cfa0136 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c @@ -15,6 +15,6 @@ void test_vld3Qs16 (void) out_int16x8x3_t = vld3q_s16 (0); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c index 1089695..e1721ef 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c @@ -15,6 +15,6 @@ void test_vld3Qs32 (void) out_int32x4x3_t = vld3q_s32 (0); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c index ca389ad..9f762ca 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c @@ -15,6 +15,6 @@ void test_vld3Qs8 (void) out_int8x16x3_t = vld3q_s8 (0); } -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c index efef26f..a230872 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c @@ -15,6 +15,6 @@ void test_vld3Qu16 (void) out_uint16x8x3_t = vld3q_u16 (0); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c index 077533c..21f20f8 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c @@ -15,6 +15,6 @@ void test_vld3Qu32 (void) out_uint32x4x3_t = vld3q_u32 (0); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c index c8093b8..7cbcc46 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c @@ -15,6 +15,6 @@ void test_vld3Qu8 (void) out_uint8x16x3_t = vld3q_u8 (0); } -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c index e38a135..5423369 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c @@ -15,5 +15,5 @@ void test_vld3_dupf32 (void) out_float32x2x3_t = vld3_dup_f32 (0); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c index d9f3d14..6c08c83 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c @@ -15,5 +15,5 @@ void test_vld3_dupp16 (void) out_poly16x4x3_t = vld3_dup_p16 (0); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c index 43c7fe8..fd4a660 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c @@ -15,5 +15,5 @@ void test_vld3_dupp8 (void) out_poly8x8x3_t = vld3_dup_p8 (0); } -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c index 8fec7c5..4c11e7e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c @@ -15,5 +15,5 @@ void test_vld3_dups16 (void) out_int16x4x3_t = vld3_dup_s16 (0); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c index 1118d24..b500c24 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c @@ -15,5 +15,5 @@ void test_vld3_dups32 (void) out_int32x2x3_t = vld3_dup_s32 (0); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c index 2e49c0e..cf11f5c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c @@ -15,5 +15,5 @@ void test_vld3_dups64 (void) out_int64x1x3_t = vld3_dup_s64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c index 7327c9f..4f0c830 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c @@ -15,5 +15,5 @@ void test_vld3_dups8 (void) out_int8x8x3_t = vld3_dup_s8 (0); } -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c index d188fad..57e3597 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c @@ -15,5 +15,5 @@ void test_vld3_dupu16 (void) out_uint16x4x3_t = vld3_dup_u16 (0); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c index 17436e0..e4abde4 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c @@ -15,5 +15,5 @@ void test_vld3_dupu32 (void) out_uint32x2x3_t = vld3_dup_u32 (0); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c index cedf058..a917126 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c @@ -15,5 +15,5 @@ void test_vld3_dupu64 (void) out_uint64x1x3_t = vld3_dup_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c index 1ebe615..8426187 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c @@ -15,5 +15,5 @@ void test_vld3_dupu8 (void) out_uint8x8x3_t = vld3_dup_u8 (0); } -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c index 3ee94ed..ccbe45f 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c @@ -16,5 +16,5 @@ void test_vld3_lanef32 (void) out_float32x2x3_t = vld3_lane_f32 (0, arg1_float32x2x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c index 3c85988..94b4ce4 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c @@ -16,5 +16,5 @@ void test_vld3_lanep16 (void) out_poly16x4x3_t = vld3_lane_p16 (0, arg1_poly16x4x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c index f5f9761..12b0786 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c @@ -16,5 +16,5 @@ void test_vld3_lanep8 (void) out_poly8x8x3_t = vld3_lane_p8 (0, arg1_poly8x8x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c index 51cf8a3..5ab744f 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c @@ -16,5 +16,5 @@ void test_vld3_lanes16 (void) out_int16x4x3_t = vld3_lane_s16 (0, arg1_int16x4x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c index 59a29f7..168f3f3 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c @@ -16,5 +16,5 @@ void test_vld3_lanes32 (void) out_int32x2x3_t = vld3_lane_s32 (0, arg1_int32x2x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c index e4513ae..9d0d1a4 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c @@ -16,5 +16,5 @@ void test_vld3_lanes8 (void) out_int8x8x3_t = vld3_lane_s8 (0, arg1_int8x8x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c index 86a787c..baf97a9 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c @@ -16,5 +16,5 @@ void test_vld3_laneu16 (void) out_uint16x4x3_t = vld3_lane_u16 (0, arg1_uint16x4x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c index e4bca9e..05d7107 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c @@ -16,5 +16,5 @@ void test_vld3_laneu32 (void) out_uint32x2x3_t = vld3_lane_u32 (0, arg1_uint32x2x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c index 554178a..af75563 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c @@ -16,5 +16,5 @@ void test_vld3_laneu8 (void) out_uint8x8x3_t = vld3_lane_u8 (0, arg1_uint8x8x3_t, 1); } -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3f32.c b/gcc/testsuite/gcc.target/arm/neon/vld3f32.c index ba18fe0..120f834 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3f32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3f32.c @@ -15,5 +15,5 @@ void test_vld3f32 (void) out_float32x2x3_t = vld3_f32 (0); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p16.c b/gcc/testsuite/gcc.target/arm/neon/vld3p16.c index 513a3ad..2c47f5e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3p16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3p16.c @@ -15,5 +15,5 @@ void test_vld3p16 (void) out_poly16x4x3_t = vld3_p16 (0); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p8.c b/gcc/testsuite/gcc.target/arm/neon/vld3p8.c index c93984e..77c2462 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3p8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3p8.c @@ -15,5 +15,5 @@ void test_vld3p8 (void) out_poly8x8x3_t = vld3_p8 (0); } -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s16.c b/gcc/testsuite/gcc.target/arm/neon/vld3s16.c index f9e6212..355ede8 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3s16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3s16.c @@ -15,5 +15,5 @@ void test_vld3s16 (void) out_int16x4x3_t = vld3_s16 (0); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s32.c b/gcc/testsuite/gcc.target/arm/neon/vld3s32.c index cd12566..8d18a88 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3s32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3s32.c @@ -15,5 +15,5 @@ void test_vld3s32 (void) out_int32x2x3_t = vld3_s32 (0); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s64.c b/gcc/testsuite/gcc.target/arm/neon/vld3s64.c index 5a62f84..67bb356 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3s64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3s64.c @@ -15,5 +15,5 @@ void test_vld3s64 (void) out_int64x1x3_t = vld3_s64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s8.c b/gcc/testsuite/gcc.target/arm/neon/vld3s8.c index b3c3125..1be5d11 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3s8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3s8.c @@ -15,5 +15,5 @@ void test_vld3s8 (void) out_int8x8x3_t = vld3_s8 (0); } -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u16.c b/gcc/testsuite/gcc.target/arm/neon/vld3u16.c index 0cd5499..4db18f0 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3u16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3u16.c @@ -15,5 +15,5 @@ void test_vld3u16 (void) out_uint16x4x3_t = vld3_u16 (0); } -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u32.c b/gcc/testsuite/gcc.target/arm/neon/vld3u32.c index bdb66e0..82c10ff 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3u32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3u32.c @@ -15,5 +15,5 @@ void test_vld3u32 (void) out_uint32x2x3_t = vld3_u32 (0); } -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u64.c b/gcc/testsuite/gcc.target/arm/neon/vld3u64.c index ba9465d..bca1df4 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3u64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3u64.c @@ -15,5 +15,5 @@ void test_vld3u64 (void) out_uint64x1x3_t = vld3_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u8.c b/gcc/testsuite/gcc.target/arm/neon/vld3u8.c index ec6e2a4..c8ac20a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld3u8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld3u8.c @@ -15,5 +15,5 @@ void test_vld3u8 (void) out_uint8x8x3_t = vld3_u8 (0); } -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c index 9e596b7..5c2499c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c @@ -16,5 +16,5 @@ void test_vld4Q_lanef32 (void) out_float32x4x4_t = vld4q_lane_f32 (0, arg1_float32x4x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c index 3ca293a..1d2d84e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c @@ -16,5 +16,5 @@ void test_vld4Q_lanep16 (void) out_poly16x8x4_t = vld4q_lane_p16 (0, arg1_poly16x8x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c index f6de5e3..df23d28 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c @@ -16,5 +16,5 @@ void test_vld4Q_lanes16 (void) out_int16x8x4_t = vld4q_lane_s16 (0, arg1_int16x8x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c index 0c3c071..db1daff 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c @@ -16,5 +16,5 @@ void test_vld4Q_lanes32 (void) out_int32x4x4_t = vld4q_lane_s32 (0, arg1_int32x4x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c index 301cf8f..e2da0ea 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c @@ -16,5 +16,5 @@ void test_vld4Q_laneu16 (void) out_uint16x8x4_t = vld4q_lane_u16 (0, arg1_uint16x8x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c index 4ff7a9d..d2960ec 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c @@ -16,5 +16,5 @@ void test_vld4Q_laneu32 (void) out_uint32x4x4_t = vld4q_lane_u32 (0, arg1_uint32x4x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c index 2b59415..0a6e7e6 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c @@ -15,6 +15,6 @@ void test_vld4Qf32 (void) out_float32x4x4_t = vld4q_f32 (0); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c index 510e0f2..5d902f5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c @@ -15,6 +15,6 @@ void test_vld4Qp16 (void) out_poly16x8x4_t = vld4q_p16 (0); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c index c89ae63..e6d66b0 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c @@ -15,6 +15,6 @@ void test_vld4Qp8 (void) out_poly8x16x4_t = vld4q_p8 (0); } -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c index 98f4270..0439421 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c @@ -15,6 +15,6 @@ void test_vld4Qs16 (void) out_int16x8x4_t = vld4q_s16 (0); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c index 16d6133..4101fa1 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c @@ -15,6 +15,6 @@ void test_vld4Qs32 (void) out_int32x4x4_t = vld4q_s32 (0); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c index 3a4620f..9e74f1e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c @@ -15,6 +15,6 @@ void test_vld4Qs8 (void) out_int8x16x4_t = vld4q_s8 (0); } -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c index 197adf8..6b84331 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c @@ -15,6 +15,6 @@ void test_vld4Qu16 (void) out_uint16x8x4_t = vld4q_u16 (0); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c index 942ccfb..55f7e93 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c @@ -15,6 +15,6 @@ void test_vld4Qu32 (void) out_uint32x4x4_t = vld4q_u32 (0); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c index 93dad16..9c766c1 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c @@ -15,6 +15,6 @@ void test_vld4Qu8 (void) out_uint8x16x4_t = vld4q_u8 (0); } -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c index c7fe78f..5315db2 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c @@ -15,5 +15,5 @@ void test_vld4_dupf32 (void) out_float32x2x4_t = vld4_dup_f32 (0); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c index b88a76c..7ed8224 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c @@ -15,5 +15,5 @@ void test_vld4_dupp16 (void) out_poly16x4x4_t = vld4_dup_p16 (0); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c index cc9d17e..ca1f8fa 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c @@ -15,5 +15,5 @@ void test_vld4_dupp8 (void) out_poly8x8x4_t = vld4_dup_p8 (0); } -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c index c167f01..43dab8f 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c @@ -15,5 +15,5 @@ void test_vld4_dups16 (void) out_int16x4x4_t = vld4_dup_s16 (0); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c index 8279d31..183e3e9 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c @@ -15,5 +15,5 @@ void test_vld4_dups32 (void) out_int32x2x4_t = vld4_dup_s32 (0); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c index 30b1b2b..f4c5049 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c @@ -15,5 +15,5 @@ void test_vld4_dups64 (void) out_int64x1x4_t = vld4_dup_s64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c index 1775b52..3a4684a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c @@ -15,5 +15,5 @@ void test_vld4_dups8 (void) out_int8x8x4_t = vld4_dup_s8 (0); } -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c index 4357114..a436cf0 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c @@ -15,5 +15,5 @@ void test_vld4_dupu16 (void) out_uint16x4x4_t = vld4_dup_u16 (0); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c index aefcac6..6836abd 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c @@ -15,5 +15,5 @@ void test_vld4_dupu32 (void) out_uint32x2x4_t = vld4_dup_u32 (0); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c index 59f6e04..244eb61 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c @@ -15,5 +15,5 @@ void test_vld4_dupu64 (void) out_uint64x1x4_t = vld4_dup_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c index 7ace026..33c7875 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c @@ -15,5 +15,5 @@ void test_vld4_dupu8 (void) out_uint8x8x4_t = vld4_dup_u8 (0); } -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c index 1fd2726..0fc0ab5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c @@ -16,5 +16,5 @@ void test_vld4_lanef32 (void) out_float32x2x4_t = vld4_lane_f32 (0, arg1_float32x2x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c index 0f021af..b7407ad 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c @@ -16,5 +16,5 @@ void test_vld4_lanep16 (void) out_poly16x4x4_t = vld4_lane_p16 (0, arg1_poly16x4x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c index a6d6a9f..7e08410 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c @@ -16,5 +16,5 @@ void test_vld4_lanep8 (void) out_poly8x8x4_t = vld4_lane_p8 (0, arg1_poly8x8x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c index 3b29ec8..0dc653c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c @@ -16,5 +16,5 @@ void test_vld4_lanes16 (void) out_int16x4x4_t = vld4_lane_s16 (0, arg1_int16x4x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c index 86383db..a3bdaf2 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c @@ -16,5 +16,5 @@ void test_vld4_lanes32 (void) out_int32x2x4_t = vld4_lane_s32 (0, arg1_int32x2x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c index 80586c3..8555220 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c @@ -16,5 +16,5 @@ void test_vld4_lanes8 (void) out_int8x8x4_t = vld4_lane_s8 (0, arg1_int8x8x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c index 4425b5e..4a417f7 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c @@ -16,5 +16,5 @@ void test_vld4_laneu16 (void) out_uint16x4x4_t = vld4_lane_u16 (0, arg1_uint16x4x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c index 09d2722..c1e013a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c @@ -16,5 +16,5 @@ void test_vld4_laneu32 (void) out_uint32x2x4_t = vld4_lane_u32 (0, arg1_uint32x2x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c index 5c1a76f..31dcf8a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c @@ -16,5 +16,5 @@ void test_vld4_laneu8 (void) out_uint8x8x4_t = vld4_lane_u8 (0, arg1_uint8x8x4_t, 1); } -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4f32.c b/gcc/testsuite/gcc.target/arm/neon/vld4f32.c index e331581..aa755c0 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4f32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4f32.c @@ -15,5 +15,5 @@ void test_vld4f32 (void) out_float32x2x4_t = vld4_f32 (0); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p16.c b/gcc/testsuite/gcc.target/arm/neon/vld4p16.c index d5b415e..e0300e8 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4p16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4p16.c @@ -15,5 +15,5 @@ void test_vld4p16 (void) out_poly16x4x4_t = vld4_p16 (0); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p8.c b/gcc/testsuite/gcc.target/arm/neon/vld4p8.c index 785e86a..7fbb29c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4p8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4p8.c @@ -15,5 +15,5 @@ void test_vld4p8 (void) out_poly8x8x4_t = vld4_p8 (0); } -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s16.c b/gcc/testsuite/gcc.target/arm/neon/vld4s16.c index b725e5d..a5ef07b 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4s16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4s16.c @@ -15,5 +15,5 @@ void test_vld4s16 (void) out_int16x4x4_t = vld4_s16 (0); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s32.c b/gcc/testsuite/gcc.target/arm/neon/vld4s32.c index eaa7b36..08b9294 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4s32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4s32.c @@ -15,5 +15,5 @@ void test_vld4s32 (void) out_int32x2x4_t = vld4_s32 (0); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s64.c b/gcc/testsuite/gcc.target/arm/neon/vld4s64.c index 3bc5e43..99ea548 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4s64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4s64.c @@ -15,5 +15,5 @@ void test_vld4s64 (void) out_int64x1x4_t = vld4_s64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s8.c b/gcc/testsuite/gcc.target/arm/neon/vld4s8.c index 94789dc..c957467 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4s8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4s8.c @@ -15,5 +15,5 @@ void test_vld4s8 (void) out_int8x8x4_t = vld4_s8 (0); } -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u16.c b/gcc/testsuite/gcc.target/arm/neon/vld4u16.c index bd4cef9..4dea8af 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4u16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4u16.c @@ -15,5 +15,5 @@ void test_vld4u16 (void) out_uint16x4x4_t = vld4_u16 (0); } -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u32.c b/gcc/testsuite/gcc.target/arm/neon/vld4u32.c index d98f0d4..aee2225 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4u32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4u32.c @@ -15,5 +15,5 @@ void test_vld4u32 (void) out_uint32x2x4_t = vld4_u32 (0); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u64.c b/gcc/testsuite/gcc.target/arm/neon/vld4u64.c index 5541830..2e85754 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4u64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4u64.c @@ -15,5 +15,5 @@ void test_vld4u64 (void) out_uint64x1x4_t = vld4_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u8.c b/gcc/testsuite/gcc.target/arm/neon/vld4u8.c index af2e686..ec1d9f9 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld4u8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld4u8.c @@ -15,5 +15,5 @@ void test_vld4u8 (void) out_uint8x8x4_t = vld4_u8 (0); } -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c index 4b09964..1f95128 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c @@ -16,5 +16,5 @@ void test_vst1Q_lanef32 (void) vst1q_lane_f32 (arg0_float32_t, arg1_float32x4_t, 1); } -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c index d619d5f..90e7ccc 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c @@ -16,5 +16,5 @@ void test_vst1Q_lanep16 (void) vst1q_lane_p16 (arg0_poly16_t, arg1_poly16x8_t, 1); } -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c index 9bc250b..6abb646 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c @@ -16,5 +16,5 @@ void test_vst1Q_lanep8 (void) vst1q_lane_p8 (arg0_poly8_t, arg1_poly8x16_t, 1); } -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c index 81281a2..ec283e2 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c @@ -16,5 +16,5 @@ void test_vst1Q_lanes16 (void) vst1q_lane_s16 (arg0_int16_t, arg1_int16x8_t, 1); } -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c index 43f769e..6e73d6e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c @@ -16,5 +16,5 @@ void test_vst1Q_lanes32 (void) vst1q_lane_s32 (arg0_int32_t, arg1_int32x4_t, 1); } -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c index 7ea5940..46d369c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c @@ -16,5 +16,5 @@ void test_vst1Q_lanes64 (void) vst1q_lane_s64 (arg0_int64_t, arg1_int64x2_t, 1); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c index f34faa5..d7b3a1c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c @@ -16,5 +16,5 @@ void test_vst1Q_lanes8 (void) vst1q_lane_s8 (arg0_int8_t, arg1_int8x16_t, 1); } -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c index e90dccf..27958f6 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c @@ -16,5 +16,5 @@ void test_vst1Q_laneu16 (void) vst1q_lane_u16 (arg0_uint16_t, arg1_uint16x8_t, 1); } -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c index 42816c0..b4aa760 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c @@ -16,5 +16,5 @@ void test_vst1Q_laneu32 (void) vst1q_lane_u32 (arg0_uint32_t, arg1_uint32x4_t, 1); } -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c index 8b87921..54faaa3 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c @@ -16,5 +16,5 @@ void test_vst1Q_laneu64 (void) vst1q_lane_u64 (arg0_uint64_t, arg1_uint64x2_t, 1); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c index 4eeee81..9b09e72 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c @@ -16,5 +16,5 @@ void test_vst1Q_laneu8 (void) vst1q_lane_u8 (arg0_uint8_t, arg1_uint8x16_t, 1); } -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c index bd25c06..a4b3d8a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c @@ -16,5 +16,5 @@ void test_vst1Qf32 (void) vst1q_f32 (arg0_float32_t, arg1_float32x4_t); } -/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c index a055bb6..9b48733 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c @@ -16,5 +16,5 @@ void test_vst1Qp16 (void) vst1q_p16 (arg0_poly16_t, arg1_poly16x8_t); } -/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c index fa98e7a..f384339 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c @@ -16,5 +16,5 @@ void test_vst1Qp8 (void) vst1q_p8 (arg0_poly8_t, arg1_poly8x16_t); } -/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c index 4265f31..e6c39cf 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c @@ -16,5 +16,5 @@ void test_vst1Qs16 (void) vst1q_s16 (arg0_int16_t, arg1_int16x8_t); } -/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c index d252f9a..587dcf0 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c @@ -16,5 +16,5 @@ void test_vst1Qs32 (void) vst1q_s32 (arg0_int32_t, arg1_int32x4_t); } -/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c index 01aeebf..50511d1 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c @@ -16,5 +16,5 @@ void test_vst1Qs64 (void) vst1q_s64 (arg0_int64_t, arg1_int64x2_t); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c index 860b8c5..2de9814 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c @@ -16,5 +16,5 @@ void test_vst1Qs8 (void) vst1q_s8 (arg0_int8_t, arg1_int8x16_t); } -/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c index 2c3cc22..81d8cc5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c @@ -16,5 +16,5 @@ void test_vst1Qu16 (void) vst1q_u16 (arg0_uint16_t, arg1_uint16x8_t); } -/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c index f67fc1a..408c6b2 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c @@ -16,5 +16,5 @@ void test_vst1Qu32 (void) vst1q_u32 (arg0_uint32_t, arg1_uint32x4_t); } -/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c index e0a4d98..1c17e5b 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c @@ -16,5 +16,5 @@ void test_vst1Qu64 (void) vst1q_u64 (arg0_uint64_t, arg1_uint64x2_t); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c index ff9c66f..1605e27 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c @@ -16,5 +16,5 @@ void test_vst1Qu8 (void) vst1q_u8 (arg0_uint8_t, arg1_uint8x16_t); } -/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c index 57f1106..7817031 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c @@ -16,5 +16,5 @@ void test_vst1_lanef32 (void) vst1_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1); } -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c index a5fc94f..c6a19da 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c @@ -16,5 +16,5 @@ void test_vst1_lanep16 (void) vst1_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1); } -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c index 6a5ca7e..1b5dd4f 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c @@ -16,5 +16,5 @@ void test_vst1_lanep8 (void) vst1_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1); } -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c index 9e1ee3a..4efdc50 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c @@ -16,5 +16,5 @@ void test_vst1_lanes16 (void) vst1_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1); } -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c index 251b8a9..9c3c135 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c @@ -16,5 +16,5 @@ void test_vst1_lanes32 (void) vst1_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1); } -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c index fb48c8b..64fed4a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c @@ -16,5 +16,5 @@ void test_vst1_lanes64 (void) vst1_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c index bc932ae..59646f8 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c @@ -16,5 +16,5 @@ void test_vst1_lanes8 (void) vst1_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1); } -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c index 0ba3d38..6ae7166 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c @@ -16,5 +16,5 @@ void test_vst1_laneu16 (void) vst1_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1); } -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c index bf953c4..369abf7 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c @@ -16,5 +16,5 @@ void test_vst1_laneu32 (void) vst1_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1); } -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c index 4f486d3..7296fee 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c @@ -16,5 +16,5 @@ void test_vst1_laneu64 (void) vst1_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c index 144864f..ba6076e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c @@ -16,5 +16,5 @@ void test_vst1_laneu8 (void) vst1_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1); } -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1f32.c b/gcc/testsuite/gcc.target/arm/neon/vst1f32.c index 3690958..f3460f5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1f32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1f32.c @@ -16,5 +16,5 @@ void test_vst1f32 (void) vst1_f32 (arg0_float32_t, arg1_float32x2_t); } -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p16.c b/gcc/testsuite/gcc.target/arm/neon/vst1p16.c index aa38de1..7504c5c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1p16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1p16.c @@ -16,5 +16,5 @@ void test_vst1p16 (void) vst1_p16 (arg0_poly16_t, arg1_poly16x4_t); } -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p8.c b/gcc/testsuite/gcc.target/arm/neon/vst1p8.c index bfef51d..3059aac 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1p8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1p8.c @@ -16,5 +16,5 @@ void test_vst1p8 (void) vst1_p8 (arg0_poly8_t, arg1_poly8x8_t); } -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s16.c b/gcc/testsuite/gcc.target/arm/neon/vst1s16.c index a5e785d..fbddb2f 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1s16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1s16.c @@ -16,5 +16,5 @@ void test_vst1s16 (void) vst1_s16 (arg0_int16_t, arg1_int16x4_t); } -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s32.c b/gcc/testsuite/gcc.target/arm/neon/vst1s32.c index a0088ae..f264db0 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1s32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1s32.c @@ -16,5 +16,5 @@ void test_vst1s32 (void) vst1_s32 (arg0_int32_t, arg1_int32x2_t); } -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s64.c b/gcc/testsuite/gcc.target/arm/neon/vst1s64.c index fc304f9..64de48b 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1s64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1s64.c @@ -16,5 +16,5 @@ void test_vst1s64 (void) vst1_s64 (arg0_int64_t, arg1_int64x1_t); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s8.c b/gcc/testsuite/gcc.target/arm/neon/vst1s8.c index b632740..7916448 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1s8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1s8.c @@ -16,5 +16,5 @@ void test_vst1s8 (void) vst1_s8 (arg0_int8_t, arg1_int8x8_t); } -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u16.c b/gcc/testsuite/gcc.target/arm/neon/vst1u16.c index 381a47e..797aef1 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1u16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1u16.c @@ -16,5 +16,5 @@ void test_vst1u16 (void) vst1_u16 (arg0_uint16_t, arg1_uint16x4_t); } -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u32.c b/gcc/testsuite/gcc.target/arm/neon/vst1u32.c index ec73ac6..563ea9d 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1u32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1u32.c @@ -16,5 +16,5 @@ void test_vst1u32 (void) vst1_u32 (arg0_uint32_t, arg1_uint32x2_t); } -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u64.c b/gcc/testsuite/gcc.target/arm/neon/vst1u64.c index 8cd9a28..b95f5d5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1u64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1u64.c @@ -16,5 +16,5 @@ void test_vst1u64 (void) vst1_u64 (arg0_uint64_t, arg1_uint64x1_t); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u8.c b/gcc/testsuite/gcc.target/arm/neon/vst1u8.c index ff557ce..75358e7 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1u8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst1u8.c @@ -16,5 +16,5 @@ void test_vst1u8 (void) vst1_u8 (arg0_uint8_t, arg1_uint8x8_t); } -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c index 2d35d1c..4857356 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c @@ -16,5 +16,5 @@ void test_vst2Q_lanef32 (void) vst2q_lane_f32 (arg0_float32_t, arg1_float32x4x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c index 8a8a846..bed1503 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c @@ -16,5 +16,5 @@ void test_vst2Q_lanep16 (void) vst2q_lane_p16 (arg0_poly16_t, arg1_poly16x8x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c index 5b01c0c..5786735 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c @@ -16,5 +16,5 @@ void test_vst2Q_lanes16 (void) vst2q_lane_s16 (arg0_int16_t, arg1_int16x8x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c index 81e125f..cf0dc15 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c @@ -16,5 +16,5 @@ void test_vst2Q_lanes32 (void) vst2q_lane_s32 (arg0_int32_t, arg1_int32x4x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c index ed4a1e6..b751e6b9 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c @@ -16,5 +16,5 @@ void test_vst2Q_laneu16 (void) vst2q_lane_u16 (arg0_uint16_t, arg1_uint16x8x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c index d2f39ff..b5fbe0e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c @@ -16,5 +16,5 @@ void test_vst2Q_laneu32 (void) vst2q_lane_u32 (arg0_uint32_t, arg1_uint32x4x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c index 426a195..56f9adc 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c @@ -16,6 +16,6 @@ void test_vst2Qf32 (void) vst2q_f32 (arg0_float32_t, arg1_float32x4x2_t); } -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c index aeae48c..1841990 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c @@ -16,6 +16,6 @@ void test_vst2Qp16 (void) vst2q_p16 (arg0_poly16_t, arg1_poly16x8x2_t); } -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c index d18410c..2d98ec9 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c @@ -16,6 +16,6 @@ void test_vst2Qp8 (void) vst2q_p8 (arg0_poly8_t, arg1_poly8x16x2_t); } -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c index 9fad004..39395f6 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c @@ -16,6 +16,6 @@ void test_vst2Qs16 (void) vst2q_s16 (arg0_int16_t, arg1_int16x8x2_t); } -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c index 6cd063d..1768d47 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c @@ -16,6 +16,6 @@ void test_vst2Qs32 (void) vst2q_s32 (arg0_int32_t, arg1_int32x4x2_t); } -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c index c09dea2..423cb8c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c @@ -16,6 +16,6 @@ void test_vst2Qs8 (void) vst2q_s8 (arg0_int8_t, arg1_int8x16x2_t); } -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c index 6a5cf56..a25958a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c @@ -16,6 +16,6 @@ void test_vst2Qu16 (void) vst2q_u16 (arg0_uint16_t, arg1_uint16x8x2_t); } -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c index 4b4d27f..47722b3 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c @@ -16,6 +16,6 @@ void test_vst2Qu32 (void) vst2q_u32 (arg0_uint32_t, arg1_uint32x4x2_t); } -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c index e1b32e8..b794780 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c @@ -16,6 +16,6 @@ void test_vst2Qu8 (void) vst2q_u8 (arg0_uint8_t, arg1_uint8x16x2_t); } -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c index 5aa11e7..e775292 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c @@ -16,5 +16,5 @@ void test_vst2_lanef32 (void) vst2_lane_f32 (arg0_float32_t, arg1_float32x2x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c index 27fe650..be9913b 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c @@ -16,5 +16,5 @@ void test_vst2_lanep16 (void) vst2_lane_p16 (arg0_poly16_t, arg1_poly16x4x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c index b6ee441..0a95e26 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c @@ -16,5 +16,5 @@ void test_vst2_lanep8 (void) vst2_lane_p8 (arg0_poly8_t, arg1_poly8x8x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c index 0030375..728593c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c @@ -16,5 +16,5 @@ void test_vst2_lanes16 (void) vst2_lane_s16 (arg0_int16_t, arg1_int16x4x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c index 6f2cf26..32d49b5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c @@ -16,5 +16,5 @@ void test_vst2_lanes32 (void) vst2_lane_s32 (arg0_int32_t, arg1_int32x2x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c index 5e32ccb..9e67eb32 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c @@ -16,5 +16,5 @@ void test_vst2_lanes8 (void) vst2_lane_s8 (arg0_int8_t, arg1_int8x8x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c index bfdf447..d56f209 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c @@ -16,5 +16,5 @@ void test_vst2_laneu16 (void) vst2_lane_u16 (arg0_uint16_t, arg1_uint16x4x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c index 2258000..053704c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c @@ -16,5 +16,5 @@ void test_vst2_laneu32 (void) vst2_lane_u32 (arg0_uint32_t, arg1_uint32x2x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c index b10c78a..a353600 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c @@ -16,5 +16,5 @@ void test_vst2_laneu8 (void) vst2_lane_u8 (arg0_uint8_t, arg1_uint8x8x2_t, 1); } -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2f32.c b/gcc/testsuite/gcc.target/arm/neon/vst2f32.c index 45c084f..b43c413 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2f32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2f32.c @@ -16,5 +16,5 @@ void test_vst2f32 (void) vst2_f32 (arg0_float32_t, arg1_float32x2x2_t); } -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p16.c b/gcc/testsuite/gcc.target/arm/neon/vst2p16.c index 9f29ddf..1d112ff 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2p16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2p16.c @@ -16,5 +16,5 @@ void test_vst2p16 (void) vst2_p16 (arg0_poly16_t, arg1_poly16x4x2_t); } -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p8.c b/gcc/testsuite/gcc.target/arm/neon/vst2p8.c index 92ae9c4..59c4d62 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2p8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2p8.c @@ -16,5 +16,5 @@ void test_vst2p8 (void) vst2_p8 (arg0_poly8_t, arg1_poly8x8x2_t); } -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s16.c b/gcc/testsuite/gcc.target/arm/neon/vst2s16.c index 30b6a2b..eb6cb59 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2s16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2s16.c @@ -16,5 +16,5 @@ void test_vst2s16 (void) vst2_s16 (arg0_int16_t, arg1_int16x4x2_t); } -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s32.c b/gcc/testsuite/gcc.target/arm/neon/vst2s32.c index 208e258..a17b58d 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2s32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2s32.c @@ -16,5 +16,5 @@ void test_vst2s32 (void) vst2_s32 (arg0_int32_t, arg1_int32x2x2_t); } -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s64.c b/gcc/testsuite/gcc.target/arm/neon/vst2s64.c index 4cc53b4..668ae50 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2s64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2s64.c @@ -16,5 +16,5 @@ void test_vst2s64 (void) vst2_s64 (arg0_int64_t, arg1_int64x1x2_t); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s8.c b/gcc/testsuite/gcc.target/arm/neon/vst2s8.c index e56b493..343414e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2s8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2s8.c @@ -16,5 +16,5 @@ void test_vst2s8 (void) vst2_s8 (arg0_int8_t, arg1_int8x8x2_t); } -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u16.c b/gcc/testsuite/gcc.target/arm/neon/vst2u16.c index 7d8d83e..903279d 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2u16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2u16.c @@ -16,5 +16,5 @@ void test_vst2u16 (void) vst2_u16 (arg0_uint16_t, arg1_uint16x4x2_t); } -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u32.c b/gcc/testsuite/gcc.target/arm/neon/vst2u32.c index dafab12..1396ed1 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2u32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2u32.c @@ -16,5 +16,5 @@ void test_vst2u32 (void) vst2_u32 (arg0_uint32_t, arg1_uint32x2x2_t); } -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u64.c b/gcc/testsuite/gcc.target/arm/neon/vst2u64.c index 64f433b..006e31f 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2u64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2u64.c @@ -16,5 +16,5 @@ void test_vst2u64 (void) vst2_u64 (arg0_uint64_t, arg1_uint64x1x2_t); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u8.c b/gcc/testsuite/gcc.target/arm/neon/vst2u8.c index 1b1b6e2..55cd347 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst2u8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst2u8.c @@ -16,5 +16,5 @@ void test_vst2u8 (void) vst2_u8 (arg0_uint8_t, arg1_uint8x8x2_t); } -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c index 334bc26..8e4f0dc 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c @@ -16,5 +16,5 @@ void test_vst3Q_lanef32 (void) vst3q_lane_f32 (arg0_float32_t, arg1_float32x4x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c index c108bac..f8fcb97 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c @@ -16,5 +16,5 @@ void test_vst3Q_lanep16 (void) vst3q_lane_p16 (arg0_poly16_t, arg1_poly16x8x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c index c32ffb6..3fde1a3 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c @@ -16,5 +16,5 @@ void test_vst3Q_lanes16 (void) vst3q_lane_s16 (arg0_int16_t, arg1_int16x8x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c index faafb93..1eb4289 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c @@ -16,5 +16,5 @@ void test_vst3Q_lanes32 (void) vst3q_lane_s32 (arg0_int32_t, arg1_int32x4x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c index f3fc1c6..ca98dde 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c @@ -16,5 +16,5 @@ void test_vst3Q_laneu16 (void) vst3q_lane_u16 (arg0_uint16_t, arg1_uint16x8x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c index e11f4a3..a2a59d7 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c @@ -16,5 +16,5 @@ void test_vst3Q_laneu32 (void) vst3q_lane_u32 (arg0_uint32_t, arg1_uint32x4x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c index 61dc577..b4b480f 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c @@ -16,6 +16,6 @@ void test_vst3Qf32 (void) vst3q_f32 (arg0_float32_t, arg1_float32x4x3_t); } -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c index 87d7696..aa34886 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c @@ -16,6 +16,6 @@ void test_vst3Qp16 (void) vst3q_p16 (arg0_poly16_t, arg1_poly16x8x3_t); } -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c index 0681c9a..b13fcd7 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c @@ -16,6 +16,6 @@ void test_vst3Qp8 (void) vst3q_p8 (arg0_poly8_t, arg1_poly8x16x3_t); } -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c index e9b8640..6cac405 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c @@ -16,6 +16,6 @@ void test_vst3Qs16 (void) vst3q_s16 (arg0_int16_t, arg1_int16x8x3_t); } -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c index 2ec2ef0..3c84370 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c @@ -16,6 +16,6 @@ void test_vst3Qs32 (void) vst3q_s32 (arg0_int32_t, arg1_int32x4x3_t); } -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c index d636257..fee56af 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c @@ -16,6 +16,6 @@ void test_vst3Qs8 (void) vst3q_s8 (arg0_int8_t, arg1_int8x16x3_t); } -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c index f10c69f..af3910b 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c @@ -16,6 +16,6 @@ void test_vst3Qu16 (void) vst3q_u16 (arg0_uint16_t, arg1_uint16x8x3_t); } -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c index 0882089..8828885 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c @@ -16,6 +16,6 @@ void test_vst3Qu32 (void) vst3q_u32 (arg0_uint32_t, arg1_uint32x4x3_t); } -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c index 919a1cb..c273fe6 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c @@ -16,6 +16,6 @@ void test_vst3Qu8 (void) vst3q_u8 (arg0_uint8_t, arg1_uint8x16x3_t); } -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c index d527c78..de654e9 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c @@ -16,5 +16,5 @@ void test_vst3_lanef32 (void) vst3_lane_f32 (arg0_float32_t, arg1_float32x2x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c index 491f8eb..de733ff6 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c @@ -16,5 +16,5 @@ void test_vst3_lanep16 (void) vst3_lane_p16 (arg0_poly16_t, arg1_poly16x4x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c index 0546c3a..a9a2644 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c @@ -16,5 +16,5 @@ void test_vst3_lanep8 (void) vst3_lane_p8 (arg0_poly8_t, arg1_poly8x8x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c index 4825789..a98b407 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c @@ -16,5 +16,5 @@ void test_vst3_lanes16 (void) vst3_lane_s16 (arg0_int16_t, arg1_int16x4x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c index 51da414..5b2450c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c @@ -16,5 +16,5 @@ void test_vst3_lanes32 (void) vst3_lane_s32 (arg0_int32_t, arg1_int32x2x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c index b75f210..8cd04f7 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c @@ -16,5 +16,5 @@ void test_vst3_lanes8 (void) vst3_lane_s8 (arg0_int8_t, arg1_int8x8x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c index 9686054..692058d 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c @@ -16,5 +16,5 @@ void test_vst3_laneu16 (void) vst3_lane_u16 (arg0_uint16_t, arg1_uint16x4x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c index da1af40..32a5193 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c @@ -16,5 +16,5 @@ void test_vst3_laneu32 (void) vst3_lane_u32 (arg0_uint32_t, arg1_uint32x2x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c index 47eccc0..952ffcb 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c @@ -16,5 +16,5 @@ void test_vst3_laneu8 (void) vst3_lane_u8 (arg0_uint8_t, arg1_uint8x8x3_t, 1); } -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3f32.c b/gcc/testsuite/gcc.target/arm/neon/vst3f32.c index ac87178..e80b8e9 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3f32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3f32.c @@ -16,5 +16,5 @@ void test_vst3f32 (void) vst3_f32 (arg0_float32_t, arg1_float32x2x3_t); } -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p16.c b/gcc/testsuite/gcc.target/arm/neon/vst3p16.c index 08a861b..1d78312 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3p16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3p16.c @@ -16,5 +16,5 @@ void test_vst3p16 (void) vst3_p16 (arg0_poly16_t, arg1_poly16x4x3_t); } -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p8.c b/gcc/testsuite/gcc.target/arm/neon/vst3p8.c index d357fdf..ca8c5ec 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3p8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3p8.c @@ -16,5 +16,5 @@ void test_vst3p8 (void) vst3_p8 (arg0_poly8_t, arg1_poly8x8x3_t); } -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s16.c b/gcc/testsuite/gcc.target/arm/neon/vst3s16.c index 4fc940e..5c1bcf9 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3s16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3s16.c @@ -16,5 +16,5 @@ void test_vst3s16 (void) vst3_s16 (arg0_int16_t, arg1_int16x4x3_t); } -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s32.c b/gcc/testsuite/gcc.target/arm/neon/vst3s32.c index 82b4cfa..3f5a3aa 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3s32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3s32.c @@ -16,5 +16,5 @@ void test_vst3s32 (void) vst3_s32 (arg0_int32_t, arg1_int32x2x3_t); } -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s64.c b/gcc/testsuite/gcc.target/arm/neon/vst3s64.c index a8e86d2..8c6a851 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3s64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3s64.c @@ -16,5 +16,5 @@ void test_vst3s64 (void) vst3_s64 (arg0_int64_t, arg1_int64x1x3_t); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s8.c b/gcc/testsuite/gcc.target/arm/neon/vst3s8.c index 563534d..8853fba 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3s8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3s8.c @@ -16,5 +16,5 @@ void test_vst3s8 (void) vst3_s8 (arg0_int8_t, arg1_int8x8x3_t); } -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u16.c b/gcc/testsuite/gcc.target/arm/neon/vst3u16.c index 679d7b8..e17c6c8 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3u16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3u16.c @@ -16,5 +16,5 @@ void test_vst3u16 (void) vst3_u16 (arg0_uint16_t, arg1_uint16x4x3_t); } -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u32.c b/gcc/testsuite/gcc.target/arm/neon/vst3u32.c index 8705c5e..3b7d8ce 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3u32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3u32.c @@ -16,5 +16,5 @@ void test_vst3u32 (void) vst3_u32 (arg0_uint32_t, arg1_uint32x2x3_t); } -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u64.c b/gcc/testsuite/gcc.target/arm/neon/vst3u64.c index 4b15e68..08d9c7a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3u64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3u64.c @@ -16,5 +16,5 @@ void test_vst3u64 (void) vst3_u64 (arg0_uint64_t, arg1_uint64x1x3_t); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u8.c b/gcc/testsuite/gcc.target/arm/neon/vst3u8.c index 0e31b3b..78944cb 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst3u8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst3u8.c @@ -16,5 +16,5 @@ void test_vst3u8 (void) vst3_u8 (arg0_uint8_t, arg1_uint8x8x3_t); } -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c index cb2de05..adbb4d5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c @@ -16,5 +16,5 @@ void test_vst4Q_lanef32 (void) vst4q_lane_f32 (arg0_float32_t, arg1_float32x4x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c index 3d0f81d..587477c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c @@ -16,5 +16,5 @@ void test_vst4Q_lanep16 (void) vst4q_lane_p16 (arg0_poly16_t, arg1_poly16x8x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c index 6e174a0..3febdf7 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c @@ -16,5 +16,5 @@ void test_vst4Q_lanes16 (void) vst4q_lane_s16 (arg0_int16_t, arg1_int16x8x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c index 323626c..71406af 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c @@ -16,5 +16,5 @@ void test_vst4Q_lanes32 (void) vst4q_lane_s32 (arg0_int32_t, arg1_int32x4x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c index 5a396ac..1229c86 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c @@ -16,5 +16,5 @@ void test_vst4Q_laneu16 (void) vst4q_lane_u16 (arg0_uint16_t, arg1_uint16x8x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c index 4c3dd6a..5e0683f 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c @@ -16,5 +16,5 @@ void test_vst4Q_laneu32 (void) vst4q_lane_u32 (arg0_uint32_t, arg1_uint32x4x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c index 4da79bf..2ecb6b1 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c @@ -16,6 +16,6 @@ void test_vst4Qf32 (void) vst4q_f32 (arg0_float32_t, arg1_float32x4x4_t); } -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c index 4892d6d..a9b9b7c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c @@ -16,6 +16,6 @@ void test_vst4Qp16 (void) vst4q_p16 (arg0_poly16_t, arg1_poly16x8x4_t); } -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c index 3d51e97..17142c1 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c @@ -16,6 +16,6 @@ void test_vst4Qp8 (void) vst4q_p8 (arg0_poly8_t, arg1_poly8x16x4_t); } -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c index 9fccc6a..8511619 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c @@ -16,6 +16,6 @@ void test_vst4Qs16 (void) vst4q_s16 (arg0_int16_t, arg1_int16x8x4_t); } -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c index faa1db2..f65894e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c @@ -16,6 +16,6 @@ void test_vst4Qs32 (void) vst4q_s32 (arg0_int32_t, arg1_int32x4x4_t); } -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c index c68fc82..a74d58b 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c @@ -16,6 +16,6 @@ void test_vst4Qs8 (void) vst4q_s8 (arg0_int8_t, arg1_int8x16x4_t); } -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c index 98f9b09..b124c7c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c @@ -16,6 +16,6 @@ void test_vst4Qu16 (void) vst4q_u16 (arg0_uint16_t, arg1_uint16x8x4_t); } -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c index c9bfd05..fa7d213 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c @@ -16,6 +16,6 @@ void test_vst4Qu32 (void) vst4q_u32 (arg0_uint32_t, arg1_uint32x4x4_t); } -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c index 8b86161..d853b12 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c @@ -16,6 +16,6 @@ void test_vst4Qu8 (void) vst4q_u8 (arg0_uint8_t, arg1_uint8x16x4_t); } -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c index 4bdde6e..acef9f0 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c @@ -16,5 +16,5 @@ void test_vst4_lanef32 (void) vst4_lane_f32 (arg0_float32_t, arg1_float32x2x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c index c9889b3..64e4713 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c @@ -16,5 +16,5 @@ void test_vst4_lanep16 (void) vst4_lane_p16 (arg0_poly16_t, arg1_poly16x4x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c index 3d8ef6e..1ac58df 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c @@ -16,5 +16,5 @@ void test_vst4_lanep8 (void) vst4_lane_p8 (arg0_poly8_t, arg1_poly8x8x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c index 255b4b9..e7e1e2a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c @@ -16,5 +16,5 @@ void test_vst4_lanes16 (void) vst4_lane_s16 (arg0_int16_t, arg1_int16x4x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c index fc52173..2c99611 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c @@ -16,5 +16,5 @@ void test_vst4_lanes32 (void) vst4_lane_s32 (arg0_int32_t, arg1_int32x2x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c index e9dec5d..7eebc16 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c @@ -16,5 +16,5 @@ void test_vst4_lanes8 (void) vst4_lane_s8 (arg0_int8_t, arg1_int8x8x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c index ee513a6..decc7ca 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c @@ -16,5 +16,5 @@ void test_vst4_laneu16 (void) vst4_lane_u16 (arg0_uint16_t, arg1_uint16x4x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c index 516d04c..4cfeddb 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c @@ -16,5 +16,5 @@ void test_vst4_laneu32 (void) vst4_lane_u32 (arg0_uint32_t, arg1_uint32x2x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c index 531c2b9..217ced2 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c @@ -16,5 +16,5 @@ void test_vst4_laneu8 (void) vst4_lane_u8 (arg0_uint8_t, arg1_uint8x8x4_t, 1); } -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4f32.c b/gcc/testsuite/gcc.target/arm/neon/vst4f32.c index e3268f9..931b8ed 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4f32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4f32.c @@ -16,5 +16,5 @@ void test_vst4f32 (void) vst4_f32 (arg0_float32_t, arg1_float32x2x4_t); } -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p16.c b/gcc/testsuite/gcc.target/arm/neon/vst4p16.c index 67f32f2..ea58c44 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4p16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4p16.c @@ -16,5 +16,5 @@ void test_vst4p16 (void) vst4_p16 (arg0_poly16_t, arg1_poly16x4x4_t); } -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p8.c b/gcc/testsuite/gcc.target/arm/neon/vst4p8.c index 2ed766a..95e5ccd 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4p8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4p8.c @@ -16,5 +16,5 @@ void test_vst4p8 (void) vst4_p8 (arg0_poly8_t, arg1_poly8x8x4_t); } -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s16.c b/gcc/testsuite/gcc.target/arm/neon/vst4s16.c index 9479466..7811d74 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4s16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4s16.c @@ -16,5 +16,5 @@ void test_vst4s16 (void) vst4_s16 (arg0_int16_t, arg1_int16x4x4_t); } -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s32.c b/gcc/testsuite/gcc.target/arm/neon/vst4s32.c index 8d22a04..f93ea40 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4s32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4s32.c @@ -16,5 +16,5 @@ void test_vst4s32 (void) vst4_s32 (arg0_int32_t, arg1_int32x2x4_t); } -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s64.c b/gcc/testsuite/gcc.target/arm/neon/vst4s64.c index c9dffec..796762a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4s64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4s64.c @@ -16,5 +16,5 @@ void test_vst4s64 (void) vst4_s64 (arg0_int64_t, arg1_int64x1x4_t); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s8.c b/gcc/testsuite/gcc.target/arm/neon/vst4s8.c index 0dbdfc0..877e2c4 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4s8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4s8.c @@ -16,5 +16,5 @@ void test_vst4s8 (void) vst4_s8 (arg0_int8_t, arg1_int8x8x4_t); } -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u16.c b/gcc/testsuite/gcc.target/arm/neon/vst4u16.c index 4eddaf6..5de43f5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4u16.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4u16.c @@ -16,5 +16,5 @@ void test_vst4u16 (void) vst4_u16 (arg0_uint16_t, arg1_uint16x4x4_t); } -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u32.c b/gcc/testsuite/gcc.target/arm/neon/vst4u32.c index 06a5d33..1ae9e5e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4u32.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4u32.c @@ -16,5 +16,5 @@ void test_vst4u32 (void) vst4_u32 (arg0_uint32_t, arg1_uint32x2x4_t); } -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u64.c b/gcc/testsuite/gcc.target/arm/neon/vst4u64.c index 063a046..2453d6b 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4u64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4u64.c @@ -16,5 +16,5 @@ void test_vst4u64 (void) vst4_u64 (arg0_uint64_t, arg1_uint64x1x4_t); } -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u8.c b/gcc/testsuite/gcc.target/arm/neon/vst4u8.c index d4da67b..380acc6 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst4u8.c +++ b/gcc/testsuite/gcc.target/arm/neon/vst4u8.c @@ -16,5 +16,5 @@ void test_vst4u8 (void) vst4_u8 (arg0_uint8_t, arg1_uint8x8x4_t); } -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ -- 2.7.4