From e571cb477b2ed6000dfa0fdafe8cab6c0aa1bb15 Mon Sep 17 00:00:00 2001 From: aurel32 Date: Sat, 24 Jan 2009 15:07:42 +0000 Subject: [PATCH] target-ppc: Change core powerpc gdbstub bits to be XML-aware Define GDB_CORE_XML and hack things similarly to ARM so that despite the FP registers coming in between the GPRs and some status registers, everything works out OK no matter which kind of GDB we're communicating with. It matters whether we're built to target 64-bit or 32-bit cores. I think there are still problems if we are debugging 32-bit programs on a built-for-64-bit QEMU (QEMU will always send 64-bit registers), but I don't know if there's a good way around that at the time being. Signed-off-by: Nathan Froyd Signed-off-by: Aurelien Jarno git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6421 c046a42c-6fe2-441c-8c8c-71466251a162 --- gdbstub.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/gdbstub.c b/gdbstub.c index 2be19f0..b4b8292 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -620,7 +620,17 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int i) #elif defined (TARGET_PPC) +/* Old gdb always expects FP registers. Newer (xml-aware) gdb only + expects whatever the target description contains. Due to a + historical mishap the FP registers appear in between core integer + regs and PC, MSR, CR, and so forth. We hack round this by giving the + FP regs zero size when talking to a newer gdb. */ #define NUM_CORE_REGS 71 +#if defined (TARGET_PPC64) +#define GDB_CORE_XML "power64-core.xml" +#else +#define GDB_CORE_XML "power-core.xml" +#endif static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) { @@ -629,6 +639,8 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) GET_REGL(env->gpr[n]); } else if (n < 64) { /* fprs */ + if (gdb_has_xml) + return 0; stfq_p(mem_buf, env->fpr[n-32]); return 8; } else { @@ -646,7 +658,12 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) case 67: GET_REGL(env->lr); case 68: GET_REGL(env->ctr); case 69: GET_REGL(env->xer); - case 70: GET_REG32(0); /* fpscr */ + case 70: + { + if (gdb_has_xml) + return 0; + GET_REG32(0); /* fpscr */ + } } } return 0; @@ -660,6 +677,8 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) return sizeof(target_ulong); } else if (n < 64) { /* fprs */ + if (gdb_has_xml) + return 0; env->fpr[n-32] = ldfq_p(mem_buf); return 8; } else { @@ -689,6 +708,8 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) return sizeof(target_ulong); case 70: /* fpscr */ + if (gdb_has_xml) + return 0; return 4; } } -- 2.7.4