From e560a11b872d2c79ee85405c64deafb789ce77f9 Mon Sep 17 00:00:00 2001 From: Leo Liu Date: Mon, 4 Jul 2016 11:29:28 -0400 Subject: [PATCH] radeon/vce: increase cpb height alignment MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Height should be aligned with 2 macroblocks, thus making safer for tiled mode Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/radeon_vce.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c index e8aac8e..92cb8ce 100644 --- a/src/gallium/drivers/radeon/radeon_vce.c +++ b/src/gallium/drivers/radeon/radeon_vce.c @@ -454,7 +454,7 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context, get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf); cpb_size = align(tmp_surf->level[0].pitch_bytes, 128); - cpb_size = cpb_size * align(tmp_surf->npix_y, 16); + cpb_size = cpb_size * align(tmp_surf->npix_y, 32); cpb_size = cpb_size * 3 / 2; cpb_size = cpb_size * enc->cpb_num; if (enc->dual_pipe) -- 2.7.4