From e4b22c9fa1a443eb250bd11e41c5c9ad054484cb Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Thu, 23 Jun 2016 23:26:25 +0200 Subject: [PATCH] radeonsi: set almost optimal settings in SC_MODE_CNTL_1 MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit ported from Vulkan Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_state.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index f5da153..df188dd 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -2555,7 +2555,17 @@ static void si_emit_msaa_sample_locs(struct si_context *sctx, static void si_emit_msaa_config(struct si_context *sctx, struct r600_atom *atom) { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; + unsigned num_tile_pipes = sctx->screen->b.info.num_tile_pipes; + bool dst_is_linear = false; /* TODO */ unsigned sc_mode_cntl_1 = + S_028A4C_WALK_SIZE(dst_is_linear) | + S_028A4C_WALK_FENCE_ENABLE(!dst_is_linear) | + S_028A4C_WALK_FENCE_SIZE(num_tile_pipes == 2 ? 2 : 3) | + /* always 1: */ + S_028A4C_WALK_ALIGN8_PRIM_FITS_ST(1) | + S_028A4C_SUPERTILE_WALK_ORDER_ENABLE(1) | + S_028A4C_TILE_WALK_ORDER_ENABLE(1) | + S_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(1) | S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) | S_028A4C_FORCE_EOV_REZ_ENABLE(1); @@ -2565,7 +2575,6 @@ static void si_emit_msaa_config(struct si_context *sctx, struct r600_atom *atom) sc_mode_cntl_1); } - static void si_set_min_samples(struct pipe_context *ctx, unsigned min_samples) { struct si_context *sctx = (struct si_context *)ctx; -- 2.7.4