From e3c0a5b6e807b9c8ee7273fbbc06f4991b719b01 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Thu, 23 Nov 2017 22:29:26 +0100 Subject: [PATCH] ac/surface: enable DCC computation for MSAA MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Tested-by: Dieter Nützel Reviewed-by: Nicolai Hähnle --- src/amd/common/ac_surface.c | 6 ++---- src/amd/vulkan/radv_image.c | 3 ++- src/gallium/drivers/radeon/r600_texture.c | 3 ++- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 4db48cf..8347c45 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -586,7 +586,7 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib, info->chip_class >= VI && !(surf->flags & RADEON_SURF_Z_OR_SBUFFER) && !(surf->flags & RADEON_SURF_DISABLE_DCC) && - !compressed && AddrDccIn.numSamples <= 1 && + !compressed && ((config->info.array_size == 1 && config->info.depth == 1) || config->info.levels == 1); @@ -927,9 +927,7 @@ static int gfx9_compute_miptree(ADDR_HANDLE addrlib, if (!(surf->flags & RADEON_SURF_DISABLE_DCC) && !(surf->flags & RADEON_SURF_SCANOUT) && !compressed && - in->swizzleMode != ADDR_SW_LINEAR && - /* TODO: We could support DCC with MSAA. */ - in->numSamples == 1) { + in->swizzleMode != ADDR_SW_LINEAR) { ADDR2_COMPUTE_DCCINFO_INPUT din = {0}; ADDR2_COMPUTE_DCCINFO_OUTPUT dout = {0}; ADDR2_META_MIP_INFO meta_mip_info[RADEON_SURF_MAX_LEVELS] = {}; diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index c241e36..b145e81 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -155,7 +155,8 @@ radv_init_surface(struct radv_device *device, (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR) || pCreateInfo->mipLevels > 1 || pCreateInfo->arrayLayers > 1 || device->physical_device->rad_info.chip_class < VI || - create_info->scanout || (device->instance->debug_flags & RADV_DEBUG_NO_DCC)) + create_info->scanout || (device->instance->debug_flags & RADV_DEBUG_NO_DCC) || + pCreateInfo->samples >= 2) surface->flags |= RADEON_SURF_DISABLE_DCC; if (create_info->scanout) surface->flags |= RADEON_SURF_SCANOUT; diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 933a4a9..0c30b62 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -266,7 +266,8 @@ static int r600_init_surface(struct r600_common_screen *rscreen, if (rscreen->chip_class >= VI && (ptex->flags & R600_RESOURCE_FLAG_DISABLE_DCC || - ptex->format == PIPE_FORMAT_R9G9B9E5_FLOAT)) + ptex->format == PIPE_FORMAT_R9G9B9E5_FLOAT || + ptex->nr_samples >= 2)) flags |= RADEON_SURF_DISABLE_DCC; if (ptex->bind & PIPE_BIND_SCANOUT || is_scanout) { -- 2.7.4