From e3812ce4ee43f50a7423de70609f42990039f4ae Mon Sep 17 00:00:00 2001 From: Florian Tobias Schandinat Date: Wed, 28 Jul 2010 00:57:18 +0000 Subject: [PATCH] viafb: reset correct PLL Looks like we did reset the PLL of the (whatever) engine instead of the PLL of the secondary display (IGA2, LCDCK). This patch fixes it. Signed-off-by: Florian Tobias Schandinat Cc: Joseph Chan --- drivers/video/via/hw.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index 7dcb4d5..53b0651 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c @@ -1688,8 +1688,8 @@ void viafb_set_vclock(u32 clk, int set_iga) } if (set_iga == IGA2) { - viafb_write_reg_mask(SR40, VIASR, 0x01, BIT0); - viafb_write_reg_mask(SR40, VIASR, 0x00, BIT0); + viafb_write_reg_mask(SR40, VIASR, 0x04, BIT2); + viafb_write_reg_mask(SR40, VIASR, 0x00, BIT2); } /* Fire! */ -- 2.7.4