From e3323f4d2c5c2d71b1ad06641fd25de5bd0937fb Mon Sep 17 00:00:00 2001 From: rth Date: Tue, 28 Aug 2001 00:51:40 +0000 Subject: [PATCH] * config/m68k/m68k.md (sordered, sordered_1, sunordered, sunordered_1, suneq, suneq_1, sunge, sunge_1, sungt, sungt_1, sunle, sunle_1, sunlt, sunlt_1, sltgt, sltgt_1, fsogt_1, fsoge_1, fsolt_1, fsole_1, bordered, bunordered, buneq, bunge, bungt, bunle, bunlt, bltgt, bordered_rev, bunordered_rev, buneq_rev, bunge_rev, bungt_rev, bunle_rev, bunlt_rev, bltgt_rev): New patterns. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@45219 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 9 + gcc/config/m68k/m68k.md | 428 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 437 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 27c167f..9a0eaa8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2001-08-27 Richard Henderson + + * config/m68k/m68k.md (sordered, sordered_1, sunordered, sunordered_1, + suneq, suneq_1, sunge, sunge_1, sungt, sungt_1, sunle, sunle_1, + sunlt, sunlt_1, sltgt, sltgt_1, fsogt_1, fsoge_1, fsolt_1, fsole_1, + bordered, bunordered, buneq, bunge, bungt, bunle, bunlt, bltgt, + bordered_rev, bunordered_rev, buneq_rev, bunge_rev, bungt_rev, + bunle_rev, bunlt_rev, bltgt_rev): New patterns. + 2001-08-27 Roman Zippel * config/m68k/m68k.md (subreghi1ashrdi_const32, bsetmemqi, diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 7bac7c9..75645e1 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -5885,6 +5885,194 @@ "* cc_status = cc_prev_status; return \"sls %0\"; ") + +(define_expand "sordered" + [(set (match_operand:QI 0 "register_operand" "") + (ordered:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + if (! m68k_last_compare_had_fp_operands) + abort (); + m68k_last_compare_had_fp_operands = 0; +}) + +(define_insn "*sordered_1" + [(set (match_operand:QI 0 "register_operand" "=d") + (ordered:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + cc_status = cc_prev_status; + return "fsor %0"; +}) + +(define_expand "sunordered" + [(set (match_operand:QI 0 "register_operand" "") + (unordered:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + if (! m68k_last_compare_had_fp_operands) + abort (); + m68k_last_compare_had_fp_operands = 0; +}) + +(define_insn "*sunordered_1" + [(set (match_operand:QI 0 "register_operand" "=d") + (unordered:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + cc_status = cc_prev_status; + return "fsun %0"; +}) + +(define_expand "suneq" + [(set (match_operand:QI 0 "register_operand" "") + (uneq:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + if (! m68k_last_compare_had_fp_operands) + abort (); + m68k_last_compare_had_fp_operands = 0; +}) + +(define_insn "*suneq_1" + [(set (match_operand:QI 0 "register_operand" "=d") + (uneq:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + cc_status = cc_prev_status; + return "fsueq %0"; +}) + +(define_expand "sunge" + [(set (match_operand:QI 0 "register_operand" "") + (unge:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + if (! m68k_last_compare_had_fp_operands) + abort (); + m68k_last_compare_had_fp_operands = 0; +}) + +(define_insn "*sunge_1" + [(set (match_operand:QI 0 "register_operand" "=d") + (unge:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + cc_status = cc_prev_status; + return "fsuge %0"; +}) + +(define_expand "sungt" + [(set (match_operand:QI 0 "register_operand" "") + (ungt:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + if (! m68k_last_compare_had_fp_operands) + abort (); + m68k_last_compare_had_fp_operands = 0; +}) + +(define_insn "*sungt_1" + [(set (match_operand:QI 0 "register_operand" "=d") + (ungt:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + cc_status = cc_prev_status; + return "fsugt %0"; +}) + +(define_expand "sunle" + [(set (match_operand:QI 0 "register_operand" "") + (unle:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + if (! m68k_last_compare_had_fp_operands) + abort (); + m68k_last_compare_had_fp_operands = 0; +}) + +(define_insn "*sunle_1" + [(set (match_operand:QI 0 "register_operand" "=d") + (unle:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + cc_status = cc_prev_status; + return "fsule %0"; +}) + +(define_expand "sunlt" + [(set (match_operand:QI 0 "register_operand" "") + (unlt:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + if (! m68k_last_compare_had_fp_operands) + abort (); + m68k_last_compare_had_fp_operands = 0; +}) + +(define_insn "*sunlt_1" + [(set (match_operand:QI 0 "register_operand" "=d") + (unlt:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + cc_status = cc_prev_status; + return "fsult %0"; +}) + +(define_expand "sltgt" + [(set (match_operand:QI 0 "register_operand" "") + (ltgt:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + if (! m68k_last_compare_had_fp_operands) + abort (); + m68k_last_compare_had_fp_operands = 0; +}) + +(define_insn "*sltgt_1" + [(set (match_operand:QI 0 "register_operand" "=d") + (ltgt:QI (cc0) (const_int 0)))] + "TARGET_68881 && !TARGET_68060" +{ + cc_status = cc_prev_status; + return "fsogl %0"; +}) + +(define_insn "*fsogt_1" + [(set (match_operand:QI 0 "register_operand" "=d") + (not:QI (unle:QI (cc0) (const_int 0))))] + "TARGET_68881 && !TARGET_68060" +{ + cc_status = cc_prev_status; + return "fsogt %0"; +}) + +(define_insn "*fsoge_1" + [(set (match_operand:QI 0 "register_operand" "=d") + (not:QI (unlt:QI (cc0) (const_int 0))))] + "TARGET_68881 && !TARGET_68060" +{ + cc_status = cc_prev_status; + return "fsoge %0"; +}) + +(define_insn "*fsolt_1" + [(set (match_operand:QI 0 "register_operand" "=d") + (not:QI (unge:QI (cc0) (const_int 0))))] + "TARGET_68881 && !TARGET_68060" +{ + cc_status = cc_prev_status; + return "fsolt %0"; +}) + +(define_insn "*fsole_1" + [(set (match_operand:QI 0 "register_operand" "=d") + (not:QI (ungt:QI (cc0) (const_int 0))))] + "TARGET_68881 && !TARGET_68060" +{ + cc_status = cc_prev_status; + return "fsole %0"; +}) ;; Basic conditional jump instructions. @@ -6305,6 +6493,134 @@ return \"jls %l0\"; #endif ") + +(define_insn "bordered" + [(set (pc) + (if_then_else (ordered (cc0) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbor %l0"; +#else + return "fjor %l0"; +#endif +}) + +(define_insn "bunordered" + [(set (pc) + (if_then_else (unordered (cc0) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbun %l0"; +#else + return "fjun %l0"; +#endif +}) + +(define_insn "buneq" + [(set (pc) + (if_then_else (uneq (cc0) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbueq %l0"; +#else + return "fjueq %l0"; +#endif +}) + +(define_insn "bunge" + [(set (pc) + (if_then_else (unge (cc0) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbuge %l0"; +#else + return "fjuge %l0"; +#endif +}) + +(define_insn "bungt" + [(set (pc) + (if_then_else (ungt (cc0) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbugt %l0"; +#else + return "fjugt %l0"; +#endif +}) + +(define_insn "bunle" + [(set (pc) + (if_then_else (unle (cc0) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbule %l0"; +#else + return "fjule %l0"; +#endif +}) + +(define_insn "bunlt" + [(set (pc) + (if_then_else (unlt (cc0) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbult %l0"; +#else + return "fjult %l0"; +#endif +}) + +(define_insn "bltgt" + [(set (pc) + (if_then_else (ltgt (cc0) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbogl %l0"; +#else + return "fjogl %l0"; +#endif +}) ;; Negated conditional jump instructions. @@ -6459,6 +6775,118 @@ return \"jhi %l0\"; #endif ") + +(define_insn "*bordered_rev" + [(set (pc) + (if_then_else (ordered (cc0) (const_int 0)) + (pc) + (label_ref (match_operand 0 "" ""))))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbun %l0"; +#else + return "fjun %l0"; +#endif +}) + +(define_insn "*bunordered_rev" + [(set (pc) + (if_then_else (unordered (cc0) (const_int 0)) + (pc) + (label_ref (match_operand 0 "" ""))))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbor %l0"; +#else + return "fjor %l0"; +#endif +}) + +(define_insn "*buneq_rev" + [(set (pc) + (if_then_else (uneq (cc0) (const_int 0)) + (pc) + (label_ref (match_operand 0 "" ""))))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbogl %l0"; +#else + return "fjogl %l0"; +#endif +}) + +(define_insn "*bunge_rev" + [(set (pc) + (if_then_else (unge (cc0) (const_int 0)) + (pc) + (label_ref (match_operand 0 "" ""))))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbolt %l0"; +#else + return "fjolt %l0"; +#endif +}) + +(define_insn "*bunle_rev" + [(set (pc) + (if_then_else (unle (cc0) (const_int 0)) + (pc) + (label_ref (match_operand 0 "" ""))))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbogt %l0"; +#else + return "fjogt %l0"; +#endif +}) + +(define_insn "*bunlt_rev" + [(set (pc) + (if_then_else (unlt (cc0) (const_int 0)) + (pc) + (label_ref (match_operand 0 "" ""))))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fboge %l0"; +#else + return "fjoge %l0"; +#endif +}) + +(define_insn "*bltgt_rev" + [(set (pc) + (if_then_else (ltgt (cc0) (const_int 0)) + (pc) + (label_ref (match_operand 0 "" ""))))] + "TARGET_68881" +{ + if (!(cc_prev_status.flags & CC_IN_68881)) + abort (); +#ifdef MOTOROLA + return "fbueq %l0"; +#else + return "fjueq %l0"; +#endif +}) ;; Unconditional and other jump instructions (define_insn "jump" -- 2.7.4