From e2faacf9e53376b72a10118d886224ab06dd3f54 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Tue, 11 Sep 2018 08:49:39 +0200 Subject: [PATCH] serial: samsung: Enable baud clock for UART reset procedure in resume Ensure that baud clock is also enabled for UART reset in driver resume. On Exynos5433 SoC this is needed to avoid external abort in UART register writes. Signed-off-by: Marek Szyprowski Change-Id: I2987842ea1b38582bdbceb9ffab3ed1a3b1cbfd2 --- drivers/tty/serial/samsung.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c index 1b454cb9864b..a4c3e275380d 100644 --- a/drivers/tty/serial/samsung.c +++ b/drivers/tty/serial/samsung.c @@ -1922,7 +1922,11 @@ static int s3c24xx_serial_resume(struct device *dev) if (port) { clk_prepare_enable(ourport->clk); + if (!IS_ERR(ourport->baudclk)) + clk_prepare_enable(ourport->baudclk); s3c24xx_serial_resetport(port, s3c24xx_port_to_cfg(port)); + if (!IS_ERR(ourport->baudclk)) + clk_disable_unprepare(ourport->baudclk); clk_disable_unprepare(ourport->clk); uart_resume_port(&s3c24xx_uart_drv, port); @@ -1945,7 +1949,11 @@ static int s3c24xx_serial_resume_noirq(struct device *dev) if (rx_enabled(port)) uintm &= ~S3C64XX_UINTM_RXD_MSK; clk_prepare_enable(ourport->clk); + if (!IS_ERR(ourport->baudclk)) + clk_prepare_enable(ourport->baudclk); wr_regl(port, S3C64XX_UINTM, uintm); + if (!IS_ERR(ourport->baudclk)) + clk_disable_unprepare(ourport->baudclk); clk_disable_unprepare(ourport->clk); } } -- 2.34.1