From e2ea72187e470c2c13adbd3fba4177bd4a0ecc37 Mon Sep 17 00:00:00 2001 From: Wang Zhenyu Date: Wed, 6 Sep 2006 22:57:17 +0800 Subject: [PATCH] Adding pci id for Crestline --- shared-core/drm_pciids.txt | 1 + shared-core/i915_dma.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/shared-core/drm_pciids.txt b/shared-core/drm_pciids.txt index 9ef2c00..1cb7395 100644 --- a/shared-core/drm_pciids.txt +++ b/shared-core/drm_pciids.txt @@ -275,6 +275,7 @@ 0x8086 0x2982 0 "Intel i965G" 0x8086 0x2992 0 "Intel i965Q" 0x8086 0x29A2 0 "Intel i965G" +0x8086 0x2A02 0 "Intel Crestline" [imagine] 0x105d 0x2309 IMAGINE_128 "Imagine 128" diff --git a/shared-core/i915_dma.c b/shared-core/i915_dma.c index ba8c56e..1a89514 100644 --- a/shared-core/i915_dma.c +++ b/shared-core/i915_dma.c @@ -34,7 +34,8 @@ #define IS_I965G(dev) (dev->pdev->device == 0x2972 || \ dev->pdev->device == 0x2982 || \ dev->pdev->device == 0x2992 || \ - dev->pdev->device == 0x29A2) + dev->pdev->device == 0x29A2 || \ + dev->pdev->device == 0x2A02) /* Really want an OS-independent resettable timer. Would like to have -- 2.7.4