From e206f85cfb4303b55edbf54b1284120c68f0da95 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Thu, 17 Nov 2016 09:57:57 +0100 Subject: [PATCH] arm64: dts: exynos: Fix FSYS CMU parent clocks in Exynos5433 SoC This patch corrects FSYS CMU parent clocks specified in clock controller node to let improved Exynos5433 clocks driver to control proper clocks on FSYS<->TOP CMU boundary. Signed-off-by: Marek Szyprowski Reviewed-by: Sylwester Nawrocki Reviewed-by: Chanwoo Choi Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 0a70fad..f5dab75 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -312,7 +312,7 @@ clock-names = "oscclk", "sclk_ufs_mphy", - "div_aclk_fsys_200", + "aclk_fsys_200", "sclk_pcie_100_fsys", "sclk_ufsunipro_fsys", "sclk_mmc2_fsys", @@ -322,7 +322,7 @@ "sclk_usbdrd30_fsys"; clocks = <&xxti>, <&cmu_cpif CLK_SCLK_UFS_MPHY>, - <&cmu_top CLK_DIV_ACLK_FSYS_200>, + <&cmu_top CLK_ACLK_FSYS_200>, <&cmu_top CLK_SCLK_PCIE_100_FSYS>, <&cmu_top CLK_SCLK_UFSUNIPRO_FSYS>, <&cmu_top CLK_SCLK_MMC2_FSYS>, -- 2.7.4