From e12b44a32f4b2d67b5345ab5ca384d92acd4fa9d Mon Sep 17 00:00:00 2001 From: hp Date: Mon, 26 Nov 2012 03:22:15 +0000 Subject: [PATCH] PR middle-end/55030 * builtins.c (expand_builtin_setjmp_receiver): Update comment regarding purpose of blockage. * emit-rtl.c [!HAVE_blockage] (gen_blockage): Similarly for the head comment. * rtlanal.c (volatile_insn_p): Ditto. * doc/md.texi (blockage): Update similarly. Change wording to require one of two forms, rather than implying a wider choice. * cse.c (cse_insn): Where checking for blocking insns, use volatile_insn_p instead of manual check for volatile ASM. * dse.c (scan_insn): Ditto. * cselib.c (cselib_process_insn): Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@193802 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 15 +++++++++++++++ gcc/builtins.c | 3 ++- gcc/cse.c | 5 ++--- gcc/cselib.c | 5 ++--- gcc/doc/md.texi | 5 +++-- gcc/dse.c | 3 +-- gcc/emit-rtl.c | 4 ++-- gcc/rtlanal.c | 4 ++-- 8 files changed, 29 insertions(+), 15 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5c46d03..a682183 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2012-11-26 Hans-Peter Nilsson + + PR middle-end/55030 + * builtins.c (expand_builtin_setjmp_receiver): Update comment + regarding purpose of blockage. + * emit-rtl.c [!HAVE_blockage] (gen_blockage): Similarly for + the head comment. + * rtlanal.c (volatile_insn_p): Ditto. + * doc/md.texi (blockage): Update similarly. Change wording to + require one of two forms, rather than implying a wider choice. + * cse.c (cse_insn): Where checking for blocking insns, use + volatile_insn_p instead of manual check for volatile ASM. + * dse.c (scan_insn): Ditto. + * cselib.c (cselib_process_insn): Ditto. + 2012-11-25 Uros Bizjak * config/i386/sse.md (_loadu): diff --git a/gcc/builtins.c b/gcc/builtins.c index b0cab51..fb7b537 100644 --- a/gcc/builtins.c +++ b/gcc/builtins.c @@ -951,7 +951,8 @@ expand_builtin_setjmp_receiver (rtx receiver_label ATTRIBUTE_UNUSED) /* We must not allow the code we just generated to be reordered by scheduling. Specifically, the update of the frame pointer must - happen immediately, not later. */ + happen immediately, not later. Similarly, we must block + (frame-related) register values to be used across this code. */ emit_insn (gen_blockage ()); } diff --git a/gcc/cse.c b/gcc/cse.c index 4d1d016..ff91b9d 100644 --- a/gcc/cse.c +++ b/gcc/cse.c @@ -5661,10 +5661,9 @@ cse_insn (rtx insn) invalidate (XEXP (dest, 0), GET_MODE (dest)); } - /* A volatile ASM invalidates everything. */ + /* A volatile ASM or an UNSPEC_VOLATILE invalidates everything. */ if (NONJUMP_INSN_P (insn) - && GET_CODE (PATTERN (insn)) == ASM_OPERANDS - && MEM_VOLATILE_P (PATTERN (insn))) + && volatile_insn_p (PATTERN (insn))) flush_hash_table (); /* Don't cse over a call to setjmp; on some machines (eg VAX) diff --git a/gcc/cselib.c b/gcc/cselib.c index 28f8d07..198be8a 100644 --- a/gcc/cselib.c +++ b/gcc/cselib.c @@ -2625,13 +2625,12 @@ cselib_process_insn (rtx insn) cselib_current_insn = insn; - /* Forget everything at a CODE_LABEL, a volatile asm, or a setjmp. */ + /* Forget everything at a CODE_LABEL, a volatile insn, or a setjmp. */ if (LABEL_P (insn) || (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL)) || (NONJUMP_INSN_P (insn) - && GET_CODE (PATTERN (insn)) == ASM_OPERANDS - && MEM_VOLATILE_P (PATTERN (insn)))) + && volatile_insn_p (PATTERN (insn)))) { cselib_reset_table (next_uid); cselib_current_insn = NULL_RTX; diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 482961b..4be4b55 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -5972,8 +5972,9 @@ the values of operands 1 and 2. @item @samp{blockage} This pattern defines a pseudo insn that prevents the instruction -scheduler from moving instructions across the boundary defined by the -blockage insn. Normally an UNSPEC_VOLATILE pattern. +scheduler and other passes from moving instructions and using register +equivalences across the boundary defined by the blockage insn. +This needs to be an UNSPEC_VOLATILE pattern or a volatile ASM. @cindex @code{memory_barrier} instruction pattern @item @samp{memory_barrier} diff --git a/gcc/dse.c b/gcc/dse.c index c7883f0..f879adb 100644 --- a/gcc/dse.c +++ b/gcc/dse.c @@ -2522,8 +2522,7 @@ scan_insn (bb_info_t bb_info, rtx insn) /* Cselib clears the table for this case, so we have to essentially do the same. */ if (NONJUMP_INSN_P (insn) - && GET_CODE (PATTERN (insn)) == ASM_OPERANDS - && MEM_VOLATILE_P (PATTERN (insn))) + && volatile_insn_p (PATTERN (insn))) { add_wild_read (bb_info); insn_info->cannot_delete = true; diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c index 836ff2f..a15be51 100644 --- a/gcc/emit-rtl.c +++ b/gcc/emit-rtl.c @@ -363,8 +363,8 @@ get_reg_attrs (tree decl, int offset) #if !HAVE_blockage -/* Generate an empty ASM_INPUT, which is used to block attempts to schedule - across this insn. */ +/* Generate an empty ASM_INPUT, which is used to block attempts to schedule, + and to block register equivalences to be seen across this insn. */ rtx gen_blockage (void) diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c index ecfae4c..3826481 100644 --- a/gcc/rtlanal.c +++ b/gcc/rtlanal.c @@ -2082,8 +2082,8 @@ remove_node_from_expr_list (const_rtx node, rtx *listp) /* Nonzero if X contains any volatile instructions. These are instructions which may cause unpredictable machine state instructions, and thus no - instructions should be moved or combined across them. This includes - only volatile asms and UNSPEC_VOLATILE instructions. */ + instructions or register uses should be moved or combined across them. + This includes only volatile asms and UNSPEC_VOLATILE instructions. */ int volatile_insn_p (const_rtx x) -- 2.7.4