From e123aba94ead1673e8672e0fdd7ef9a75d1b205c Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Tue, 28 Nov 2017 17:11:30 +0000 Subject: [PATCH] DAG: Legalize truncstores to illegal int types Truncate to a legal int type, and produce a new truncstore from a narrower type. llvm-svn: 319185 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 22 ++++++++--- llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 56 +++++++++++++++++++++++++++ 2 files changed, 72 insertions(+), 6 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 6974e70..fdbd3e1 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -624,13 +624,23 @@ void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) { assert(!StVT.isVector() && "Vector Stores are handled in LegalizeVectorOps"); + SDValue Result; + // TRUNCSTORE:i16 i32 -> STORE i16 - assert(TLI.isTypeLegal(StVT) && - "Do not know how to expand this store!"); - Value = DAG.getNode(ISD::TRUNCATE, dl, StVT, Value); - SDValue Result = - DAG.getStore(Chain, dl, Value, Ptr, ST->getPointerInfo(), - Alignment, MMOFlags, AAInfo); + if (TLI.isTypeLegal(StVT)) { + Value = DAG.getNode(ISD::TRUNCATE, dl, StVT, Value); + Result = DAG.getStore(Chain, dl, Value, Ptr, ST->getPointerInfo(), + Alignment, MMOFlags, AAInfo); + } else { + // The in-memory type isn't legal. Truncate to the type it would promote + // to, and then do a truncstore. + Value = DAG.getNode(ISD::TRUNCATE, dl, + TLI.getTypeToTransformTo(*DAG.getContext(), StVT), + Value); + Result = DAG.getTruncStore(Chain, dl, Value, Ptr, ST->getPointerInfo(), + StVT, Alignment, MMOFlags, AAInfo); + } + ReplaceNode(SDValue(Node, 0), Result); break; } diff --git a/llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll b/llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll new file mode 100644 index 0000000..8b60500 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll @@ -0,0 +1,56 @@ +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CIVI %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CIVI %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s + +; GCN-LABEL: {{^}}local_store_i56: +; GCN-DAG: ds_write_b8 v0, v{{[0-9]+}} offset:6 +; GCN-DAG: ds_write_b16 v0, v{{[0-9]+}} offset:4 +; GCN-DAG: ds_write_b32 v0, v{{[0-9]+$}} +define void @local_store_i56(i56 addrspace(3)* %ptr, i56 %arg) #0 { + store i56 %arg, i56 addrspace(3)* %ptr, align 8 + ret void +} + +; GCN-LABEL: {{^}}local_store_i55: +; GCN-DAG: ds_write_b8 v0, v{{[0-9]+}} offset:6 +; GCN-DAG: ds_write_b16 v0, v{{[0-9]+}} offset:4 +; GCN-DAG: ds_write_b32 v0, v{{[0-9]+$}} +define amdgpu_kernel void @local_store_i55(i55 addrspace(3)* %ptr, i55 %arg) #0 { + store i55 %arg, i55 addrspace(3)* %ptr, align 8 + ret void +} + +; GCN-LABEL: {{^}}local_store_i48: +; GCN-DAG: ds_write_b16 v0, v{{[0-9]+}} offset:4 +; GCN-DAG: ds_write_b32 v0, v{{[0-9]+$}} +define amdgpu_kernel void @local_store_i48(i48 addrspace(3)* %ptr, i48 %arg) #0 { + store i48 %arg, i48 addrspace(3)* %ptr, align 8 + ret void +} + +; GCN-LABEL: {{^}}local_store_i65: +; GCN-DAG: ds_write_b8 v{{[0-9]+}}, v0 offset:8 +; GCN-DAG: ds_write_b64 +define amdgpu_kernel void @local_store_i65(i65 addrspace(3)* %ptr, i65 %arg) #0 { + store i65 %arg, i65 addrspace(3)* %ptr, align 8 + ret void +} + +; GCN-LABEL: {{^}}local_store_i13: +; GCN: v_and_b32_e32 [[TRUNC:v[0-9]+]], 0x1fff, v1 +; GCN: ds_write_b16 v0, [[TRUNC]] +define void @local_store_i13(i13 addrspace(3)* %ptr, i13 %arg) #0 { + store i13 %arg, i13 addrspace(3)* %ptr, align 8 + ret void +} + +; GCN-LABEL: {{^}}local_store_i17: +; GCN: ds_write_b16 v0 +; CIVI: ds_write_b8 v0, v{{[0-9]+}} offset:2 +; GFX9: ds_write_b8_d16_hi v0, v{{[0-9]+}} offset:2 +define void @local_store_i17(i17 addrspace(3)* %ptr, i17 %arg) #0 { + store i17 %arg, i17 addrspace(3)* %ptr, align 8 + ret void +} + +attributes #0 = { nounwind } -- 2.7.4