From e0b4b12066a4afc42bfc582f6a7d501ebb7a2c76 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 31 May 2022 11:04:07 +0200 Subject: [PATCH] radv: declare new dynamic states Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/vulkan/radv_pipeline.c | 22 ++++++++++++++++++++++ src/amd/vulkan/radv_private.h | 38 ++++++++++++++++++++++++++++++-------- 2 files changed, 52 insertions(+), 8 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index d980884..53943a1 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -1346,6 +1346,28 @@ radv_dynamic_state_mask(VkDynamicState state) return RADV_DYNAMIC_COLOR_WRITE_ENABLE; case VK_DYNAMIC_STATE_VERTEX_INPUT_EXT: return RADV_DYNAMIC_VERTEX_INPUT; + case VK_DYNAMIC_STATE_POLYGON_MODE_EXT: + return RADV_DYNAMIC_POLYGON_MODE; + case VK_DYNAMIC_STATE_TESSELLATION_DOMAIN_ORIGIN_EXT: + return RADV_DYNAMIC_TESS_DOMAIN_ORIGIN; + case VK_DYNAMIC_STATE_LOGIC_OP_ENABLE_EXT: + return RADV_DYNAMIC_LOGIC_OP_ENABLE; + case VK_DYNAMIC_STATE_LINE_STIPPLE_ENABLE_EXT: + return RADV_DYNAMIC_LINE_STIPPLE_ENABLE; + case VK_DYNAMIC_STATE_ALPHA_TO_COVERAGE_ENABLE_EXT: + return RADV_DYNAMIC_ALPHA_TO_COVERAGE_ENABLE; + case VK_DYNAMIC_STATE_SAMPLE_MASK_EXT: + return RADV_DYNAMIC_SAMPLE_MASK; + case VK_DYNAMIC_STATE_DEPTH_CLIP_ENABLE_EXT: + return RADV_DYNAMIC_DEPTH_CLIP_ENABLE; + case VK_DYNAMIC_STATE_CONSERVATIVE_RASTERIZATION_MODE_EXT: + return RADV_DYNAMIC_CONSERVATIVE_RAST_MODE; + case VK_DYNAMIC_STATE_DEPTH_CLIP_NEGATIVE_ONE_TO_ONE_EXT: + return RADV_DYNAMIC_DEPTH_CLIP_NEGATIVE_ONE_TO_ONE; + case VK_DYNAMIC_STATE_PROVOKING_VERTEX_MODE_EXT: + return RADV_DYNAMIC_PROVOKING_VERTEX_MODE; + case VK_DYNAMIC_STATE_DEPTH_CLAMP_ENABLE_EXT: + return RADV_DYNAMIC_DEPTH_CLAMP_ENABLE; default: unreachable("Unhandled dynamic state"); } diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 9c8d0c8..870df72 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1096,7 +1096,18 @@ enum radv_dynamic_state_bits { RADV_DYNAMIC_PRIMITIVE_RESTART_ENABLE = 1ull << 27, RADV_DYNAMIC_COLOR_WRITE_ENABLE = 1ull << 28, RADV_DYNAMIC_VERTEX_INPUT = 1ull << 29, - RADV_DYNAMIC_ALL = (1ull << 30) - 1, + RADV_DYNAMIC_POLYGON_MODE = 1ull << 30, + RADV_DYNAMIC_TESS_DOMAIN_ORIGIN = 1ull << 31, + RADV_DYNAMIC_LOGIC_OP_ENABLE = 1ull << 32, + RADV_DYNAMIC_LINE_STIPPLE_ENABLE = 1ull << 33, + RADV_DYNAMIC_ALPHA_TO_COVERAGE_ENABLE = 1ull << 34, + RADV_DYNAMIC_SAMPLE_MASK = 1ull << 35, + RADV_DYNAMIC_DEPTH_CLIP_ENABLE = 1ull << 36, + RADV_DYNAMIC_CONSERVATIVE_RAST_MODE = 1ull << 37, + RADV_DYNAMIC_DEPTH_CLIP_NEGATIVE_ONE_TO_ONE = 1ull << 38, + RADV_DYNAMIC_PROVOKING_VERTEX_MODE = 1ull << 39, + RADV_DYNAMIC_DEPTH_CLAMP_ENABLE = 1ull << 40, + RADV_DYNAMIC_ALL = (1ull << 41) - 1, }; enum radv_cmd_dirty_bits { @@ -1132,13 +1143,24 @@ enum radv_cmd_dirty_bits { RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_RESTART_ENABLE = 1ull << 27, RADV_CMD_DIRTY_DYNAMIC_COLOR_WRITE_ENABLE = 1ull << 28, RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT = 1ull << 29, - RADV_CMD_DIRTY_DYNAMIC_ALL = (1ull << 30) - 1, - RADV_CMD_DIRTY_PIPELINE = 1ull << 30, - RADV_CMD_DIRTY_INDEX_BUFFER = 1ull << 31, - RADV_CMD_DIRTY_FRAMEBUFFER = 1ull << 32, - RADV_CMD_DIRTY_VERTEX_BUFFER = 1ull << 33, - RADV_CMD_DIRTY_STREAMOUT_BUFFER = 1ull << 34, - RADV_CMD_DIRTY_GUARDBAND = 1ull << 35, + RADV_CMD_DIRTY_DYNAMIC_POLYGON_MODE = 1ull << 30, + RADV_CMD_DIRTY_DYNAMIC_TESS_DOMAIN_ORIGIN = 1ull << 31, + RADV_CMD_DIRTY_DYNAMIC_LOGIC_OP_ENABLE = 1ull << 32, + RADV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE_ENABLE = 1ull << 33, + RADV_CMD_DIRTY_DYNAMIC_ALPHA_TO_COVERAGE_ENABLE = 1ull << 34, + RADV_CMD_DIRTY_DYNAMIC_SAMPLE_MASK = 1ull << 35, + RADV_CMD_DIRTY_DYNAMIC_DEPTH_CLIP_ENABLE = 1ull << 36, + RADV_CMD_DIRTY_DYNAMIC_CONSERVATIVE_RAST_MODE = 1ull << 37, + RADV_CMD_DIRTY_DYNAMIC_DEPTH_CLIP_NEGATIVE_ONE_TO_ONE = 1ull << 38, + RADV_CMD_DIRTY_DYNAMIC_PROVOKING_VERTEX_MODE = 1ull << 39, + RADV_CMD_DIRTY_DYNAMIC_DEPTH_CLAMP_ENABLE = 1ull << 40, + RADV_CMD_DIRTY_DYNAMIC_ALL = (1ull << 41) - 1, + RADV_CMD_DIRTY_PIPELINE = 1ull << 41, + RADV_CMD_DIRTY_INDEX_BUFFER = 1ull << 42, + RADV_CMD_DIRTY_FRAMEBUFFER = 1ull << 43, + RADV_CMD_DIRTY_VERTEX_BUFFER = 1ull << 44, + RADV_CMD_DIRTY_STREAMOUT_BUFFER = 1ull << 45, + RADV_CMD_DIRTY_GUARDBAND = 1ull << 46, }; enum radv_cmd_flush_bits { -- 2.7.4