From e0af3bed2cb52b5d8cf1da08b42cf28bae131c76 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Nicolai=20H=C3=A4hnle?= Date: Wed, 13 Sep 2017 10:47:02 +0200 Subject: [PATCH] amd/common: round cube array slice in ac_prepare_cube_coords MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The NIR-to-LLVM pass already does this; now the same fix covers radeonsi as well. Fixes various tests of dEQP-GLES31.functional.texture.filtering.cube_array.combinations.* Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Marek Olšák Reviewed-by: Dave Airlie --- src/amd/common/ac_llvm_build.c | 7 ++++++- src/amd/common/ac_llvm_build.h | 2 +- src/amd/common/ac_nir_to_llvm.c | 4 +--- src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 1 + 4 files changed, 9 insertions(+), 5 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index a831bae..7193b80 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd/common/ac_llvm_build.c @@ -484,7 +484,7 @@ static void build_cube_select(LLVMBuilderRef builder, void ac_prepare_cube_coords(struct ac_llvm_context *ctx, - bool is_deriv, bool is_array, + bool is_deriv, bool is_array, bool is_lod, LLVMValueRef *coords_arg, LLVMValueRef *derivs_arg) { @@ -494,6 +494,11 @@ ac_prepare_cube_coords(struct ac_llvm_context *ctx, LLVMValueRef coords[3]; LLVMValueRef invma; + if (is_array && !is_lod) { + coords_arg[3] = ac_build_intrinsic(ctx, "llvm.rint.f32", ctx->f32, + &coords_arg[3], 1, 0); + } + build_cube_intrinsic(ctx, coords_arg, &selcoords); invma = ac_build_intrinsic(ctx, "llvm.fabs.f32", diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h index dae32e4..14ec03f 100644 --- a/src/amd/common/ac_llvm_build.h +++ b/src/amd/common/ac_llvm_build.h @@ -110,7 +110,7 @@ ac_build_fdiv(struct ac_llvm_context *ctx, void ac_prepare_cube_coords(struct ac_llvm_context *ctx, - bool is_deriv, bool is_array, + bool is_deriv, bool is_array, bool is_lod, LLVMValueRef *coords_arg, LLVMValueRef *derivs_arg); diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 42398d1..ba98cb2 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -4550,15 +4550,13 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr) } if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && coord) { - if (instr->is_array && instr->op != nir_texop_lod) - coords[3] = apply_round_slice(&ctx->ac, coords[3]); for (chan = 0; chan < instr->coord_components; chan++) coords[chan] = ac_to_float(&ctx->ac, coords[chan]); if (instr->coord_components == 3) coords[3] = LLVMGetUndef(ctx->ac.f32); ac_prepare_cube_coords(&ctx->ac, instr->op == nir_texop_txd, instr->is_array, - coords, derivs); + instr->op == nir_texop_lod, coords, derivs); if (num_deriv_comp) num_deriv_comp--; } diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c index a37fe58..d0969a7 100644 --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c @@ -1483,6 +1483,7 @@ static void tex_fetch_args( opcode == TGSI_OPCODE_TXD, target == TGSI_TEXTURE_CUBE_ARRAY || target == TGSI_TEXTURE_SHADOWCUBE_ARRAY, + opcode == TGSI_OPCODE_LODQ, coords, derivs); if (opcode == TGSI_OPCODE_TXD) -- 2.7.4