From e09d035dad21efbcd98b3f8c58af75709cc034e5 Mon Sep 17 00:00:00 2001
From: David Majnemer <david.majnemer@gmail.com>
Date: Thu, 24 Mar 2016 21:40:22 +0000
Subject: [PATCH] [LoopStrengthReduce] Don't hoist into a catchswitch

We try to hoist the insertion point as high as possible to encourage
sharing.  However, we must be careful not to hoist into a catchswitch as
it is both an EHPad and a terminator.

llvm-svn: 264344
---
 llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp  |  7 ++-
 llvm/test/Transforms/LoopStrengthReduce/pr27056.ll | 50 ++++++++++++++++++++++
 2 files changed, 56 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/Transforms/LoopStrengthReduce/pr27056.ll

diff --git a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
index acfdec4..746adea 100644
--- a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
@@ -4353,6 +4353,11 @@ LSRInstance::HoistInsertPosition(BasicBlock::iterator IP,
     bool AllDominate = true;
     Instruction *BetterPos = nullptr;
     Instruction *Tentative = IDom->getTerminator();
+    // Don't bother attempting to insert before a catchswitch, their basic block
+    // cannot have other non-PHI instructions.
+    if (isa<CatchSwitchInst>(Tentative))
+      return IP;
+
     for (Instruction *Inst : Inputs) {
       if (Inst == Tentative || !DT.dominates(Inst, Tentative)) {
         AllDominate = false;
@@ -4426,7 +4431,7 @@ LSRInstance::AdjustInsertPositionForExpand(BasicBlock::iterator LowestIP,
   while (isa<PHINode>(IP)) ++IP;
 
   // Ignore landingpad instructions.
-  while (!isa<TerminatorInst>(IP) && IP->isEHPad()) ++IP;
+  while (IP->isEHPad()) ++IP;
 
   // Ignore debug intrinsics.
   while (isa<DbgInfoIntrinsic>(IP)) ++IP;
diff --git a/llvm/test/Transforms/LoopStrengthReduce/pr27056.ll b/llvm/test/Transforms/LoopStrengthReduce/pr27056.ll
new file mode 100644
index 0000000..6a255f6
--- /dev/null
+++ b/llvm/test/Transforms/LoopStrengthReduce/pr27056.ll
@@ -0,0 +1,50 @@
+; RUN: opt < %s -loop-reduce -S | FileCheck %s
+target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-pc-windows-msvc18.0.0"
+
+%struct.L = type { i8, i8* }
+
+declare i32 @__CxxFrameHandler3(...)
+
+@GV1 = external global %struct.L*
+@GV2 = external global %struct.L
+
+define void @b_copy_ctor() personality i32 (...)* @__CxxFrameHandler3 {
+entry:
+  %0 = load %struct.L*, %struct.L** @GV1, align 8
+  br label %for.cond
+
+for.cond:                                         ; preds = %call.i.noexc, %entry
+  %d.0 = phi %struct.L* [ %0, %entry ], [ %incdec.ptr, %call.i.noexc ]
+  invoke void @a_copy_ctor()
+          to label %call.i.noexc unwind label %catch.dispatch
+
+call.i.noexc:                                     ; preds = %for.cond
+  %incdec.ptr = getelementptr inbounds %struct.L, %struct.L* %d.0, i64 1
+  br label %for.cond
+
+catch.dispatch:                                   ; preds = %for.cond
+  %1 = catchswitch within none [label %catch] unwind to caller
+
+catch:                                            ; preds = %catch.dispatch
+  %2 = catchpad within %1 [i8* null, i32 64, i8* null]
+  %cmp16 = icmp eq %struct.L* %0, %d.0
+  br i1 %cmp16, label %for.end, label %for.body
+
+for.body:                                         ; preds = %for.body, %catch
+  %cmp = icmp eq %struct.L* @GV2, %d.0
+  br i1 %cmp, label %for.end, label %for.body
+
+for.end:                                          ; preds = %for.body, %catch
+  catchret from %2 to label %try.cont
+
+try.cont:                                         ; preds = %for.end
+  ret void
+}
+
+; CHECK-LABEL: define void @b_copy_ctor(
+; CHECK:       catchpad
+; CHECK-NEXT:  icmp eq %struct.L
+; CHECK-NEXT:  getelementptr {{.*}} i64 sub (i64 0, i64 ptrtoint (%struct.L* @GV2 to i64))
+
+declare void @a_copy_ctor()
-- 
2.7.4