From e0122138c24edf51a0225dcb566e3ead298d6ff5 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Fri, 25 Sep 2020 16:16:51 +0300 Subject: [PATCH] drm/i915: s/glk_read_lut_10/bdw_read_lut_10/ MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit glk_read_lut_10() works just fine for all bdw+ platforms, so rename it. Reviewed-by: Uma Shankar Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20200925131656.10022-5-ville.syrjala@linux.intel.com --- drivers/gpu/drm/i915/display/intel_color.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 945bb03..77c103a 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -1919,7 +1919,8 @@ static void ilk_read_luts(struct intel_crtc_state *crtc_state) crtc_state->hw.gamma_lut = ilk_read_lut_10(crtc); } -static struct drm_property_blob *glk_read_lut_10(struct intel_crtc *crtc, +/* On BDW+ the index auto increment mode actually works */ +static struct drm_property_blob *bdw_read_lut_10(struct intel_crtc *crtc, u32 prec_index) { struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); @@ -1960,7 +1961,7 @@ static void glk_read_luts(struct intel_crtc_state *crtc_state) if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT) crtc_state->hw.gamma_lut = ilk_read_lut_8(crtc); else - crtc_state->hw.gamma_lut = glk_read_lut_10(crtc, PAL_PREC_INDEX_VALUE(0)); + crtc_state->hw.gamma_lut = bdw_read_lut_10(crtc, PAL_PREC_INDEX_VALUE(0)); } static struct drm_property_blob * @@ -2016,7 +2017,7 @@ static void icl_read_luts(struct intel_crtc_state *crtc_state) crtc_state->hw.gamma_lut = icl_read_lut_multi_segment(crtc); break; default: - crtc_state->hw.gamma_lut = glk_read_lut_10(crtc, PAL_PREC_INDEX_VALUE(0)); + crtc_state->hw.gamma_lut = bdw_read_lut_10(crtc, PAL_PREC_INDEX_VALUE(0)); } } -- 2.7.4