From dff8a207815a605872dfc5bffc1bae1cad29d87c Mon Sep 17 00:00:00 2001 From: Keerthy Date: Thu, 18 Jun 2015 13:31:13 +0530 Subject: [PATCH] ARM: dts: am4372: Set the default clock rate for dpll_clksel_mac_clk clock cpsw needs the clock to be running at 50MHz in kernel. Hence setting the default rate. Signed-off-by: Keerthy Signed-off-by: Tero Kristo --- arch/arm/boot/dts/am4372.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index ade28c79..8091af6 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -527,8 +527,11 @@ #address-cells = <1>; #size-cells = <1>; ti,hwmods = "cpgmac0"; - clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; - clock-names = "fck", "cpts"; + clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>, + <&dpll_clksel_mac_clk>; + clock-names = "fck", "cpts", "50mclk"; + assigned-clocks = <&dpll_clksel_mac_clk>; + assigned-clock-rates = <50000000>; status = "disabled"; cpdma_channels = <8>; ale_entries = <1024>; -- 2.7.4